Abstract: An apparatus and method for positioning a cursor on a video display having a horizontal blank time and a vertical blank time, where the cursor is addressed by a match position representing the cursor hot point relative to the origin of a pixel matrix, including cursor position registers for providing (x,y) cursor positioning coordinates; adders for adding to the (x,y) coordinates values representing the horizontal and vertical blank times respectively; and subtracting circuits for subtracting from the result values representing the horizontal and vertical match positions to provide the actual screen position at which the cursor is displayed. Accordingly, partial blanking and variable cursor hot points are supported in a manner transparent to the cursor positioning software.

Abstract: An apparatus for memory management in network systems provides added margins of reliability for the receipt of vital maintenance operations protocol (MOP) and station management packets (SMP). In addition, additional overflow allocations of buffers are assigned for receipt of critical system packets which otherwise would typically be discarded in the event of a highly congested system. Thus, if a MOP or a SMP packet is received from the network when the allocated space for storing these types of packets in full, the packets are stored in the overflow allocations, and thus the critical packets are not lost.

Abstract: An I/O bus interface cell includes a driver circuit having an input terminal fed by a logic signal and an output terminal to produce in response thereto a drive signal having selectable rise and fall time characteristics in accordance with a reference voltage provided to the driver. The I/O cell also includes a receiver circuit having an input terminal coupled to said output terminal of said driver with the receiver disposed to latch an unresolved, unamplified received signal prior to resolving the state of the signal. The I/O cell further includes a termination circuit having a terminal connected to the output of said driver, and having a selectable impedance characteristic at said terminal, with said selectable impedance being in accordance with a reference voltage provided to an input of said termination circuit. The termination further includes a circuit to linearize the impedance as a function of the reference voltage.

Abstract: A method and device for receiving data in a synchronous communication system. Data can be accurately transferred between two subsystems in a synchronous system even where the clock skew and propagation delay between the two subsystems is unlimited. The receiving subsystem is initialized to ensure synchronous data transfer over a theoretically infinite range. The transmitting subsystem transmits data and a forwarded clock to the receiving subsystem. Data is captured in three state devices arranged in parallel to eliminate minimum delay requirements and to expand data valid time. The captured data is then aligned to the clock of the receiving subsystem by controlling a multiplexer which selects the proper state device output to pass to another state device for alignment to the receiving subsystem's clock. The multiplexer is controlled by a circuit which monitors the capturing of the incoming data and determines the correct state device output to select for proper data alignment.

Abstract: A method and apparatus for testing complex processor-based computer modules and their associated computer systems by allowing the normal initialization path between a memory component storing code utilized during initialization and the processor to be interrupted and test code from an external test system to be substituted for initialization code. Following initialization, a two-way communication link between the processor and the test system is created to allow interactive testing and status reporting. The testing method and apparatus maximizes the likelihood of precisely identifying defects on the module under test.

Abstract: A method of forming micro-trench isolation regions with a separation of 0.20 .mu.m to 0.35 .mu.m in the fabrication of semiconductor devices involves forming an silicon dioxide layer on select locations of a semiconductor substrate and depositing a polysilicon layer onto the silicon dioxide layer. A layer of photoresist is then deposited over select areas of the polysilicon layer and patterned to form micro-trench isolation regions of widths between about 0.2 .mu.m to about 0.5 .mu.m and aspect ratio of between about 2:1 to about 7:1. Thereafter, the isolation regions are etched for a time and pressure sufficient to form micro-trenches in the substrate surface. The micro-trenches will generally have a width ranging from about 1000 .ANG. to about 3500 .ANG. and depth ranging from about 500 .ANG. to about 5000 .ANG.. The layer of photoresist is then removed to expose the polysilicon layer and a channel stop implant is deposited and aligned with the micro-trenches.

Abstract: Method and system for remote monitoring of high-risk patients using artificial intelligence. A plurality of high-risk patients can be simultaneously monitored without patient intervention. A patient hears questions in the doctor's voice at each monitoring encounter and responds. The patient's responses are recorded at a remote central monitoring station and can be analyzed on line or later. Artificial intelligence (AI) and voice technology (DECvoice) are combined to present to the patient, during a monitoring session or encounter, questions which would be selected from a plurality of different recorded questions. Questions to the patient are chosen using AI, based on the patient's response, by parsing. The monitor could take several forms such as for e.g., uterine activity strips, glucometers, blood pressure cuffs, pulse monitors, electroencephalographs, etc. Preferably, four telephone lines are dedicated to each patient, one for the monitor, one for the voice, one as a back up and one to sense failures.

Abstract: A staged CMOS output buffer has multiple output transistors connected in parallel and driven by corresponding predrivers. Each predriver has a first input from which an inactive output transistor can be turned on, and a second input from which the other, active output transistor can be turned off. The input to the output buffer is coupled directly to the second input of both predrivers to turn the output transistors off when switching begins, and a resistor-capacitor (RC) circuit is inserted between the first inputs to stagger the predriver turn-on times to reduce the peak and slope of the switching current. The predriver employs chains of pass transistors to achieve both tri-state functionality and the simultaneous turn-off necessary for the staged configuration. A split termination is also employed to reduce switching current, especially NMOS-PMOS crossover current.

Abstract: An apparatus for controlling configuration of a communications network includes an internal ring segment for interconnecting a trunk circuit with lobe circuits of the network. The apparatus is provided with lobe ports for connecting to the lobe circuits, a ring input port for connecting to an upstream ring segment of the trunk, and an output port for connecting to a downstream ring segment, of the trunk. A plurality of trunk coupling units (TCUs) are provided, one for each port, for connecting a corresponding ports to the internal ring segment. Each of the TCUs has an inserted state to provide signaling continuity for the communications signals between a port and the ring segments, and each TCU has a wrapped state to provide signaling isolation between a port and the ring segments. A controller, responsive to the communications signals switches the TCUs between the wrapped and inserted states.

Abstract: A monitor for packets on a local area network includes a set of logic circuits implemented in a computer chip, a memory interacting with the computer chip to provide monitoring data to the logic circuits, logic for receiving a packet from the local area network, and a parser to process bits of the packet as they are received, wherein the parser uses the monitoring data in conjunction with the received bits to provide forwarding data which indicates the type of packet received. The monitor uses the forwarding data to determine whether the received packet is stored in memory, discarded, or forwarded to other host computers in the network. The monitor uses type information from the forwarding data to maintain count information of the different types of packets which may be forwarded to a host computer or a remote monitoring device.

Abstract: A secure arrangement in which stations in a communications network are informed of the addresses of their neighbors by means of identifying messages transmitted by the stations. To prevent the insertion of illegitimate stations into the network, the system makes use of passwords included in the station-identifying messages. In networks where eavesdropping is possible, the passwords are encrypted versions of the identities of the stations transmitting the messages and in systems where stations can also be impersonated, the encrypted passwords also include time stamps.

Abstract: Disclosed is a method of planarizing the surface of a silicon wafer in integrated circuit manufacture where trench isolation techniques are employed. The trenches and active areas on a semiconductor substrate are conformally coated with a layer of silicon oxide. A layer of patterned polysilicon then is deposited on top of the oxide and etched to create filler blocks in depressions above the trenches. Next, the polysilicon is annealed to thereby fill the trenches with an expanded oxide block. The resulting relatively planar surface then is polished back to the nitride cap, to thereby produce a high degree of planarity across all trench and active area dimensions.

Abstract: A semiconductor chip test jig for testing a chip 10 with "gull-wing" leads 11 comprises a body 20 and a cover 30. The body 20 has sets of fins or combs 23 which engage with the leads 11 to locate the chip 10 in the horizontal plane; the cover 30 has a set of "knife-edge" lead supports 35 formed to match a trim and form jig in the region of the leads 11 from where they emerge from the encapsulation of the chip 10 to their first bends; and the body 20 has a set of spring-loaded pins 24 which contact the leads opposite the lead supports.

Abstract: A computer system includes a main memory that is able to make use of DRAM memory devices having a relatively high level of bad cells (hard faults). An EDC circuit is provided which uses combinatorial logic to perform a BCH code type of error detection and correction. A primary feature is the recognition that due to use of high density integrated circuits--gate arrays--it is no longer necessary to use sequential logic to decode the multiple-bit error correcting codes. An EDC with 128-bits of data and a check bit field 41-bits wide, using a BCH code, constructed in ASIC sea-of-gates technology using about 87,000 logic gates, can correct 5-bits in error and can detect 6-bits in error. By using multiple-bit EDC in the controller for main memory, it is no longer necessary that all DRAM devices be ostensibly "perfect." A certain density of non-functional memory cells can be tolerated, yet the memory system will still return perfect data.

Abstract: Circuitry is provided that interconnects a plurality of MR heads on a substrate with control circuitry using a lesser number of interconnecting paths. This reduces the number of required substrate pins to which the interconnecting paths are connected. The reduced number of substrate pins is such that it enables manufacturing and processing techniques to accommodate an increased number of MR heads on a given substrate over that which would be possible with the prior art interconnecting techniques.

Abstract: A method and apparatus providing for the interaction of processes in an object-oriented manner by which a system manages "classes" of data instances and applications rather than managing the data itself. The names of classes may be stored in a data base which also contains other information about the classes, such as certain con, non attributes of applications or instances which are supported by the classes. Applications can remotely invoke other applications by sending messages with parameters. Using the message names, as well as information about the classes of certain parameters and certain preference information, a reference to a specific method is selected from the data base. That method will perform the operation specified in the message. Other information in the data base is then used to locate and execute the actual code to implement the referenced method.

Abstract: A data communication system having a plurality of nodes is disclosed. A number of transceivers is provided, each transceiver being coupled to a respective one of the plurality of nodes, for data communication between the transceiver and its associated node. Each transceiver is also provided with a controlled current source. The data communication system is also equipped with a data bus for communication of a transmitted data signal between the transceivers. A current bus which is coupled to each transceiver receives a current signal from the controlled current source when a transceiver is placing the data onto the data bus.

Abstract: A cross-domain call jacketing system is provided in a computer system that embodies a first hardware (X) architecture to executing X-code in an X-domain and which simulates at least a second computer hardware (Y) architecture executing Y-code in a Y-domain.Cross-domain routine calls are Jacketed for services in the cross-domain and for returns after the requested services have been performed. After Jacketing, X routine calls are transmitted for implementation by the simulating subsystem and Y calls are transmitted for implementation in the X domain. Call parameters are transformed from a representation that uses the call conventions of the calling domain to another representation that uses the call conventions of the called domain. Data in the memory is generally globally accessible and the Y calls include data references that require memory access handling in the X domain.A first Jacketing table is provided for each executable routine in the X domain.

Abstract: A system for controlling the printing of a message having a plurality of strings of text and a plurality of parameters includes means for designating the locations of the strings of text, and the locations and formats of the parameters within the message. The system also includes means for switching the locations and the formats of the parameters after they have been designated, which may include a permutation specifier.