Patents Represented by Attorney Anthony J. Sarli, Jr.
  • Patent number: 4008373
    Abstract: A digital control circuit means responsive to a timing signal and a phase shift control signal accepts digital dibits of data and generates a digital control output signal. A digital phase shifter coupled to the control circuit and responsive to a timing signal generates a main and a secondary channel digital output signal alternately at a first and a second output terminal during successive dibit intervals. The main channel digital output signal is phase shifted a predetermined amount with respect to a main channel digital output signal generated during a preceding dibit interval in response to said digital control output signal. A multiplexer coupled to the first and second output terminals of the phase shifter transmits the main channel digital output signal on a third output terminal and the secondary channel digital output signal on a fourth output terminal.
    Type: Grant
    Filed: October 3, 1975
    Date of Patent: February 15, 1977
    Assignee: Motorola, Inc.
    Inventors: Harold Garth Nash, Gene Arnold Schriber, John Robert Linford
  • Patent number: 3974325
    Abstract: In a facsimile transmission device, means for reducing the bandwidth which includes a clock rate halving flip-flop and an odd-even line switching flip-flop which are logically combined to transmit every second data bit in each line in a vertical stagger between lines. At the receiving end the missing bits are filled in by an interpolation device according to the data in the vertically adjacent bits or the horizontally adjacent bits.
    Type: Grant
    Filed: October 21, 1974
    Date of Patent: August 10, 1976
    Assignee: Xerox Corporation
    Inventor: Michael E. Wilmer
  • Patent number: 3943495
    Abstract: A microprocessor with a bus structure for carrying address and data signals wherein an address may be modified by an index value for indirect addressing by deriving said index value from an index register or a control word field. Immediate addressing is provided on branch instructions by providing two separate incrementing paths to avoid loss of a machine cycle during branch.
    Type: Grant
    Filed: December 26, 1973
    Date of Patent: March 9, 1976
    Assignee: Xerox Corporation
    Inventor: Richard A. Garlic
  • Patent number: 3931580
    Abstract: A digital line receiver circuit which incorporates a slope detector in the form of a differential voltage comparator. The two inputs to the comparator receive a composite digital video signal but the signal on the second input is modified by a delay and biasing arrangement such that the output gives a representation of the time positions of polarity changes of the digital input.
    Type: Grant
    Filed: June 10, 1974
    Date of Patent: January 6, 1976
    Assignee: Xerox Corporation
    Inventor: Edward F. Hebda