Abstract: A wafer track and lithography cluster tool for performing a series of processes with a scheduler which synchronizes all events in a substrate processing system. Events in the cluster tool are scheduled to occur at regular, periodic intervals, thereby improving throughput and quality. The scheduler also eliminates conflicts for transportation resources between modules in the cluster tool. Wafers are loaded into the cluster tool at a regular interval, referred to as a sending period. All events in the system are synchronized with the sending period, and all event timings are normalized in terms of the sending period. The conflicts are resolved by selectively adding delays in modules which can tolerate them without degrading throughput or performance in the system; modules that cannot tolerate delays are exempted. The periodicity of the scheduled cluster tool enables the identification of wafers in the cluster tool.

Abstract: A JTAG tester includes a JTAG controller in a PCI slot of a PC, a port multiplexer, a programmable power supply, and drive and compare logic, which tracks Vcc. The tester reads and blows information and configuration fuses on the silicon using the JTAG port. The tester pipes the JTAG port into a 1-to-N multiplexer, where N is the number of sockets being tested in parallel. The multiplexer is different from conventional multiplexers in that it allows selection of any combination of sockets, not just any one of the N sockets. Thus the same data can be driven into any combination of devices for parallel programming of fuse registers. Data being read out is read one device for separate evaluation via the single port back to the controller PC.

Abstract: A method and apparatus for allowing memory, cache and/or a processor to remain powered down while repetitive transactions are carried out on an I/O bus and actions are taken in response to feedback received from I/O devices coupled to the I/O bus.

Abstract: Apparatus for inspection of a sample includes an optical assembly made up of first and second optical heads with respective first and second levels of spatial resolution, such that the second level of spatial resolution is substantially higher than the first level. A positioning device imparts motion to at least one of the optical assembly and the sample, so as to cause the optical assembly to scan over the surface of the sample. An inspection controller processes the signal output by the first optical head to identify spots on the surface that should be inspected at the second level of spatial resolution, and then controls the second optical head so as to inspect the identified spots.

Abstract: A method comprising defining one or more aggregate virtual fields for a first document using meta-data associated with the first document is disclosed.

Abstract: A system and method for decoding the length of a macro instruction is described. In one embodiment, the system comprises an opcode-plus-immediate logic unit to generate a first length value, the first length value comprising a length of an opcode plus a length of intermediate data. A memory-length logic unit generates a second length value, the second length value comprising a potential length of a memory displacement, the opcode-plus-immediate logic unit and memory-length logic unit operating in parallel. In addition, the system comprises a length-summation logic unit to sum the first length value and the second length value if the second length value is present.

Abstract: The present invention provides a method, apparatus, and system for controlling memory accesses to multiple isolated memory areas in an isolated execution environment. A page manager is used to distribute a plurality of pages to a plurality of different areas of a memory, respectively. The memory is divided into non-isolated areas and isolated areas. The page manager is located in an isolated area of memory. Further, a memory ownership page table describes each page of memory and is also located in an isolated area of memory. The page manager assigns an isolated attribute to a page if the page is distributed to an isolated area of memory. On the other hand, the page manager assigns a non-isolated attribute to a page if the page is distributed to a non-isolated area of memory. The memory ownership page table records the attribute for each page. In one embodiment, a processor having a normal execution mode and an isolated execution mode generates an access transaction.

Abstract: A process for drying a polymeric material present on a substrate is provided. Temperatures of the polymeric material is measured and the ambient temperature in the vicinity of the substrate. A temperature of the substrate is also measured. A variation in the measured ambient temperature is detected. The substrate temperature, polymeric temperature, ambient temperature or a substrate drying spin speed is adjusted in response to the detected variation in the measured ambient temperature.

Abstract: A method for selecting free spectral ranges (FSR) of intra-cavity optics to optimize reliability of the channel switching mechanism and corresponding apparatus. In particular, the optimal relationship between the FSR of the internal etalon and the FSR of the laser cavity is derived. For the external cavity diode lasers (ECDL) the optimal relationship between the FSR of the internal etalon and the FSR of the gain chip is also derived. Equations are derived for selecting free spectral ranges of various optical cavities so as to create a locally commensurate condition under which the relative position of the lasing mode with respect to the transmission peak of the laser's tunable filter (e.g., etalon plus channel selector) does not change when the laser hops between adjacent channels.

Abstract: A route request is received from a user to travel from a start location to a destination location. A route guidance is provided for a route to the destination location based on a travel profile for the user in response to the route request. The travel profile comprises one or more of a history of driving behavior of the user and a driving preference specified by the user.

Abstract: An apparatus, comprising: a substrate having a surface; a die attached to the substrate surface; an underfill material positioned between the substrate surface and the die; and one or more barriers on the substrate surface adjoining the die, wherein the barriers controls flow of the underfill material.

Abstract: An antenna utilizes multiple radiating elements placed at regular interval around a geometric structure. Each of the individual radiating elements are selectably activated in order to narrow the range of transmission and reception for the antenna. Larger antenna gain is achieved by narrowing the radiation pattern and each individual radiating element has significantly more gain than an omni-directional radiator while also reducing the power output requirements of the transmitter.

Abstract: An improved USB connection is disclosed that includes a pair of host parallel resistors connected to the USB connection at the host termination and a pair of peripheral parallel resistors connected to the USB connection at the peripheral termination. During high speed operation, the parallel resistors are switched to ground. Another aspect of the present invention is a voltage pull up apparatus for a USB connection. The apparatus includes a pull down resistor connected to the USB connection, a trickle current source attached to the USB connection, and a boost current source attached to the USB connection.

Abstract: A device comprises a component having circuitry, a carrier comprising one or more conductive areas to form a portion of an electromagnetic coupler, and a clamp to secure the carrier to the device.

Abstract: An electronic system and corresponding method for authenticating firmware stored in a memory element external to a processor. In one embodiment, an electronic system comprises a processor and a memory element. The memory element is used to contain firmware and a digital signature of the firmware signed by a signatory. Coupled to the memory element, the processor authenticates the firmware during a predetermined condition, which occurs prior to execution of the firmware, through use of a pre-stored public key of the signatory and a pre-stored digital signature function.

Abstract: A voltage mirroring circuit to output a voltage that is derived from a reference voltage. A reference voltage is applied to the positive input of an operational amplifier, which is used as a unity gain amplifier to generate a feedback voltage. The feedback voltage is applied across a resistor to form a current. The current is directed through a load resistor to form the output voltage. The output voltage is a function of the resistance ratio of the load resistor to the current-setting resistor. Also, a multiple-output voltage mirroring circuit in which the current formed by the use of the operational amplifier and the current-settings resistor is mirrored to generate a plurality of currents. These currents are directed through respective load resistors to form output voltages. The output voltages are a function of the resistance ratios of the respective load resistors to the current-setting resistor.

Abstract: A method of forming an isolation structure in a semiconductor substrate is described. A trench is first etched into a semiconductor substrate. A first oxide layer is then formed with the trench. The first oxide layer is subjected to a nitrogen-oxide gas ambient and is annealed to form an oxy-nitride surface on the first oxide layer and a silicon-oxynitride interface between the first oxide layer and the semiconductor substrate. A second oxide layer is then deposited over the oxy-nitride surface of the first oxide layer. The method and isolation structure of the present invention prevents dopant outdiffusion, reduces trench stresses, allows more uniform growth of thin gate oxides, and permits the use of thinner gate oxides.

Abstract: A novel, high performance, high reliability interconnection structure for an integrated circuit. The interconnection structure of the present invention is formed on a first insulating layer which in turn is formed on a silicon substrate or well. A first multilayer interconnection comprising a first aluminum layer, a first refractory metal layer, and a second aluminum layer is formed on the first insulating layer. A second insulating layer is formed over the first multilayer interconnection. A conductive via is formed through the second insulating layer and recessed into the first multilayer interconnection wherein a portion of the via extends above the second insulating layer. A second interconnection is formed on the second insulating layer and on and around the portion of the via extending above the second insulating layer.

Abstract: A photolithography lens system is disclosed. The system has several elements all perpendicularly aligned to an optical axis. The elements include a light source that generates an exposing light, a first lens that has a front focal plane and a pupil plane, and a binary mask between the light source and the first lens. The binary mask is placed at the front focal plane of the first lens. A pupil filter is placed at the pupil plane. Finally, a second lens is provided that has a front focal plane at substantially the same position as the pupil plane. The second lens also has a back focal plane where a semiconductor wafer is placed.

Abstract: An apparatus, comprising a portable module to cool, comprising a cooling device and a thermal connector.