Patents Represented by Attorney Burgess & Bereznak, LLP
  • Patent number: 7430098
    Abstract: A magnetic head includes a slider having an air bearing surface (ABS) and a trailing surface, with a transducer fabricated on the trailing surface. The transducer includes an adjunct pole disposed in a first general plane, the adjunct pole having a front edge that is recessed from the ABS and a rear edge. A main pole of the transducer is formed adjacent the adjunct pole, the main pole having a write tip that extends approximately to the ABS. A write coil having a first layer of turns is disposed in a second general plane below the adjunct pole. The magnetic head further includes a heating element, a portion of the heating element being disposed in the first general plane behind the rear edge of the adjunct pole.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: September 30, 2008
    Assignee: Western Digital (Fremont), LLC
    Inventors: Suping Song, Kroum S. Stoev
  • Patent number: 7428124
    Abstract: A thin film magnetic head includes a slider body having a trailing surface meeting an air-bearing surface at a trailing edge. A magnetic read and write elements are disposed along the trailing surface near the trailing edge. The magnetic write element includes write poles and a coil. A portion of a heating element is disposed in a first general plane beneath the coil and above the magnetic read element. At least one thermally-insulating layer of material having a thermal conductivity of less than about 2.0 W/m-K extends in a second general plane substantially beneath the heating element.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: September 23, 2008
    Assignee: Western Digital (Fremont), LLC
    Inventors: Suping Song, Hai Jiang, Charles W. Miller, Kroum Stoev
  • Patent number: 7372665
    Abstract: A magnetic head includes a slider body having a trailing surface meeting an air-bearing surface at a trailing edge, with a thin-film transducer disposed on the trailing surface of the slider body near the trailing edge. The thin-film transducer includes a coil embedded between first and second poles. A resistive heating element is disposed adjacent and electrically insulated from, the coil. Application of power to the resistive heating element causes expansion of at least the first and second poles.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: May 13, 2008
    Assignee: Western Digital (Fremont), LLC
    Inventors: Kroum S. Stoev, Suping Song, Tao Pan
  • Patent number: 7149343
    Abstract: Described are methods and systems for providing improved defect detection and analysis using infrared thermography. Test vectors heat features of a device under test to produce thermal characteristics useful in identifying defects. The test vectors are timed to enhance the thermal contrast between defects and the surrounding features, enabling IR imaging equipment to acquire improved thermographic images. In some embodiments, a combination of AC and DC test vectors maximize power transfer to expedite heating, and therefore testing. Mathematical transformations applied to the improved images further enhance defect detection and analysis. Some defects produce image artifacts, or “defect artifacts,” that obscure the defects, rendering difficult the task of defect location. Some embodiments employ defect-location algorithms that analyze defect artifacts to precisely locate corresponding defects.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: December 12, 2006
    Assignee: Marena Systems Corporation
    Inventors: Marian Enachescu, Sergey Belikov
  • Patent number: 7135748
    Abstract: A monolithic integrated circuit fabricated on a semiconductor die includes a control circuit and a first output transistor having segments substantially equal to a first length. A second output transistor has segments substantially equal to a second length. The first and second output transistors occupy an L-shaped area of the semiconductor die, the L-shaped area having first and second inner sides that are respectively disposed adjacent first and second sides of the control circuit. At least one of the first and second output transistors is coupled to the control circuit. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: November 14, 2006
    Assignee: Power Integrations, Inc.
    Inventor: Balu Balakrishnan
  • Patent number: 7115958
    Abstract: A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: October 3, 2006
    Assignee: Power Integrations, Inc.
    Inventors: Donald Ray Disney, Wayne Bryan Grabowski
  • Patent number: 7046490
    Abstract: A spin valve magnetoresistance sensor of a thin film magnetic head. In one embodiment, a spin valve magnetoresistance sensor is provided with a spin valve film, in which a base layer including a first base film of Ta or some other nonmagnetic metal and, on top of this, a second base film of an alloy represented by NiFeX (where X is at least one element selected from among Cr, Nb, Rh) is formed on a substrate, and on top of this are formed by layering a free magnetic layer and pinned magnetic layer arranged to enclose a nonmagnetic conductive layer, as well as an antiferromagnetic layer, the second base film has an fcc (face-centered cubic) structure and also has a (111) orientation.
    Type: Grant
    Filed: January 6, 2000
    Date of Patent: May 16, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Masaki Ueno, Hideyasu Nagai, Koichi Suzuki, Tomoki Fukagawa, Fuminori Hikami
  • Patent number: 7026063
    Abstract: A method and apparatus of a spin-type magnetoresistance sensor having a free and pinned magnetic layer stacked with a non-magnetic interposed layer are disclosed.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: April 11, 2006
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Masaki Ueno, Hiroshi Nishida, Fuminori Hikami
  • Patent number: 6990647
    Abstract: A buffer for use in a logic circuit comprises input and output nodes. A first inverter having a first device size is coupled to the input node. A second inverter is coupled in series with the first inverter and with the output node. The second inverter having a second device size at least six times greater than the first device size. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: January 24, 2006
    Assignee: Cadence Design Systems, Inc.
    Inventor: Kenneth Hing Key Tseng
  • Patent number: 6987299
    Abstract: A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or more dielectric layers. The layered structure may be fabricated in a variety of orientations. A MOSFET structure may be incorporated into the device adjacent to the source region, or, alternatively, the MOSFET structure may be omitted to produce a high-voltage transistor structure having a stand-alone drift region. It is emphaized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims 37 CFR 1.72(b).
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: January 17, 2006
    Assignee: Power Integrations, Inc.
    Inventors: Donald Ray Disney, Amit Paul
  • Patent number: 6980034
    Abstract: An output buffer includes an output stage that includes a transconductance device configured to drive a capacitive load, and a first capacitor coupled to an input of the transconductance device. A converter converts an input clock signal into a current that is provided to charge the first capacitor during a specified interval. The converter includes a feedback loop to adjust the current so as to produce a specified logic level at the specified interval. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: December 27, 2005
    Assignee: Cadence Design Systems, Inc.
    Inventor: Timothy Glen O'Shaugnessy
  • Patent number: 6938915
    Abstract: A vehicle restraint system for a child includes a child car seat having a body with a back and a bottom, the bottom having one or more openings. A base unit that fits in a passenger seat of a vehicle has a top with one or more members, each of which is adapted for mated insertion into the one or more openings. A resilient insertion member locks the child car seat to the base unit. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: September 6, 2005
    Assignee: Go-Go Babyz Corp.
    Inventors: Robert C. Bischoff, Melinda Elisa Maxfield, Kerry Ellen Williams
  • Patent number: 6882005
    Abstract: A high-voltage transistor with a low specific on-state resistance and that supports high voltage in the off-state includes one or more source regions disposed adjacent to a multi-layered extended drain structure which comprises extended drift regions separated from field plate members by one or more dielectric layers. With the field plate members at the lowest circuit potential, the transistor supports high voltages applied to the drain in the off-state. The layered structure may be fabricated in a variety of orientations. A MOSFET structure may be incorporated into the device adjacent to the source region, or, alternatively, the MOSFET structure may be omitted to produce a high-voltage transistor structure having a stand-alone drift region.
    Type: Grant
    Filed: March 21, 2003
    Date of Patent: April 19, 2005
    Assignee: Power Integrations, Inc.
    Inventor: Donald Ray Disney
  • Patent number: 6838346
    Abstract: A method for fabricating a high-voltage transistor with an extended drain region includes forming an epitaxial layer on a substrate, the epitaxal layer and the substrate being of a first conductivity type; then etching the epitaxial layer to form a pair of spaced-apart trenches that define first and second sidewall portions of the epitaxial layer. A dielectric layer is formed that partially fills each of the trenches, covering the first and second sidewall portions. The remaining portions of the trenches are then filled with a conductive material to form first and second field plate members that are insulated from the substrate and the epitaxial layer. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used o interpret or limit the scope or meaning of the claims. 37 CFR 1.72(b).
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: January 4, 2005
    Assignee: Power Integrations, Inc.
    Inventor: Donald Ray Disney
  • Patent number: 6828631
    Abstract: A high voltage insulated gate field-effect transistor includes an insulated gate field-effect device structure having a source and a drain, the drain being formed with an extended well region having one or more buried layers of opposite conduction type sandwiched therein. The one or more buried layers create an associated plurality of parallel JFET conduction channels in the extended portion of the well region. The parallel JFET conduction channels provide the HVFET with a low on-state resistance.
    Type: Grant
    Filed: May 5, 2004
    Date of Patent: December 7, 2004
    Assignee: Power Integrations, Inc
    Inventors: Vladimir Rumennik, Donald R. Disney, Janardhanan S. Ajit
  • Patent number: 6828698
    Abstract: A gimbal for supporting a moveable mirror includes an attachment section, first and second pairs of beams extending along the x-axis and connected to the attachment section, and third and fourth pairs of beams extending along the y-axis connected with the first and second pair of beams. The connections are such that the mirror can tilt or rotate about both the x-axis and y-axis. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: December 7, 2004
    Assignee: Lightbay Networks Corporation
    Inventors: Shahab Hatam-Tabrizi, Wei-Hung Yeh
  • Patent number: 6825536
    Abstract: A lateral power metal-oxide-semiconductor field effect transistor (MOSFET) having a gate structure in which the insulated gate is coupled to the gate electrode through contacts at a plurality of locations. The source electrode includes first and second segments. The first segment is interposed between the drain electrode and the gate electrode and acts as a field plate.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: November 30, 2004
    Assignee: Power Integrations, Inc.
    Inventors: Donald Ray Disney, Wayne Bryan Grabowski
  • Patent number: 6818490
    Abstract: A method of fabricating complementary high-voltage field-effect transistors in a substrate of a first conductivity type includes forming first and second well regions of a second conductivity type in the substrate. A first drain region of the second conductivity type is formed in the first well region, and a first source region is formed in the substrate adjacent the first well region. Second and third drain regions of the first conductivity type are formed in the second well region separated from one another. A second source region of the first conductivity type Is formed In the second well region separated from the second drain region. First and second buried layers are formed within the first and second well regions, respectively, with the second buried layer connected to the second and third drain regions.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: November 16, 2004
    Assignee: Power Integrations, Inc.
    Inventor: Donald Ray Disney
  • Patent number: RE39478
    Abstract: A magnetic head suspension assembly is fabricated with an integral piece which includes a load beam section, a flexure section, a rest mount section and a leaf spring section between the load beam and rear mount. A tongue extends from the load beam to the flexure and has a down-facing load dimple which contacts the non-air bearing surface of an attached air bearing slider. The flexure includes narrow thin legs adjacent to a cutout that delineates the load beam tongue. The head suspension is characterised by a high first bending mode frequency and low pitch and roll stiffness.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: January 23, 2007
    Assignee: Western Digital (Fremont), Inc.
    Inventors: Michael R. Hatch, Chak M. Leung
  • Patent number: RE40203
    Abstract: A magnetic head suspension assembly is fabricated with an integral piece which includes a load beam section, a flexure section, a rear mount section and a leaf spring section between the load beam and rear mount. A tongue extends from the load beam to the flexure and has a down-facing load dimple which contacts the non-air bearing surface of an attached air bearing slider. The flexure includes narrow thin legs adjacent to a cutout that delineates the load beam tongue. The head suspension is characterized by a high first bending mode frequency and low pitch and roll stiffness.
    Type: Grant
    Filed: June 13, 1996
    Date of Patent: April 1, 2008
    Assignee: Western Digital (Fremont), LLC
    Inventors: Michael R. Hatch, Chak M. Leung