Patents Represented by Attorney, Agent or Law Firm Calvin B. Ward
  • Patent number: 5677825
    Abstract: An improved ferroelectric capacitor exhibiting reduced imprint effects in comparison to prior art capacitors. A capacitor according to the present invention includes top and bottom electrodes and a ferroelectric layer sandwiched between the top and bottom electrodes, the ferroelectric layer comprising a perovskite structure of the chemical composition ABO.sub.3 wherein the B-site comprises first and second elements and a dopant element that has an oxidation state greater than +4. The concentration of the dopant is sufficient to reduce shifts in the coercive voltage of the capacitor with time. In the preferred embodiment of the present invention, the ferroelectric element comprises Pb in the A-site, and the first and second elements are Zr and Ti, respectively. The preferred dopant is chosen from the group consisting of Niobium, Tantalum, and Tungsten. In the preferred embodiment of the present invention, the dopant occupies between 1 and 8% of the B-sites.
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: October 14, 1997
    Inventors: Joseph T. Evans, Jr., William L. Warren, Bruce A. Tuttle, Duane B. Dimos, Gordon E. Pike
  • Patent number: 5644498
    Abstract: Gate level netlists used for timing analysis in integrated circuit design are reduced using a timing shell generator while preserving critical information for timing analysis. After verification of timings, the gate level netlist is convened into a shell containing block boundary information. The function of the shell generator is to delete internal cells meeting a set of criteria. The result is a shell netlist containing a subset of the original netlist. Thus, the design cycle time involved and computing time and resources needed in ASIC development for chips using circuits represented by timing shell netlists are decreased by substituting design verification at the top level of large hierarchical netlists or large flat netlists by bottom up verification procedures using timing shells.
    Type: Grant
    Filed: January 25, 1995
    Date of Patent: July 1, 1997
    Assignee: LSI Logic Corporation
    Inventors: Christian Joly, Francois Ducaroir, Zarir Sarkari, Allen Wu
  • Patent number: 5636246
    Abstract: A communication system for sending a sequence of symbols on a communication link. The transmitter receives a sequence of symbols and groups the symbols into a block of symbols for which transmission is to be initiated in a following frame. Each symbol is used to modulate a different carrier. At the receiver, the signal from the communication link is decoded by a plurality of finite impulse response (FIR) filters that are matched to the waveforms modulated by the symbols in the transmitter. Errors arising from synchronization errors between the transmitter and receiver are corrected by forming weighted sums of the symbols decoded by the FIR filters for the current frame and frames received prior to and/or after the current frame. The weights are determined by training samples sent on the communication link prior to the actual transmissions.
    Type: Grant
    Filed: November 16, 1994
    Date of Patent: June 3, 1997
    Assignee: Aware, Inc.
    Inventors: Michael A. Tzannes, Stuart D. Sandberg
  • Patent number: 5631610
    Abstract: A communication system having a modulation system for transmitting a symbol set via a single side-band modulated carrier and a demodulation system for recovering the in-phase and quadrature signals from the modulated carrier. The modulation circuit receives M symbol values and generates M time domain samples for each of the in-phase and quadrature signals. The in-phase and quadrature signals can then be combined to generate the single side-band modulated carrier. The modulation circuit includes a transform circuit for generating M transformed symbol values by computing the transform of the M symbol values. A polyphase filter bank having 2M FIR filters is used to process the output of the transform circuit. Each filter has g taps, where g is an integer greater than 1. The outputs of the polyphase filters are combined with the outputs of the polyphase filters generated from a previously received set of M symbols to generate the M time-domain signal values of the in-phase signal.
    Type: Grant
    Filed: January 25, 1996
    Date of Patent: May 20, 1997
    Assignee: Aware, Inc.
    Inventors: Stuart Sandberg, Michael Tzannes
  • Patent number: 5621244
    Abstract: A fin assembly for dissipating heat generated by an integrated circuit chip mounted on a socket having a pair of positioning ears disposed at two opposite sides thereof is disclosed. The fin assembly includes a fin and a pair of substantially L-shaped fastening members. The fin includes a bottom surface for contacting an integrated circuit chip and an upper surface from which a plurality of ridges extend upward along a length direction thereof. Each two adjacent said ridges define a channel therebetween and in one of the channels, at least one of two associated adjacent ridges has one extension extending toward the other ridge thereby defining a compartment having two opposite ends. Each of the fastening members comprises a first limb and a second limb. The first limb has a springing section formed adjacent to a joint of the first and second limbs and a flexible biasing section projecting from a free end thereof and extending toward said second limb.
    Type: Grant
    Filed: August 16, 1995
    Date of Patent: April 15, 1997
    Inventor: Shih-jen Lin
  • Patent number: 5614438
    Abstract: A method for making an improved LSCO stack in the generation of platinum features on the surface of a substrate. The method provides an inexpensive means for depositing and etching LSCO material in the construction of small platinum features. The method comprises sputtering of the LSCO material and utilizing a photoresist mask to pattern the LSCO in accordance with the platinum features. The problems and expense associated with high-temperature deposition of LSCO on platinum and the etching thereof are overcome by sputtering the LSCO at room temperature.
    Type: Grant
    Filed: March 15, 1995
    Date of Patent: March 25, 1997
    Assignee: Radiant Technologies, Inc.
    Inventors: Joseph T. Evans, Jr., Leonard Boyer
  • Patent number: 5606642
    Abstract: An audio decompression system is disclosed. The corresponding compression system utilizes sub-band analysis filters whose bandwidths are chosen to approximate the critical bands of the human auditory system while avoiding the aliasing problems encountered in QMF filter banks designed to provide similar band splitting. One embodiment of the invention may be implemented on a digital computer. The computational requirements of the synthesis filters may be varied in response to the available computational resources of the computer, thereby allowing a single compressed audio signal to be played back in real time on a variety of platforms by trading off audio quality against available computational resources. Similar trade offs can be made in compressing an audio signal, thereby allowing a platform having limited computational capacity to compress a signal in real time.
    Type: Grant
    Filed: September 16, 1994
    Date of Patent: February 25, 1997
    Assignee: Aware, Inc.
    Inventors: John P. Stautner, William R. Morrell, Sriram Jayasimha
  • Patent number: 5596906
    Abstract: A combined accelerating/braking apparatus of a vehicle includes a substantially hook-shaped rod which includes a first end, a first elbow, a second elbow, a third elbow, a fourth elbow, and a second end, where the fourth elbow is pivotally connected to a wall in the vehicle. A pedal is pivotally connected to the first elbow of the hook-shaped rod. A bracket which is secured to a wall of the vehicle includes a slot for detachable receiving the second elbow of the hook-shaped rod. A first torsion spring is biased between the pedal and a rod portion between the first elbow and the second elbow of the hook-shaped rod for providing a recovery tension when the pedal is pivotally depressed by a driver's foot sole with respect to the first elbow of the hook-shaped rod.
    Type: Grant
    Filed: November 2, 1995
    Date of Patent: January 28, 1997
    Assignee: Sam Lin
    Inventor: Sam Lin
  • Patent number: 5593914
    Abstract: A method for fabricating an integrated circuit having at least one integrated circuit component fabricated in a silicon substrate and a second device that is to be fabricated on a silicon oxide layer that covers the integrated circuit component. The integrated circuit component has a terminal that is to be connected a corresponding terminal on the second device. The second device includes an electrode structure in contact with a dielectric component that includes a layer of ferroelectric material. In the method of the present invention, a boundary layer comprising non-conducting polysilicon is deposited over the silicon oxide layer. The electrode structure is then fabricated by depositing one or more layers over the boundary layer. The ferroelectric layer is then deposited over the electrode structure and etched to provide the dielectric component. The boundary layer is then removed utilizing an etchant that etches silicon oxide much slower than polysilicon.
    Type: Grant
    Filed: March 19, 1996
    Date of Patent: January 14, 1997
    Assignee: Radiant Technologies, Inc.
    Inventors: Joseph T. Evans, Jr., Leonard O. Boyer
  • Patent number: 5578846
    Abstract: An improved ferroelectric FET structure in which the ferroelectric layer is doped to reduce retention loss. A ferroelectric FET according to the present invention includes a semiconductor layer having first and second contacts thereon, the first and second contacts being separated from one another. The ferroelectric FET also includes a bottom electrode and a ferroelectric layer which is sandwiched between the semiconductor layer and the bottom electrode. The ferroelectric layer is constructed from a perovskite structure of the chemical composition ABO.sub.3 wherein the B site comprises first and second elements and a dopant element that has an oxidation state greater than +4 in sufficient concentration to impede shifts in the resistance measured between the first and second contacts with time. The ferroelectric FET structure preferably comprises Pb in the A-site. The first and second elements are preferably Zr and Ti, respectively.
    Type: Grant
    Filed: March 17, 1995
    Date of Patent: November 26, 1996
    Inventors: Joseph T. Evans, Jr., William L. Warren, Bruce A. Tuttle
  • Patent number: 5497398
    Abstract: A multi-carrier data transmission system utilizing lapped transforms. Information to be transmitted is divided into a plurality of channels that are coded using a transform that places information into narrow bandwidth channels. The system makes use of the superior properties of filter banks constructed with narrow-band lapped transforms to provide improved signal isolation between the data channels. A new form of lapped transformation that provides both narrow-band filtering and phase information is described. The transform utilizes two components to provide information on phase changes induced by errors on the communication link. The improved transform provides a means for correcting for phase shifts that occur on the communication link. The system has superior burst noise immunity compared to systems based on FFT's.
    Type: Grant
    Filed: August 12, 1993
    Date of Patent: March 5, 1996
    Assignee: Aware, Inc.
    Inventors: Michael A. Tzannes, Marcos C. Tzannes
  • Patent number: 5477784
    Abstract: A novel apparatus and method for printing on polymer film while electrically polarizing the film or, in the case where the film has been polarized prior to printing, maintaining the film's electrostatic charge. The apparatus is incorporated into a printer and includes an ink applicator which applies the ink according to selected designs and colors and a heater for drying the ink. The improvement in the apparatus comprises a charging station which forms an electrostatic charge on the printed polymer film, immediately after the polymer film passes through the ink curing station. The method of printing on polymer film comprises applying a selected pattern of ink to the polymer film, heating the polymer film to a sufficient temperature to dry the ink of said pattern and to render the film electrically polarizable, and generating a net surface charge on the film.
    Type: Grant
    Filed: June 13, 1994
    Date of Patent: December 26, 1995
    Assignee: Permacharge Corporation
    Inventor: Jack E. Floegel
  • Patent number: 5453347
    Abstract: A ferroelectric capacitor and method for making the same are disclosed. The ferroelectric capacitor may be constructed on a silicon substrate such as SiO.sub.2 or Si.sub.3 N.sub.4. The ferroelectric capacitor includes a bottom electrode, a layer of ferroelectric material, and a top electrode. The bottom electrode is constructed from a layer of platinum which is bonded to the silicon substrate by a layer of metallic oxide. The metallic oxide does not diffuse into the platinum; hence, a thinner layer of platinum may be utilized for the electrode. This reduces the vertical height of the capacitor and other problems associated with diffusion of the layer used to bond the bottom electrode to the substrate surface.
    Type: Grant
    Filed: June 7, 1994
    Date of Patent: September 26, 1995
    Assignee: Radiant Technologies
    Inventors: Jeff A. Bullington, Carl E. Montross, Jr., Joseph T. Evans, Jr.
  • Patent number: 5440173
    Abstract: A method for connecting a silicon substrate to an electrical component via a platinum conductor. The resulting structure may be heated in the presence of oxygen to temperatures in excess of 800.degree. C. without destroying the electrical connection between the silicon substrate and components connected to the platinum conductor. The present invention utilizes a TiN or TiW buffer layer to connect the platinum conductor to the silicon substrate. The buffer layer is deposited as a single crystal on the silicon substrate. The platinum layer is then deposited on the buffer layer. The region of the platinum layer in contact with the buffer layer is also a single crystal.
    Type: Grant
    Filed: September 17, 1993
    Date of Patent: August 8, 1995
    Assignee: Radiant Technologies
    Inventors: Joseph T. Evans, Jr., Jeff A. Bullington
  • Patent number: D359316
    Type: Grant
    Filed: January 12, 1994
    Date of Patent: June 13, 1995
    Inventor: Ming T. Huang
  • Patent number: D359317
    Type: Grant
    Filed: January 12, 1994
    Date of Patent: June 13, 1995
    Inventor: Ming T. Huang
  • Patent number: D359318
    Type: Grant
    Filed: January 12, 1994
    Date of Patent: June 13, 1995
    Inventor: Ming T. Huang
  • Patent number: D362034
    Type: Grant
    Filed: January 12, 1994
    Date of Patent: September 5, 1995
    Inventor: Ming T. Huang
  • Patent number: D362153
    Type: Grant
    Filed: January 5, 1994
    Date of Patent: September 12, 1995
    Inventor: William Home
  • Patent number: D372561
    Type: Grant
    Filed: May 4, 1994
    Date of Patent: August 6, 1996
    Inventor: Yen-Hsun Lai