Abstract: Methods and apparatuses for synchronizing basestations in a cellular network. One exemplary method performs time synchronization between at least two basestations, a first basestation and a second basestation, of a cellular communication system. In this exemplary method, a first time-of-day and a first geographical location of a first mobile cellular receiver station (MS) are determined from a first satellite positioning system (SPS) receiver which is co-located with the first MS, and the first time-of-day and first location are transmitted by the first MS to a first basestation which determines a time-of-day of the first basestation from the first time-of-day and first location and from a known location of the first basestation.

Abstract: A bi-directional vector rotator that can be used to provide outputs having phases that are rotated in clockwise and counter clockwise directions relative to that of the input signal. The bi-directional vector rotator includes a product term generator that receives a complex input and a complex carrier signal and generates product terms. Combiners then selectively combine the product terms to generate the outputs. By sharing the same product term generator for both clockwise and counter clockwise phase rotations, the bi-directional vector rotator can be implemented using less circuitry than that for a conventional design employing two uni-directional vector rotators. Moreover, only one complex carrier signal is needed by the bi-directional vector rotator instead of two for the conventional design. Further simplification in the design of the bi-directional vector rotator can be achieved by selecting the proper sampling rate for the complex input.

Abstract: A phase lock loop apparatus and method is disclosed. A typical apparatus includes a demodulator receiving a phase error signal from a comparator at a chip rate and providing a phase error update over a symbol period from the phase error signal wherein the chip rate is higher than the symbol rate. A phase discriminator produces a phase error output at the symbol rate from the phase error update based upon a signal modulation type. A loop filter produces one or more phase estimate parameters at a symbol rate from the phase error output and a numerically controlled oscillator (NCO) extrapolates a phase reference at a chip rate from the one or more phase estimate parameters at a symbol rate. The comparator produces the phase error signal to the demodulator based upon the phase reference and an incoming signal.

Abstract: A wireless communication device performance, such as standby time, is improved by adaptively allocating surplus system resources to change quick paging channel parameters at the system, such a system being for example, a base station. Adaptively adjusting the quick paging channel parameters allows available base station resources to be allocated to the quick paging channel, thereby enabling the wireless communication device to demodulate the quick paging channel more reliably. Parameters such as the number of quick paging channels, the data rate used by the paging channel, and the quick paging channel transmit power level are weighed and adjusted.

Abstract: A quick paging channel (QPCH) is used to receive paging indicators that indicate that a wireless communication device (WCD) has a message on a paging channel relating to, for example, an incoming call to the WCD. When the condition of the quick paging channel is too low to receive paging indicators reliably, the quick paging channel is disabled to avoid false alarms, and the slotted paging channel is used to receive paging messages without monitoring the QPCH. When the QPCH signal is strong, the probability of false alarms is lower, and the quick paging channel is enabled. By using the quick paging channel to receive paging indicators only when the QPCH signal is strong, the wireless communication device can remain in a sleep state for greater periods of time as compared with the use of a slotted paging channel. As a result, standby time may be significantly improved.

Abstract: A closed-loop, multimode, mixed-domain linear prediction (MDLP) speech coder includes a high-rate, time-domain coding mode, a low-rate, frequency-domain coding mode, and a closed-loop mode-selection mechanism for selecting a coding mode for the coder based upon the speech content of frames input to the coder. Transition speech (i.e., from unvoiced speech to voiced speech, or vice versa) frames are encoded with the high-rate, time-domain coding mode, which may be a CELP coding mode. Voiced speech frames are encoded with the low-rate, frequency-domain coding mode, which may be a harmonic coding mode. Phase parameters are not encoded by the frequency-domain coding mode, and are instead modeled in accordance with, e.g., a quadratic phase model. For each speech frame encoded with the frequency-domain coding mode, the initial phase value is taken to be the initial phase value of the immediately preceding speech frame encoded with the frequency-domain coding mode.

Abstract: A system and method for performing the digital receive processing for multiple signals received over the same RF band is described. In a preferred embodiment of the invention, digital RF samples are stored in a queue which is accessed by a searcher and demodulator. The searcher and demodulator are preferably located on the same integrated circuit along with the queue. The demodulator demodulates a set of reverse link signals stored within the queue where each reverse link signal is received with at a particular time offset and processed using a particular channel code. The searcher periodically searches for reverse link signals not being processed by the demodulator, and for access requests transmitted via the access channel. The searcher preferably searches during the worthy power control groups of each reverse link signal, which corresponds to the two of sixteen power control groups transmitted during, an eighth rate frame.

Abstract: Techniques to process data sporadically transmitted at designated times in a wireless communication system, such as paging indicator (PI) bits on the quick paging channel in cdma2000. These techniques support a sleep cycle that may start at virtually anytime and having a sleep duration selected based on a fine time increment. The increment is selected such that the finger processors and symbol combiner of a rake receiver may be easily moved to the proper positions upon waking up from a sleep. Techniques are also provided to align the symbol combiner timing to that of a particular multipath in the received signal, if necessary. With these techniques, a terminal may perform a sleep between a pair of assigned PI bits and may wake up and process a single PI bit.

Abstract: A wireless communication device (100) may include a transmitter (108), a memory (104), an analog-to-digital converter (128), an audio playback system (124) and other features. A dynamic range controller (130) selectively generates control signals to adjust, at least in part, the operational dynamic range of the analog-to-digital converter (128) for analog signals received by the a transmitter (108) or stored in the memory (104). The selection of dynamic range is based on identifying a characteristic. In one embodiment, the control signals are used to selectively operate the analog-to-digital converter (128) at a particular dynamic range based on a sampling rate set by the remote location or by the user.

Abstract: Techniques to efficiently process paging channels in an asynchronous wireless communication system. In one aspect, if the base stations are not synchronized with each other and a remote terminal's designated page time is different from base station to base station, the remote terminal can wake up based on the earliest base station in a reacquisition search list that includes candidate base stations to which the remote terminal may be handed off. In another aspect, the criteria to select base stations for evaluation as reacquisition targets may be based on the received power of the base stations as well as their timing, both of which may be made relative to that of a preferred base station. In yet another aspect, the remote terminal may wake up multiple times in a particular paging cycle (i.e., a frame cycle or a DRX cycle) if there are one or more candidates base station to which the remote terminal may be handed off.

Abstract: A wireless communication device and a method for transmitting and receiving at least one frame between a terminal device, connected to the wireless communication device, and an interworking function. Selected ones of a plurality of corresponding configuration options of a first and a second instance of a communication protocol, executing on the wireless communication device, are checked to determine whether they are equal. If the selected ones of the corresponding configuration options are equal, all but certain ones of a plurality of packets may be passed through the wireless communication device without unframing and reframing the communication protocol frames encapsulating the packets.

Abstract: A receiver unit for use in a CDMA system and including a channel processor, a buffer, and a data processor. The channel processor processes samples for one or more physical channels for each time interval to provide symbols. The buffer is operated as a number of memory banks. Each memory bank is associated with a respective time interval and stores symbols associated with that time interval. The data processor retrieves symbols for a particular “traffic” from one or more memory banks and processes the retrieved symbols. For the W-CDMA system, each traffic includes one or more radio frames for a particular transmission time interval. The receiver unit typically further includes a controller that directs the storage and retrieval of symbols to and from the memory banks and a decoder that decodes symbols processed by the data processor.

Abstract: The battery charging process monitors the battery charging pockets waiting for an indication that a battery or a phone-battery combination has been inserted into their respective pockets. The first battery that is inserted is the high priority battery and is charged first while any subsequent battery inserted into a charging pocket has no power applied until the high priority battery is charged. If the phone enters a call while in the charger, it becomes the high priority battery if it was not already. In this case, power is removed from the individual battery and applied to the phone-battery combination until the call has been completed. At this point, the process returns the high priority status to the battery that had it prior to the call interrupt.

Abstract: A method and apparatus for improving the transmission of an information signal having message information. A received information signal is formed from an information signal transmitted through an information channel. The received information signal has signal noise. The message information is removed from the received information signal to provide a symbol sequence that is then applied to a first filter to provide a first filtered signal. The power of the first filtered signal is determined and applied to a second filter to provide a second filtered signal representative of the signal noise of the received information signal.

Abstract: A digital signal processor (DSP) employs a variable-length instruction set. A portion of the variable-length instructions may be stored in adjacent locations within memory space with the beginning and ending of instructions occurring across memory word boundaries. The instructions may contain variable numbers of instruction fragments. Each instruction fragment causes a particular operation, or operations, to be performed allowing multiple operations during each clock cycle. The DSP includes multiple data buses, and in particular three data buses. The DSP may also use a register bank that has registers accessible by at least two processing units, allowing multiple operations to be performed on a particular set of data by the multiple processing units, without reading and writing the data to and from a memory. an instruction fetch unit that receives instructions of variable length stored in an instruction memory. An instruction memory may advantageously be separate from the three data memories.

Abstract: Circuitry that generates an interface signal between a first and a second integrated circuit (IC). The circuitry includes a reference circuit that provides a reference signal, an interface circuit, and a circuit element. The interface circuit is implemented on the first IC, operatively couples to the reference circuit, receives the reference signal and a data input, and generates the interface signal. The circuit element is implemented on the second IC, operatively couples to the control circuit, receives the interface signal, and provides an output signal. The reference signal can be a voltage or a current signal, and can be generated in the first or second IC. The interface circuit can be implemented with a current mirror coupled to a switch array, and can be oversampled to ease the filtering requirement. The interface signal can be a differential current signal having multiple (e.g., four, eight, or more) bits of resolution. The circuit element can be, for example, a VGA, a modulator, or other circuits.

Abstract: A printed conductive mesh dipole antenna, and a method of use of the antenna. The printed dipole antenna includes a dielectric substrate 12 and a conductive mesh 14 formed of a plurality of symmetric shapes 18 printed on the dielectric substrate. Each of the symmetric shapes is coupled to at least one other of the shapes, and placed periodically on the dielectric substrate proximate to at least one other of the shapes. The periodic placement of the shapes forms a symmetric pattern of a conductive mesh on the dielectric substrate. The antenna is preferably part of a cellular or cordless telephone handset.

Abstract: A method and apparatus for frequency tracking is described. The present invention provides a tracking mechanism for removing the effects of error due to frequency offset as well as compensation for frequency error due to doppler in a plurality of multipath signals. Each finger of a RAKE receiver utilizing the present invention will compute a frequency error for that finger. The weighted average of all of these frequency errors is calculated and filtered to provide a control signal for varying the frequency of IF and RF frequency synthesizers, accounting for the common frequency offset seen at each finger. Additionally, each finger is equipped with a rotator for providing frequency adjustment specific to that finger. The frequency of each finger is adjusted through feedback of the frequency error for that finger.

Abstract: A multi-stage circuit that includes a number of stages, with at least one stage being of a first type and at least one stage being of a second type. Each stage receives either a circuit input signal or an output signal from a preceding stage, processes (e.g., filters) the received signal, and provides a respective output signal. Each first type (or second type) stage operates based on one or more clock signals having a frequency of fS (or fS/N), where fS is the sampling frequency and N is an integer greater than one. Each first type stage may be implemented with a correlated double-sampling circuit, an auto-zeroing circuit, or a chopper stabilization circuit. Each second type stage may be implemented with a multi-sampling (i.e., double-sampling or higher order sampling) circuit. The multi-stage circuit may be designed to implement a lowpass filter, a &Dgr;&Sgr; ADC, or some other circuit.

Abstract: The invention is a digital signal processor architecture that is designed to speed up frequently-used signal processing computations, such as FIR filters, correlations, FFTs, and DFTs. The architecture uses a coupled dual-MAC architecture (MAC1), (MAC2) and attaches a dual-MAC coprocessor (MAC3), (MAC4) onto it in a unique way to achieve a significant increase in processing capability.