Abstract: A system is disclosed for use in a wireless communication system to provide an estimated pilot signal. The system includes a receiver and a front-end processing and despreading component in electronic communication with the receiver for despreading a CDMA signal. A pilot estimation component is in electronic communication with the front-end processing and despreading component for estimating an original pilot signal using a Wiener filter to produce a pilot estimate. A demodulation component is in electronic communication with the pilot estimation component and the front-end processing and despreading component for providing demodulated data symbols. The Wiener filter is configured by an offline filter determination process that calculates parameters of the Wiener filter to minimize the mean-square error.

Abstract: Techniques for improved handoff searching in asynchronous systems, such as W-CDMA, are disclosed. In one aspect, a two-step search procedure is used when a list of neighbor codes is known. In the first step, a received signal is correlated with a slot timing code to locate on or more pilots and the slot boundaries associated therewith. In the second step, the received signal is correlated with each of the list of codes at the slot boundaries identified with pilots in the first step to identify the pilot code and the frame timing associated with each pilot. Various other aspects of the invention are also presented. These aspects have the benefit of decreasing search time, which translates to increased acquisition speed, higher quality signal transmission, increased data throughput, decreased power, and improved overall system capacity.

Abstract: A received symbol stream is oversampled and correlated with a known sync word to determine the correlation properties of the oversampled signal with a known sync word. A linear filter, such as a moving average window filter, is convolved with the correlation signal to generate a convolution signal. Once the convolution signal has reached a predetermined threshold, it is scanned over a predetermined window of oversamples. If the convolution signal exceeds the threshold for the window of oversamples, the sync word has been found and the symbol stream is down-sampled at intervals that depend on the data rate of the symbol stream. This down-sampling process may be done by picking the center oversample corresponding to each information symbol given the timing alignment, or by doing a majority vote over a multiple number of samples centered around the center oversample.

Abstract: A programmable IF bandwidth is achieved in either a transmitter or receiver using fixed bandwidth filters. A minimum of two IF frequencies are used. A fixed bandwidth filter that is equal to or greater than the desired IF bandwidth is used at each IF. The Local Oscillators (LO's) are tuned to frequency convert the desired signal to a frequency that is offset towards one bandedge of the fixed IF filters. A first mixer and LO relocates the desired signal to one end of a first fixed IF filter. A second mixer and LO relocates the filtered signal to the opposite end of a second IF filter. The desired bandwidth is obtained as the sum of the frequency offset of the desired signal from the nearest bandedge of the first IF filter and the frequency offset of the desired signal from the opposite bandedge of the second IF filter.

Abstract: A deskew buffer 410 arrangement in a CDMA receiver allows for accurate combining of symbols from a plurality of demodulator fingers, 402 and 404, without any symbol losses when the data rate is changed. A single deskew buffer 410 is coupled to a plurality of demodulator fingers, each of which demodulate an assigned multipath. The symbols are written into the deskew buffer 410 according to a PN count value modified by a predetermined bit pattern. The demodulator finger is able to demodulate a plurality of data rates corresponding to a plurality of Walsh lengths. Each data rate is assigned a corresponding deskew index. The PN count value represents an address within the deskew buffer 410. The lower bits of the PN count, where the number of bits corresponds to the deskew index, are truncated and replaced with the predetermined bit pattern. In one embodiment the predetermined bit pattern is all ones.

Abstract: Techniques for fast-slewing of multi-sequence based PN generators are disclosed. In one aspect, LFSR states and reference counter states are loaded into their corresponding components such that consistency among the states is maintained. In another aspect, various methods for determining LFSR states and counter values in response to a desired offset in a unique code are disclosed. Among these methods are matrix-multiplication of LFSR states and generation of advanced LFSR states through masking techniques. Other methods are also presented. These aspects have the benefit of decreasing slew time in an efficient manner, which translates to increased acquisition speed, faster finger lock on multi-path signals, increased data throughput, decreased power, and improved overall system capacity.

Abstract: A technique for activating an active-mode high frequency clock following a sleep period for use within a mobile station wherein selected components of the mobile station operate using a low power, low frequency sleep-mode clock during the sleep period and the faster high frequency active-mode clock during non-sleep periods. In one embodiment, the technique is implemented by a device having a wake-up estimation unit for estimating a wake up time using the sleep-mode clock and a frequency drift compensation unit for compensating for any error in the estimated wake up time caused by frequency drift in the sleep-mode clock. An off-set time compensation unit is also provided for compensating for a lack of precision in the low frequency sleep-mode clock resulting in a possible error in the estimated wake up time. The lack of precision can result in an initial timing off-set error at the beginning of the sleep period and an final timing off-set error at the end of the sleep period.

Abstract: Novel techniques are disclosed for adjusting a power control setpoint to compensate for imperfect signal detection in a communication channel capable of discontinuous transmission (DTX). The power control setpoint is compensated for false detections by adjusting the power control setpoint by a dynamically determined setpoint back off amount upon detection of a Good frame. The amount of the setpoint back off is a function of the measured signal quality of the detected Good frame and the number of Erasure indications received immediately preceding the Good frame indication.

Abstract: An apparatus, such as a subscriber unit or a base station within a spread spectrum communication system, may add one or more additional “virtual” paths to a list of candidate paths when assigning demodulation elements. These “virtual” paths are added as candidate paths even though a corresponding peak was not necessarily detected within a received spread spectrum system. The list of paths may include a first path having a time offset approximately equal to a time offset for one of the demodulation elements, and the virtual path having a short time separation from the first path. The time separation between the paths may be, for example, less than 2 chips.

Abstract: A process and apparatus for timing occurs in a timing discriminator that is part of a time tracking loop. The timing discrimination that prevents Rake finger merging. The process for timing discrimination discriminator is coupled to an input signal. The process begins by gathering early, ontime, and late samples of the input signal. Early, Ontime, and Late parameters are then derived in response to the samples. The timing discriminator output is generated in response to a predetermined relationship between the Early, Ontime, and Late parameters. The process and apparatus enables Rake fingers to freely track their paths. This improves the receiver performance.

Abstract: A wireless telephone (200) has a power supply (102), which supplies power to a counter (104), a processor (106), a wireless modem (108), and a transceiver (110). The transceiver (110) communicates with the outside world through an antenna (112). The processor exchanges signals with a clock-calendar (114). When the telephone is in power-conservation mode, the processor opens a switch (216) between the power supply and the transceiver and modem. A second switch (218) is interposed between the power supply (102) and the processor (106), and is under the control of the counter (204). Thus, in power-conservation mode, only the counter draws power. Power-conservation mode (302) may be exited by external command (304), a signal from the clock-calendar (306), or an attempt to place an outgoing call (308).

Abstract: A system and method for reducing power consumed by an integrated electronic device. The device includes a personal data assistant (PDA) unit and a wireless telephone integrated in a common housing. A common display on the housing is used for displaying messages from both the PDA and the wireless telephone to a user. A controller, coupled to the wireless telephone, places the wireless telephone in a power-off state after expiration of a predetermined period of time following cessation of voice traffic activity on the wireless telephone. The controller switches the wireless telephone from the power-off state to a power-on state if, during operation in the power-off state, a user begins an attempt to place an outgoing call with the wireless telephone. The wireless telephone is unable to receive an incoming call when the wireless telephone is in the power-off state.

Abstract: A process of designing a high frequency circuit in multiple domains, such as prototype and production domains, is described. The process begins by obtaining one or more parameters for each domain, such as physical parameters defining, for each layer of the substrate, the layer and the material in the layer, or electrical parameters defining, for each layer, transmission media on or within the layer. Once the parameters for the first and second domains have been obtained, the process proceeds to deriving, responsive to one or more of these parameters, interchangeable implementations in the first and second domains of the one or more circuit elements.

Abstract: A wireless communication device having an accessory port and a processor to detect when an external accessory is coupled to the accessory port, and then identify the type of external accessory. A data line connects the external accessory to the wireless communication device, the data line being a portion of a pulse code modulation (PCM) port in the accessory port. The processor senses activity on this data line, including a signal transmitted by the external accessory indicative of when the external accessory is coupled to the wireless communication device. The processor further senses identification data associated with the external accessory, with the identification data including an identification code of the external accessory. The processor generates a clock signal, and the external accessory transmits the identification data to the wireless communication device over the data line in response to the clock signal. In this fashion, the processor repeatedly senses the transmitted identification data.

Abstract: Methods and apparatuses for processing Satellite Positioning System (SPS) signals. In one exemplary method, a first set of frequency coefficients, which corresponds to a first Doppler frequency of an SPS signal, is determined, and said SPS signal is processed in a matched filter with the first set of frequency coefficients during a first window of time. A second set of frequency coefficients, which corresponds to a second Doppler frequency of the SPS signal, is determined, and the SPS signal is processed in the matched filter with the second set of frequency coefficients during a second window of time, where the first and second windows of time occur within a period of time which is not greater than one SPS frame period.

Abstract: A system for efficiently accommodating an authentication protocol in a communications system. The system includes a first mechanism for establishing a first communications interface between a first device and a second device and for establishing a second communications interface between the second device and a third device. A second mechanism selectively relays authentication signals received by the second device between the first device and the third device. A third mechanism employs the third device and the second mechanism to authenticate the first device via the first communications link and the second communications link.

Abstract: Transmitter architectures for a communications system having improved performance over conventional transmitter architectures. The improvements include a combination of the following: faster response time for the control signals, improved linearity, reduced interference, reduced power consumption, lower circuit complexity, and lower costs. For a cellular application, these improvements can lead to increased system capacity, smaller telephone size, increased talk and standby times, and greater acceptance of the product. Circuitry is provided to speed up the response time of a control signal. The control loop for various elements in the transmit signal path are integrated. A gain control mechanism allows for accurate adjustment of the output transmit power level. Control mechanisms are provided to power down the power amplifier, or the entire transmit signal path, when not needed.

Abstract: A radio frequency amplifier with improved linearity and minimal third-order distortion. The amplifier includes a first transistor having first, second and third terminals with the first terminal being an input terminal and the second terminal being the output terminal and the third terminal being a common terminal. A linearization circuit is included having first and second terminals. The first terminal is connected to the common terminal of the transistor and the second terminal is connected to the input terminal of the transistor. In a specific embodiment, the linearization circuit is implemented as a unity gain buffer with an input terminal connected to the common terminal of the transistor and an output terminal connected to the input terminal of the transistor.

Abstract: Microprocessor resources controlling a searching process and other functions in a wireless remote unit are allocated to maintain the link while allowing sufficient microprocessor resources to be allocated to other remote unit functions. A current search rate limit is increase if the microprocessor is not overloaded and the current search rate limit is less than an higher upper limit. The current search rate limit is decreased if the microprocessor is overloaded and the current search rate limit is greater than a lower upper limit. The priority of other tasks is adjusted if the microprocessor is overloaded and the current search rate limit is equal to the lower upper limit.

Abstract: Techniques to linearly (in dB) adjust the gains of variable gain elements (i.e., variable gain amplifiers or VGAs) in a receiver or transmitter. An input control signal is provided to a conditioning circuit that conditions the control signal to achieve various signal characteristics. The input control signal is limited to within a particular range of values, temperature compensated, scaled (or normalized) to the supply voltages, shifted with an offset, or manipulated in other fashions. The conditioned signal is then provided to an input stage of a linearizer that generates a set of exponentially related signals. This is achieved using, for example, a differential amplifier in which the conditioned control signal is applied to the inputs of the differential amplifier and the collector currents from the differential amplifier comprises the exponentially related signals. An output stage within the linearizer receives the exponentially related signals and, in response, generates a gain control signal.