Abstract: An edge ring for use in batch thermal processing of wafers supported on a vertical tower within a furnace. The edge rings are have a width approximately overlapping the periphery of the wafers and are detachably supported on the towers equally spaced between the wafer to reduce thermal edge effects. The edge rings have may have internal or external recesses to interlock with structures on or adjacent the fingers of the tower legs supporting the wafers or one or more steps formed on the lateral sides of the edge ring may slide over and then fall below a locking ledge associated with the support fingers. Preferably, the tower and edge ring and other parts of the furnace adjacent the hot zone are composed of silicon.

Abstract: A method of joining two silicon members and the bonded assembly in which the members are assembled to place them into alignment across a seam. Silicon derived from silicon powder is plasma sprayed across the seam and forms a silicon coating that bonds to the silicon members on each side of the seam to thereby bond together the members. The plasma sprayed silicon may seal an underlying bond of spin-on glass or may act as the primary bond, in which case through mortise holes are preferred so that two layers of silicon are plasma sprayed on opposing ends of the mortise holes. A silicon wafer tower or boat may be the final product. The method may be used to form a ring or a tube from segments or staves arranged in a circle. Plasma spraying silicon may repair a crack or chip formed in a silicon member.

Abstract: A silicon shelf tower for hatch thermal processing of silicon wafers in a vertical furnace. The tower includes at least three silicon legs joined to bases and having a vertical arrangement of slots. Silicon shelves are detachably loaded by sliding them through the slots in the side legs and into the slot of the back leg. A interlocking mechanism detachably locks the shelves to the back leg while the slots in the two side legs laterally constrains the shelves. The shelves include cutouts to allow a robot paddle to load and unload wafers to the shelves. Circular holes in the shelves relieve stress and prevent wafer sticking Preferably, the shelves are formed from randomly oriented polycrystalline silicon. The shelves and towers can alternatively be made of other materials such as quartz and silicon carbide.

Abstract: A method of joining two silicon members, the adhesive used for the method, and the joined product, especially a silicon tower for supporting multiple silicon wafers. A flowable adhesive is prepared comprising silicon particles of size less than 100 ?m and preferably less than 100 nm and a silica bridging agent, such as a spin-on glass. Nano-silicon crystallites of about 20 nm size may be formed by CVD. Larger particles may be milled from virgin polysilicon. If necessary, a retardant such as a heavy, preferably water-insoluble alcohol such as terpineol is added to slow setting of the adhesive at room temperature. The mixture is applied to the joining areas. The silicon parts are assembled and annealed at a temperature sufficient to link the silica, preferably at 900° C. to 1100° C. for nano-silicon but higher for milled silicon.

Abstract: A target assembly including a plurality of target tiles bonded to a backing plate by adhesive, for example of indium or conductive polymer, filled into recesses in the backing plate formed beneath each of the target tiles. A sole peripheral recess formed as a rectangular close band may be formed inside the tile periphery. Additional recesses may be formed inside the peripheral recess, preferably symmetrically arranged about perpendicular bisectors of rectangular tiles. The depth and width of the recesses may be varied to control the amount of stress and the stress direction.

Abstract: Non-production wafers of polycrystalline silicon are placed in non-production slots of a support tower for thermal processing monocrystalline silicon wafers. They may have thicknesses of 0.725 to 2 mm and be roughened on both sides. Nitride may be grown on the non-production wafers to a thickness of over 2 ?m without flaking. The polycrystalline silicon is preferably randomly oriented Czochralski polysilicon grown using a randomly oriented seed, for example, CVD grown silicon. Both sides are ground to introduce sub-surface damage and then oxidized and etch cleaned. An all-silicon hot zone of a thermal furnace, for example, depositing a nitride layer, may include a silicon support tower placed within a silicon liner and supporting the polysilicon non-production wafers with silicon injector tube providing processing gas within the liner.

Abstract: A method of reactively sputtering from a metallic zinc target a transparent conductive oxide electrode of zinc oxide from a metallic zinc in a silicon photo diode device and the resultant product, such as a solar cell. The electrode in deposited on a transparent substrate in at least two steps. The oxygen partial pressure is reduced in the first step to produce an oxygen-deficient ZnO layer, which is highly conductive and has a textured surface, and is increased in the second step to produce a more stoichiometric ZnO, which has a refractive index more closely matched to the overlying silicon device. The second layer is substantially thinner than the first so the surface texture is transferred across it and the overall sheet resistance of the stack structure is reduced.

Abstract: A sputtering target, particularly for sputter depositing a target material onto large rectangular panels, in which a plurality of target tiles are bonded to a backing plate in a two-dimensional non-rectangular array such that the tiles meet at interstices of no more than three tile, thus locking the tiles against excessive misalignment during bonding. The rectangular tiles may be arranged in staggered rows or in a herringbone or zig-zag pattern. Hexagonal and triangular tiles also provide many of the advantages of the invention.

Abstract: A quadruple electromagnetic coil array coaxially arranged in a rectangular array about a chamber axis outside the sidewalls of a plasma sputter reactor, preferably in back of an RF coil within the chamber. The coil currents can be separately controlled to produce different magnetic field distributions, for example, between a sputter deposition mode in which the sputter target is powered to sputter target material onto a wafer and a sputter etch mode in which the RF coil supports the gas sputtering the wafer. The coil array may include a tubular magnetic core, particularly useful for suppressing stray fields. A water cooling coil may be wrapped around the coil array to cool all the coils. The electromagnets can be powered in different relative polarities in a multi-step process.

Abstract: A target assembly composed of multiple target tiles bonded in an array to a backing plate of another material. The edges of the tile within the interior of the array are formed with complementary beveled edges to form slanted gaps between the tiles. The gaps may slant at an angle of between 10° and 55°, preferably 15° and 45°, with respect to the target normal. The facing sides of tiles may be roughened by bead blasting, for both perpendicular and sloping gaps. The area of the backing plate underlying the gap may be roughened or may coated or overlain with a region of the material of the target, for both perpendicular and sloping gaps.

Abstract: An integrated sputtering method and reactor for copper or aluminum seed layers in which a plasma sputter reactor initially deposits a thin conformal layer onto a substrate including a high-aspect ratio hole subject to the formation of overhangs. After the seed deposition, the same sputter reactor is used to sputter etch the substrate with energetic light ions, especially helium, having an energy sufficiently low that it selectively etches the metallization to the heavier underlying barrier layer, for example, copper over tantalum or aluminum over titanium. An RF inductive coil generates the plasma during the sputtering etching while the target power is turned off. A final copper flash step deposits copper over the bare barrier field region before copper is electrochemically plated to fill the hole. The invention also includes a simultaneous sputter deposition and sputter etch, and an energetic ion processing of the copper seed sidewall.

Abstract: An apparatus and method for sputter depositing a magnetic film on a substrate to produce a magnetic device such as magnetic recording heads for reading digital information from a storage medium. The apparatus of the invention includes a sputtering chamber containing a target and a substrate, and a magnet array disposed within the chamber to form a substantially parallel magnetic field at a surface of the substrate. The sputtering chamber reduces interference between the magnetron and the magnet array by providing a long throw distance and/or a grounded collimator. The magnet array is preferably a circular ring.

Abstract: An array of electrostatically tiltable mirrors are formed in a MEMS structure. A first SOI wafer is etched to form an array of tiltable plates in the silicon device layer joined to the remainder of the wafer through pairs of torsion beams. A second SOI wafer is etched to form cavities corresponding to the tiltable plates. A ceramic multi-chip module (MCM) carrier is formed with multiple layers of wiring and electrodes corresponding to the tiltable plates. The two SOI wafers including their handle layers are bonded together. The handle layer of the second SOI is removed, and the bonded wafers are diced into chips. Each chip is bonded to a respective MCM carrier. Thereafter, the handle layer of the first SOI wafer is removed to release the tiltable mirror plates and the torsion beams. Electronic control chips may be bonded to the MCM carrier.

Abstract: A microwave imaging microscope and associated probe, or a read head. The probe or the read head includes a sensor unit with three fixed electrodes, preferably a stimulating electrode surrounding a sensing electrode and isolated by a grounded electrode. Circuitry couples the stimulating electrode to the probe signal variably selected in the range of 100 MHz to 100 GHz and couples the sensing electrode to a signal processor detecting in-phase and out-of-phase components of the current or voltage across the sensing electrode and the grounded electrode. A mechanical positioner moves the probe vertically towards the sample and scans it across the sample. The probe may be formed by semiconductor processing methods on a silicon chip.

Abstract: A multi-track magnetron having a convolute shape and asymmetric about the target center about which it rotates. A plasma track is formed as a closed loop between opposed inner and outer magnetic poles, preferably as two or three radially arranged and spirally shaped counter-propagating tracks with respect to the target center and preferably passing over the rotation axis. The pole shape may be optimized to produce a cumulative track length distribution conforming to the function L=arn. After several iterations of computerized optimization, the pole shape may be tested for sputtering uniformity with different distributions of magnets in the fabricated pole pieces. If the uniformity remains unsatisfactory, the design iteration is repeated with a different n value, different number of tracks, or different pole widths. The optimization reduces azimuthal sidewall asymmetry and improves radial deposition uniformity.

Abstract: A small magnet assembly is scanned in a retrograde planetary or epicyclic path about the back of a target being plasma sputtered including an orbital rotation about the center axis of the target and a planetary rotation about another axis rotating about the target center axis. The magnet assembly passes through the target center, thus allowing full target coverage. A properly chosen ratio of the two rotations about respective axes produces a much slower magnet velocity near the target periphery than at the target center. A geared planetary mechanism includes a rotating drive plate, a fixed center gear, and an idler and a follower gear rotatably supported in the drive plane supporting a cantilevered magnet assembly on the side of the drive plate facing the target. A belted planetary mechanism includes a fixed center capstan, a follower pulley supporting the magnet assembly, and a belt wrapped around them.

Abstract: An electron energy analyzer including a curved electrostatic low-pass reflector and a high-pass electrostatic transmissive filter. The reflector comprises a curved grid, preferably ellipsoidal, and an absorber electrode placed in back of the curved grid with respect to the electron source and biased negatively to the curved grid to act as a reflective low-pass filter and a collimating optics for the reflected beam. The transmissive filter includes first and second flat grids extending across the collimated reflected beam. The second grid on the side of the first grid opposite the curved grid is biased negatively to the first grid and the absorber electrode. A field free region is created by applying the same bias to the curved grid, the first grid, and chamber sidewall sleeve. An electron detector detects all electrons passed by the second grid in an energy band in the overlap of the high-pass and low-pass bands.

Abstract: Tubular silicon members advantageously formed by extrusion from a silicon melt or by fixing together silicon staves in a barrel shape. A silicon-based wafer support tower is particularly useful for batch-mode thermal chemical vapor deposition and other high-temperature processes, especially reflow of silicate glass at above 1200° C. The surfaces of the silicon tower are bead blasted to introduce sub-surface damage, which produces pits and cracks in the surface, which anchor subsequently deposited layer of, for example, silicon nitride, thereby inhibiting peeling of the nitride film. Wafer support portions of the tower are preferably composed of virgin polysilicon. The invention can be applied to other silicon parts in a deposition or other substrate processing reactor, such as tubular sleeves and reactor walls. The tower parts are preferably pre-coated with silicon nitride or polysilicon prior to chemical vapor deposition of these materials, or with silicon nitride prior to reflow of silica.

Abstract: A plasma display panel including a low k dielectric layer. In one embodiment, the dielectric layer is comprises a fluorine-doped silicon oxide layer such as an SiOF layer. In another embodiment, the dielectric layer comprises a Black Diamond™ layer. In certain embodiments, a capping layer such as SiN or SiON is deposited over the dielectric layer.

Abstract: A rapid thermal processing (RTP) system including a transmission pyrometer monitoring the temperature dependent absorption of the silicon wafer for radiation from the RTP lamps at a reduced power level. A look-up table is created relating unnormalized values of photodetector photocurrents with wafer and radiant lamp temperatures. A calibrating step measures the photocurrent with known wafer and lamp temperatures and all photocurrents measured thereafter are accordingly normalized. The transmission pyrometer may be used for closed loop control for thermal treatments below 500° C. or used in the pre-heating phase for a higher temperature process including radiation pyrometry in closed loop control. The pre-heating temperature ramp rate may be controlled by measuring the initial ramp rate and readjusting the lamp power accordingly. Radiation and transmission pyrometers may be included in an integrated structure with a beam splitter dividing radiation from the wafer.