Patents Represented by Attorney Charles S. Guenzer
  • Patent number: 6839507
    Abstract: In a system for thermal processing of a semiconductor substrate, an RTP system employs a reflector plate which is highly reflective of radiation in a target wavelength range, and less reflective of radiation outside that target wavelength range. In one embodiment, the reflector plate has a highly reflective portion overlying a less reflective portion, wherein the highly reflective portion is highly reflective of radiation in the target wavelength range. As radiation emitted by the substrate is received on the reflector, the radiation in the target wavelength range is reflected, thereby facilitating measurement of the substrate temperature by the pyrometer(s), while radiation outside the target wavelength range is absorbed, thereby facilitating cooling of the substrate.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: January 4, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Bruce Adams, Aaron Hunter
  • Patent number: 6837975
    Abstract: A magnetron system for a sputtering target having an annular vault facing the wafer to be coated and having inner and outer sidewalls and a roof. A small magnetron is positioned over the roof. A first magnet assembly having a first magnet polarity along the target axis is positioned behind the inner sidewall. A second magnet assembly having an opposed second opposed magnetic polarity is disposed in back of the outer sidewall and has magnetic strength much greater than the first magnet assembly but its strength is asymmetrically distributed about the target axis. The second magnet assembly and the roof assembly are rotated together about the target axis. The rotating asymmetric sidewall magnet assembly may also be used with a hollow-cathode target, with or without a roof magnetron.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: January 4, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Wei D. Wang, Praburam Gopalraja
  • Patent number: 6838636
    Abstract: A method of welding two silicon workpieces (20, 22) together into one member without the formation of cracks along the weld. A first method passes current (34, 36) through one or both of the workpieces to heat them to between 600 and 900° C. Then an electric, laser, or plasma welder (38, 40) passes along the seam (24) between the workpieces to weld them together. A second method passing current (34) through a plate (60), preferably formed of silicon, which either supports the workpieces or is brought into contact with at least one of them, whereby the workpieces are preheated prior to the welding operation.
    Type: Grant
    Filed: June 18, 2003
    Date of Patent: January 4, 2005
    Assignee: Integrated Materials, Inc.
    Inventors: Raanan Y. Zehavi, Robert L. Davis, David B. Ackard, James W. Govorko
  • Patent number: 6825645
    Abstract: A non-resonant microwave imaging microscope and associated probe. The probe includes a sensor unit with two fixed electrodes, preferably a large outer electrode surrounding a small inner electrode which are approximately co-planar, thereby protecting the small inner electrode from an uneven topography. The outer electrode may be deposited on a conically shaped dielectric disk having a bore through which the inner electrode is placed. Non-resonant circuitry couples the inner electrode to the probe signal variably selected in the range of 10 MHz-50 GHz and to an amplifier whose output is coupled to a signal processor detector in-phase and out-of-phase components of the current or voltage across the two electrodes. A mechanical positioner moves the probe vertically towards the sample and scans it across the sample.
    Type: Grant
    Filed: October 7, 2002
    Date of Patent: November 30, 2004
    Assignee: Stanford University Office of Technology Licensing
    Inventors: Michael A. Kelly, Zhi-Xun Shen, Zhengyu Wang
  • Patent number: 6808747
    Abstract: A method of depositing boron carbide on an aluminum substrate, particularly useful for a plasma etch reactor having interior surfaces facing the plasma composed of boron carbide, preferably principally composed of B4C. Although in this application, the boron carbide may be a bulk sintered body, in the method of the invention it may be a layer of boron carbide coated on an aluminum chamber part. The boron carbide coating may be applied by thermal spraying, such as plasma spraying, by chemical vapor deposition, or by other layer forming technique such as a surface converting reaction. The boron carbide is highly resistant to high-density plasma etchants such as BCl3. The plasma sprayed coating is advantageously applied to only a portion of an anodized aluminum wall. The boron carbide may be sprayed over the exposed portion of an aluminum substrate over which the anodization has been removed.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: October 26, 2004
    Inventors: Hong Shih, Nianci Han
  • Patent number: 6810165
    Abstract: An optical cross connect, especially a wavelength cross connect, using free-space optics, a diffraction grating, and a micro electromechanical systems (MEMS) array of movable mirrors. A concentrator receives light from widely separated optical fibers and brings the beams together into a more closely spaced linear array. Free-space optics process all the beams. Front-end optics collimate the beams from the fibers and flatten their fields. The diffraction grating spectrally separates each beam into sub-beams. A long-focus lens focuses the sub-beams onto the 2-dimensional MEMS array. A fold mirror reflectively couples two such mirrors, whereby the switched signals propagate back through the same optics and are spectrally recombined onto the fibers. Other embodiments include white-color cross connects, multiple MEMS arrays, and parallel optics. Power dividers or wavelength interleavers can divide signals from the fibers, and multiple cross connects switch different wavelength groups.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: October 26, 2004
    Assignee: Movaz Networks, Inc.
    Inventors: John E. Golub, David A. Smith, Harry Presley, Zhuoyu Bao
  • Patent number: 6805466
    Abstract: A lamphead includes a monolithic member. A plurality of lamp receptacles and reflector cavities are formed in the monolithic member.
    Type: Grant
    Filed: June 16, 2000
    Date of Patent: October 19, 2004
    Assignee: Applied Materials, Inc.
    Inventor: Joseph M. Ranish
  • Patent number: 6803570
    Abstract: A vacuum window transmitting keV electrons and usable for high-pressure electron analysis such as XPS and AES in which the sample is positioned outside the UHV analyzer chamber, possibly in a controlled gas environment, relatively close to the window. The window includes a grid formed from a support layer and a thin window layer supported between the ribs and having a thickness preferably of 2 to 3 nm. The window and support layers may be deposited on a silicon wafer and the support layer is lithographically defined into the grid. The wafer is backside etched to expose the back of the grid and its supported window layer. Such a window enables compact and easily used electron analyzers and further allows control of the gas environment at the sample surface during analysis.
    Type: Grant
    Filed: July 11, 2003
    Date of Patent: October 12, 2004
    Inventors: Charles E. Bryson, III, Frank J. Grunthaner, Paula J. Grunthaner
  • Patent number: 6803546
    Abstract: A thermal processing method is described in which a temperature response of a substrate may be controlled during a heat-up phase or a cool-down phase, or during both phases. This reduces the thermal budget of the substrate and improves the quality and performance of devices formed on the substrate. In particular, by controlling the rate of heat transfer between the substrate and a thermal reservoir (e.g., a water-cooled reflector plate assembly), the temperature response of the substrate may be controlled during the thermal process. The rate of heat transfer may be changed by changing the thermal conductivity between the substrate and the thermal reservoir, by changing the emissivity of a surface of the thermal reservoir, or by changing the distance between the substrate and the thermal reservoir.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: October 12, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Ryan C Boas, Ajit Balakrishna, Benjamin Bierman, Brian L Haas, Dean Jennings, Wolfgang Aderhold, Sundar Ramamurthy, Abhilash Mayur
  • Patent number: 6803297
    Abstract: A method for activating implanted dopants in a semiconductor substrate to form shallow junctions comprises the steps of: maintaining gas pressure in the processing chamber at a level significantly lower than atmospheric pressure, providing a flow of a carrier gas into the processing chamber, subjecting the substrate to a temperature treatment process, and introducing oxygen into the processing chamber during all or part of the temperature treatment process.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: October 12, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Dean Jennings, Sairaju Tallavarjula, Randhir Thakur
  • Patent number: 6800213
    Abstract: An oxide etching recipe including a heavy hydrogen-free fluorocarbon having F/C ratios less than 2, preferably C4F6, an oxygen-containing gas such as O2 or CO, a lighter fluorocarbon or hydrofluorocarbon, and a noble diluent gas such as Ar or Xe. The amounts of the first three gases are chosen such that the ratio (F—H)/(C—O) is at least 1.5 and no more than 2. Alternatively, the gas mixture may include the heavy fluorocarbon, carbon tetrafluoride, and the diluent with the ratio of the first two chosen such the ratio F/C is between 1.5 and 2.
    Type: Grant
    Filed: June 7, 2002
    Date of Patent: October 5, 2004
    Inventors: Ji Ding, Hidehiro Kojiri, Yoshio Ishikawa, Keiji Horioka, Ruiping Wang, Robert W. Wu, Hoiman (Raymond) Hung
  • Patent number: 6797189
    Abstract: A plasma etching process, particularly useful for selectively etching oxide over a feature having a non-oxide composition, such as silicon nitride and especially when that feature has a corner that is prone to faceting during the oxide etch. A primary fluorine-containing gas, preferably hexafluorobutadiene (C4F6), is combined with a significantly larger amount of the diluent gas xenon (Xe) enhance nitride selectivity without the occurrence of etch stop. The chemistry is also useful for etching oxides in which holes and corners have already been formed, for which the use of xenon also reduces faceting of the oxide. For this use, the relative amount of xenon need not be so high. The invention may be used with related heavy fluorocarbons and other fluorine-based etching gases.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: September 28, 2004
    Inventors: Hoiman (Raymond) Hung, Joseph P. Caulfield, Hongqing Shan, Michael Rice, Kenneth S Collins, Chunshi Cui
  • Patent number: 6798941
    Abstract: A multi-wavelength or white-light optical switch including an array of mirrors tiltable about two axes, both to control the switching and to provide variable power transmission through the switch, both for optimization and for power equalization between wavelength channels in a multi-wavelength signal. The output power of a channel is monitored, thereby allowing feedback adjustment of the transmitted power. The mirrors are preferably formed in a micro electromechanics system array to be tiltable in orthogonal directions and having electrostatically controlled tilting by two pairs of electrodes beneath the mirrors. Input power of the separate channels may also be monitored.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: September 28, 2004
    Assignee: Movaz Networks, Inc.
    Inventors: David A. Smith, John E. Golub, Fariborz Farhan
  • Patent number: 6793779
    Abstract: A method of filling trenches or vias on a semiconductor workpiece surface with copper using sputtering techniques. A copper wetting layer and a copper fill layer may both be applied by sputtering techniques. The thin wetting layer of copper is applied at a substrate surface temperature ranging between about 20° C. to about 250° C., and subsequently the temperature of the substrate is increased, with the application of the sputtered copper fill layer beginning at above at least about 200° C. and continuing while the substrate temperature is increased to a temperature as high as about 600° C. Preferably the substrate temperature during application of the sputtered fill layer ranges between about 300° C. and about 500° C.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: September 21, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Peijun Ding, Tony Chiang, Barry L. Chin
  • Patent number: 6790323
    Abstract: A magnetron especially advantageous for low-pressure plasma sputtering or sustained self-sputtering having reduced area but full target coverage. The magnetron includes an outer pole face surrounding an inner pole face with a gap therebetween. The outer pole of the magnetron of the invention is smaller than that of a circular magnetron similarly extending from the center to the periphery of the target and has a substantially larger total magnetic intensity. Thereby, sputtering at low pressure and high ionization fraction is enabled.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: September 14, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Jianming Fu, Praburam Gopalraja, Fusen Chen, John Foster
  • Patent number: 6790326
    Abstract: A plasma sputter reactor including a target with an annular vault formed in its surface facing the wafer to be sputter coated and having inner and outer sidewalls and a roof thereover. A well is formed at the back of the target between the tubular inner sidewall. A magneton associated with the target includes a stationary annular magnet assembly of one vertical polarity disposed outside of the outer sidewall, a rotatable tubular magnet assembly of the other polarity positioned in the well behind the inner sidewall, and a small unbalanced magnetron rotatable over the roof about the central axis of the target.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: September 14, 2004
    Assignee: applied materials, inc.
    Inventors: Anantha Subramani, Umesh Kelkar, Jianming Fu, Praburam Gopalraja
  • Patent number: 6787006
    Abstract: A multi-step sputtering process in plasma sputter reactor having target and magnetron operable in two modes, for example, in a substrate sputter etch and a substrate sputter deposition. The target has an annular vault facing the wafer to be sputter coated. Various types of magnetic means positioned around the vault create a magnetic field supporting a plasma extending over a large volume of the vault. An integrated copper via filling process with the inventive reactor or other reactor includes a first step of highly ionized sputter deposition of copper, which can optionally be used to remove the barrier layer at the bottom of the via, a second step of more neutral, lower-energy sputter deposition of copper to complete the seed layer, and a third step of electroplating copper into the hole to complete the metallization. The first two steps can be also used with barrier metals.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: September 7, 2004
    Assignee: Applied Materials, Inc.
    Inventors: Praburam Gopalraja, Jianming Fu, Fusen Chen, Girish Dixit, Zheng Xu, Wei Wang, Ashok K. Sinha
  • Patent number: 6788981
    Abstract: A multiplexed analog control system for an micro electromechanical systems (MEMS) array of electrostatic actuators, such as tiltable mirrors in an optical switch. Each actuator includes a variable gap capacitor formed as part of the movable mechanical element. A hold capacitor is connected to each actuator capacitor, and a selectable high-voltage inverter connects them to provide a bipolar drive signal of 50% duty cycle. A single power digital controlled current source is connected to all the drive circuits to provide a high-power correction signal. Address decoders enable a selected one of the drive circuits to add or subtract the correction from the hold capacitor.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: September 7, 2004
    Assignee: Movaz Networks, Inc.
    Inventors: Steven L. Garverick, Jun Guo, Narayanan Rajan
  • Patent number: 6787475
    Abstract: A dielectric plasma etch method particularly useful for assuring that residue does not form in large open pad areas used for monitoring etching of narrow via and contact holes. The main dielectric etch of the via and contact holes uses a highly polymerizing chemistry, preferably of a low-F/C fluorocarbon such as C4F6 in conjunction with O2 and Ar. A short flash step precedes the main plasma etch using a plasma of a gas less polymerizing than the gas of the main etch, and the plasma is not extinguished between the flash and main steps. The flash step may be used to remove an anti-reflection coating (ARC) covering the dielectric layer and use a lean fluorocarbon, such as CF4, perhaps together with O2 and Ar. In the absence of ARC, an argon flash may be used.
    Type: Grant
    Filed: June 5, 2002
    Date of Patent: September 7, 2004
    Inventors: Zhuxu Wang, Jingbao Liu, Claes H. Bjorkman, Bryan Pu
  • Patent number: 6781176
    Abstract: A ferroelectric memory cell formed on a monocrystalline silicon underlayer, either an epitaxial silicon contact plug to a transistor source or drain or silicon gate region for which the memory cell forms a non-volatile gate. A conductive barrier layer of vanadium or niobium substituted strontium titanate is epitaxially grown over the silicon, and a lower metal oxide electrode layer, a ferroelectric layer and an upper metal oxide electrode layer are epitaxially grown on the barrier layer. No platinum barrier is needed beneath the ferroelectric stack. The invention can be applied to many other functional oxide devices including micromachined electromechanical (MEM) devices and ferromagnetic tri-layer devices.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: August 24, 2004
    Assignee: University of Maryland
    Inventor: Ramamoorthy Ramesh