Abstract: A memory unit is presented employing a least recently used (LRU) replacement strategy. The memory unit may include a memory subunit for storing data items, circuitry coupled to the memory subunit for determining if the memory subunit contains a needed data item, and a control unit for controlling the storing of data items within the memory subunit. The memory subunit may include n entry locations where n≧2. The memory unit may generate a first signal indicating which of the n entry locations are currently in use (i.e., contain valid data items), and the circuitry coupled to the memory subunit may produce a second signal indicating which of the n entry locations contains the needed data item. A new data item to be stored within the memory subunit may be accompanied by a control signal identifying which of the n entry locations is to be used to store the new data item. The control unit may receive the first and second signals and produce the control signal dependent upon the first and second signals.

Abstract: A system and method for memory allocation from a heap comprising memory blocks of a uniform fixed size. Each memory block has a status bit. A binary status key stores a Boolean value indicating free memory. The heap is scanned in order until a sequence of a requested quantity of free contiguous memory blocks is found or NULL is returned. Each scanned free memory block is marked un-free by assigning its status bit to the logical negative of the binary status key. If the end of the heap is reached before a sequence of sufficient quantity is found, all reachable blocks are marked as free. The binary status key is flipped such that all memory blocks which were marked free are now un-free, and vice versa. Any memory block whose corresponding structure has become unreferenced is reclaimed for future use. The scan then continues from the beginning of the heap. In another embodiment, a memory allocation for a partitioned data structure from a heap of fixed-size memory blocks may be used.

Abstract: Apparatus is disclosed for viewing computer generated images and for tracking the positions of the user's head and hand. One alternative of the apparatus includes a frame element, versatilely mountable, with sensors for the head tracking of a user whose bodily movement is constrained to a small area. Short range and inexpensive sensors are deployed for tracking the position of the user's head; these sensors are deployed partly on a on the user's head and partly on the tracking frame. All the electronics for tracking and user input are enclosed in a mobile pack. In another alternative of the tracking invention natural forces such as gravity, the Earth's magnetic field, and inertia are used, so additional references. The display allows for interchangeable optical elements so that it may be tailored to suit the needs of a particular user or application.

Abstract: An electrode for a smelting furnace comprises an elongate casing including a plurality of spaced, inwardly projecting ribs extending radially from an inner surface of the casing towards the center of the casing. A central core of a pre-baked electrode, typically a solid or hollow pre-baked graphite electrode, is disposed within the casing free of the projecting ribs and defines a space between the core and the inner surface of the casing. A heating zone is located intermediate the ends of the casing so that a carbonaceous electrode paste received or receivable within the space between the core and the inner surface of the casing is calcined into a baked, hard form upon entering the heating zone. The projecting ribs assist in baking the electrode paste and in anchoring or supporting the electrode to reduce the risk of nipple or joint fracture of adjacent pre-baked electrodes. The electrodes are particularly useful in the smelting of ferrochromium and in the reduction of ores such as ilmenite.

Abstract: An automatic locking mechanism engages a deadbolt lock after a prescribed time interval following entry. The mechanism employs a spring-operated mechanical timer, which may be actuated when a key or thumbturn is turned to unlock the door, and avoids the need for a key to set the deadbolt. The mechanism includes a gear system for retracting and inserting the deadbolt and a mechanical restraint to withhold the deadbolt until the timer has expired. In a suggested embodiment, a cam attached to one of the timer gears removes the restraint when the timer runs down. This deploys the deadbolt, automatically locking the door. In another embodiment, automatic locking may optionally be disabled by inhibiting coupling between the gear system and the timer spring.

Abstract: An actuator for actuating a control mechanism by axially moving an actuating member against a force comprises a housing in which a reversible drive is arranged with a first rotatable part and a second rotatable part engagable with one another and acting on the actuating member for axially moving it in feed direction to the control mechanism upon rotation in one direction. An electric motor rotates the first rotatable part and the second rotatable part by engagement with the first rotatable part. A rotation prevention member prevents rotation of at least one of the rotatable parts in a second direction. A release releases the rotation prevention member to permit rotation of at least one of the rotatable parts to permit the actuating member to be axially moved in a direction opposite to the feed direction.

Abstract: A memory controller may include a request queue for receiving transaction information (e.g. the address of the transaction) and a channel control circuit. A control circuit for the request queue may issue addresses from the request queue to the channel control circuit out of order, and thus the memory operations may be completed out of order. The request queue may shift entries corresponding to transactions younger than a completing transaction to delete the completing transaction's information from the request queue. However, a data buffer for storing the data corresponding to transactions may not be shifted. Each queue entry in the request queue may store a data buffer pointer indicative of the data buffer entry assigned to the corresponding transaction. The data buffer pointer may be used to communicate between the channel control circuit, the request queue, and the control circuit. In one implementation, the request queue may implement associative comparisons of information in each queue entry (e.g.

Abstract: A holder is provided which couples to the spine. In an embodiment, the holder has two conduits into which sleeves may be inserted during a spinal fusion procedure. The holder may have a distractor extending from the bottom of the holder. The distractor secures the holder to the spine and maintains a proper separation distance between adjacent vertebrae. The sides of the distractor may be serrated to better secure the holder to the spine. The sleeves and conduits serve as alignment guides for instruments and implants used during the procedure. In an embodiment, the holder may include holes for fasteners that fixably secure the holder to vertebrae adjacent to a disk space. A flange may be placed around the holder to shield surrounding tissue and to provide a placement location for adjacent blood vessels during the spinal fusion procedure.

Abstract: Cluster membership in a distributed computer system is determined by determining with which other nodes each node is in communication and distributing that connectivity information through the nodes of the system. Accordingly, each node can determine an optimized new cluster based upon the connectivity information. Specifically, each node has information regarding with which nodes the node is in communication and similar information for each other node of the system. Therefore, each node has complete information regarding interconnectivity of all nodes which are directly or indirectly connected. Each node applies optimization criteria to such connectivity information to determine an optimal new cluster. Data represent the optimal new cluster is broadcast by each node. In addition, the optimal new cluster determined by the various nodes are collected by each node. Thus, each node has data representing the proposed new cluster which is perceived by each respective node to be optimal.

Abstract: A multiprocessing system includes a plurality of nodes interconnected through a global interconnect network which supports cluster communications. An initiating node may launch a request to a remote node's memory. A cluster protection mechanism is employed within a system interface of the remote node. The system interface, which is coupled between the global interconnect network and a local bus of the remote node, includes a memory management unit, referred to as a cluster MMU, including a plurality of entries which are selectable on a page basis. Depending upon the particular address of a received global transaction, an entry within the memory management unit is retrieved. The entry includes various fields which may be used to protect against accesses by unauthorized nodes, and to specify the local physical address to be conveyed upon the local bus.

Abstract: A high speed connection apparatus, method, and system is provided for peripheral components on digital computer systems. The peripheral component interconnect (PCI) specification is used as a baseline for an extended set of commands and attributes. The extended command and the attribute are issued on the bus during the clock cycle immediately after the clock cycle when the initial command was issued. The extended commands and attributes utilize the standard pin connections of conventional PCI devices and buses making the present invention backward-compatible with existing (conventional) PCI devices and legacy computer systems. Alternate embodiments of the present invention utilize a side-band address port (SBA port) to enable multiple targets to receive the same set of data. The conventional PCI command encoding is modified and the extended command is used to qualify the type of transaction and the attributes being used by the initiator of the transaction.

Abstract: A rotary drill bit for boring a bore hole in an earthen formation includes a bit body having a pin end, a cutting end and a longitudinal axis and including at least two legs extending from the cutting end. Each of the legs includes a leading side surface, a trailing side surface, and a shoulder, and each of the legs further includes a bearing and a cutter cone rotatably supported on the bearing. The bit body further including a fluid flow system that includes a flowway in the pin end. The flowway is in fluid communication with at least one exit port in the cutting end. The bit body further includes a neck between the shoulders and the pin end and a hard, wear-resistant material on at least a portion of the neck.

Abstract: A cutter element for use in a drill bit, comprising a substrate and a plurality of layers thereon. The substrate comprises a grip portion and an extending portion. The layers are applied to the extending portion such that at least one of the layers is harder than at least one of the layers above it. The layers can include one or more layers of polycrystalline diamond and can include a layer in which the composition of the material changes with distance from the substrate.

Abstract: Apparatus for manufacturing a bone dowel includes a machine base with tracks on a surface thereof. Modules configured to slide in the tracks may include a module for a high speed rotary tool, a collet module, a vise module and a threading module.

Abstract: A multiprocessing computer system employs local and global address spaces and multiple access modes. A portion of the global memory of the multiprocessing computer system is allocated to each node, called local memory space. Two logical address spaces are mapped to the local memory of each node. A coherent memory replication (CMR) address space stores shadow pages of data from remote nodes and a local address space stores local data. A bit within a local physical address identifies whether data is a shadow page, which is stored in CMR space, or local data, which is stored in local address space. When a transaction requiring a coherency operation is performed, the CMR bit indicates whether a local physical address to global address translation is required. In one embodiment, if the CMR bit is clear, the local physical address is the same as the global address and the local physical address is used for the coherency operation.

Abstract: A processor is presented including a cache unit coupled to a bus interface unit (BIU). Address signal selection and masking functions are performed by circuitry within the BIU rather than within the cache unit, and physical addresses produced by the BIU are stored within the TLB. As a result, address signal selection and masking circuitry (e.g., a multiplexer and gating logic) are eliminated from a critical speed path within the cache unit, allowing the operational speed of the cache unit to be increased. The cache unit stores data items, and produces a data item corresponding to a received linear address. A translation lookaside buffer (TLB) within the cache unit stores multiple linear addresses and corresponding physical addresses. When a physical address corresponding to the received linear address is not found within the TLB, the cache unit passes the linear address to the BIU.

Abstract: A method and apparatus for controlling power management state transitions between two devices, e.g., a processor and a bus bridge, that are connected through a clock forwarded interface bus in a computer system. The bus bridge is configured to coordinate disconnection of the processor from the interface. Particularly, the bus bridge may use a fist signal to indicate whether or not the processor is to be disconnected from the interface (e.g. a CONNECT signal) and the processor may use a second signal to indicate whether or not the processor is to be disconnected from the interface (e.g. a PROCREADY signal). The processor is disconnected from the interface responsive to both the first signal and the second signal indicating that the processor is to be disconnected. The signals may also be used to reconnect the processor to the interface.

Abstract: An improved method and system for logging transaction records in a computer system. The method may include writing a confirmation log record to the log file for a transaction that completes normally, and not writing a confirmation log record for transactions that are aborted. The log file may be unloaded periodically by an unload program. The unload program may write transaction log records accompanied by a confirmation log record to a good output file and transaction log records not accompanied by a confirmation log record to a suspended output file. On a subsequent execution, the unload program may combine the log records in the log file and the suspended file. The unload program may write transaction log records accompanied by a confirmation log record to a good output file. The unload program may write transaction log records not accompanied by a confirmation log record and which have not exceeded a transaction time limit to a suspended output file.

Abstract: A cluster implements a virtual disk system that provides each node of the cluster access to each storage device of the cluster. The virtual disk system provides high availability such that a storage device may be accessed and data access requests are reliably completed even in the presence of a failure. To ensure consistent mapping and file permission data among the nodes, data are stored in a highly available cluster database. Because the cluster database provides consistent data to the nodes even in the presence of a failure, each node will have consistent mapping and file permission data. A cluster transport interface is provided that establishes links between the nodes and manages the links. Messages received by the cluster transports interface are conveyed to the destination node via one or more links. The configuration of a cluster may be modified during operation.

Abstract: A wafer fabrication system is presented including a measurement system which screens measurement data prior to dissemination. The measurement system may include an equipment interface computer coupled between a measurement tool and a work-in-process (WIP) server. The measurement tool may perform one of possibly several measurement procedures (i.e., “recipes”) upon one or more semiconductor wafers processed as a lot, thereby producing measurement data. The WIP server may select the measurement recipe and store the measurement data. The equipment interface computer may receive the measurement data produced by the measurement tool and compare the measurement data to a predetermined range of acceptable values in order to determine if the measurement data is within the range of acceptable values. The equipment interface computer may display the measurement data upon a display device such that any portion of the measurement data not within the range of acceptable values is visually flagged (e.g.