Patents Represented by Attorney David M. Keay
  • Patent number: 5217588
    Abstract: Apparatus and method for determining the concentration of NOx in a gas mixture. The gas mixture is supplied to two electrodes at which different NOx decomposition conditions are present. The electrodes may be of different materials or sizes or may be positioned in different gas enclosure environments. The NOx decomposes at different rates at the two electrodes and an emf is thus produced between the electrodes. The concentration of NOx in the gas mixture is determined from the measured emf.
    Type: Grant
    Filed: February 27, 1992
    Date of Patent: June 8, 1993
    Assignee: GTE Laboratories Incorporated
    Inventors: Da Y. Wang, Daniel T. Kennedy, Burton W. MacAllister, Jr.
  • Patent number: 5066603
    Abstract: In fabricating a junction field effect transistor, specifically a static induction transistor, an epitaxial layer of high resistivity N-type silicon is grown on a substrate of low resistivity silicon. The surface of the epitaxial layer is marked in a pattern to expose a plurality of elongated surface areas. The wafer is subjected to reactive ion etchings in SiCl.sub.4 and Cl.sub.2 and subsequently in Cl.sub.2 to form parallel grooves with rounded intersection between the wide walls and bottoms of the grooves. Ridges of silicon are interposed between grooves. A layer of silicon oxide is grown on all the silicon surfaces. The grooves are filled with deposited silicon oxide and silicon oxide is removed to form a planar surface with the upper surfaces of the ridges.
    Type: Grant
    Filed: September 6, 1989
    Date of Patent: November 19, 1991
    Assignee: GTE Laboratories Incorporated
    Inventors: Emel S. Bulat, Brian T. Devlin
  • Patent number: 4983536
    Abstract: A junction field effect transistor, specifically a static induction transistor. Prior to metallization a thin layer of germanium is placed over the exposed silicon of the source and gate regions. The germanium is intermixed with the underlying silicon to form a germanium-silicon composite. A rapid thermal anneal is performed to recrystallize the germanium-silicon composite. Alternatively, a single crystal epitaxial layer may be deposited on the silicon. Conventional metallization procedures are employed to produce ohmic source and gate contact members to the germanium-silicon composite or the epitaxial germanium of the source and gate regions. By virtue of the reduced bandgap provided by the presence of the germanium, the contact resistance of the device is reduced.
    Type: Grant
    Filed: November 24, 1989
    Date of Patent: January 8, 1991
    Assignee: GTE Laboratories Incorporated
    Inventors: Emel S. Bulat, Marvin J. Tabasky
  • Patent number: 4984037
    Abstract: A semiconductor device, specifically an FET, having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi.sub.2, disposed therein. The rods form Schottky barriers with the semiconductor material. A gate contact is made to several of the rods at one end, and source and drain contacts are made to the matrix of semicondcutor material. Current flow in the semiconductor material of the matrix between the source and the drain is controlled by applying biasing potential to the gate contact to enlarge the depletion zones around the rods.
    Type: Grant
    Filed: December 11, 1986
    Date of Patent: January 8, 1991
    Assignee: GTE Laboratories Incorporated
    Inventors: Brian M. Ditchek, Adrian I. Cogan, Enid K. Sichel, Walter L. Bloss, III
  • Patent number: 4891091
    Abstract: Method of MOVPE growing a compound semiconductor material, for example GaAs, on a substrate, for example Si. Sodium ions are first introduced onto the substrate surface as by immersing it in a cleaning solution containing sodium. A two-step MOVPE process is then employed to grow device quality single crystal compound semiconductor material on the surface of the substrate.
    Type: Grant
    Filed: June 8, 1987
    Date of Patent: January 2, 1990
    Assignee: GTE Laboratories Incorporated
    Inventor: Shambhu K. Shastry
  • Patent number: 4880519
    Abstract: Apparatus for measuring the concentration of oxygen in exhaust gases. A gas sensor element of yttria-stabilized zirconia (Y.sub.2 O.sub.3 -ZrO.sub.2) has at one end a gas pump of two chambers separated by intervening Y.sub.2 O.sub.3 -ZrO.sub.2 with an orifice extending between each chamber and the exterior of the gas sensor element. Two platinum electrodes of a first set face one chamber and two platinum electrodes of a second set face the other chamber. The gas sensor element is mounted in an insulating mounting collar in close contact with two ceramic heaters of resistance heating elements on silicon nitride substrates. The mounting collar is clamped between a shield member encircling the gas pump of the sensor element and a housing member by threaded clamping nuts. The shield member has one or more apertures therein to admit exhaust gases to be analyzed to the gas pump of the sensor element.
    Type: Grant
    Filed: May 24, 1988
    Date of Patent: November 14, 1989
    Assignee: GTE Laboratories Incorporated
    Inventors: Da Y. Wang, Daniel T. Kennedy, Burton W. MacAllister, Jr.
  • Patent number: 4862017
    Abstract: An n-imput CMOS NOR-gate having n nMOS transistors connected in parallel with their inputs connected to different input terminals and their outputs connected to a common output terminal. First and second sets of n pMOS transistors each are each connected in series between a positive voltage source and the output terminal. The inputs of the first set of pMOS transistors are connected to the input terminals in order, and the inputs of the second set of pMOS transistors are connected to the input terminals in the reverse order.
    Type: Grant
    Filed: March 10, 1988
    Date of Patent: August 29, 1989
    Assignee: GTE Laboratories Incorporated
    Inventor: Sywe-Neng Lee
  • Patent number: 4862412
    Abstract: A content-addressable memory (CAM) consisting of an array of memory cells arranged in a matrix by rows and columns is disclosed in which each memory cell includes a pair of cross-coupled CMOS inverters for storing a representation of a single bit. The bits in each row of memory cells constitute a keyword. Keywords are entered into the memory one row at a time. All of the stored keywords are compared to a single search word simultaneously during a match operation. The CAM is prepared for a match operation by placing a charge on a match line associated with each row. If all the bits of the search word match the bits of the stored keyword, the associated match line remains charged producing a match signal for the row of memory cells. If any bit of the search word does not match the corresponding bit of the stored keyword, the associated match line is discharged producing a no-match signal for the row of memory cells.
    Type: Grant
    Filed: April 25, 1988
    Date of Patent: August 29, 1989
    Assignee: GTE Laboratories Incorporated
    Inventors: Jeffrey A. Fried, Christopher P. Rosebrugh
  • Patent number: 4860081
    Abstract: Grooves are formed in a single crystal silicon wafer in a pattern to encircle surface areas. Silicon dioxide is placed in the grooves and on the surface and then removed from certain of the areas. Layers of silicon are epitaxially grown only on these areas and their surfaces are oxidized. Polycrystalline silicon is deposited to a thickness greater than that of the epitaxial layers. Both sides of the wafer are ground and polished to produce flat, planar, opposite surfaces; one surface exposing surface areas of the epitaxial layers, the other surface exposing the silicon dioxide in the grooves. The resulting substrate has two types of silicon sections, each of which is electrically isolated from the other by silicon dioxide partitions. One type of section is of silicon of the original wafer, has a surface area in only one surface, and is suitable for the fabrication of low voltage, low power devices therein.
    Type: Grant
    Filed: September 19, 1985
    Date of Patent: August 22, 1989
    Assignee: GTE Laboratories Incorporated
    Inventor: Adrian I. Cogan
  • Patent number: 4851713
    Abstract: An n-input CMOS NAND-gate having n pMOS transistors connected in parallel with their inputs connected to different input terminals and their outputs connected to a common output terminal. First and second sets of n nMOS transistors are each connected in series between the output terminal and ground. The inputs of the first set of nMOS transistors are connected to the input terminals in order, and the inputs of the second set of nMOS transistors are connected to the input terminals in the reverse order.
    Type: Grant
    Filed: March 10, 1988
    Date of Patent: July 25, 1989
    Assignee: GTE Laboratories Incorporated
    Inventor: Sywe-Neng Lee
  • Patent number: 4829173
    Abstract: A semiconductor photodetector having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi.sub.2, disposed therein. The rods form Schottky barriers with the semiconductor material. An ohmic contact is made to several of the rods at one end, and an ohmic contact is made to the semiconductor material of the matrix. Incident radiation is directed at a surface of the body containing the opposite ends of the rods. A detector is connected between the two ohmic contacts and detects current flow generated in response to incident radiation impinging on the body.
    Type: Grant
    Filed: March 2, 1987
    Date of Patent: May 9, 1989
    Assignee: GTE Laboratories Incorporated
    Inventors: Brian M. Ditchek, Mark Levinson, Ben G. Yacobi
  • Patent number: 4827494
    Abstract: X-ray apparatus of the type in which X-rays are generated by an electron beam impinging on a focal spot on a metal target. Heat from the focal spot is focused onto a lateral effect photodiode, the electrical output of which changes with changes in the position of the focal spot. This output is fed back to the electron beam deflection coils to change the direction of the electron beam and steer it back toward the original, intended position of the focal spot on the target.
    Type: Grant
    Filed: December 16, 1987
    Date of Patent: May 2, 1989
    Assignee: GTE Laboratories Incorporated
    Inventor: William D. Koenigsberg
  • Patent number: 4820651
    Abstract: A method of rapid thermal annealing a wafer of an ion implanted III-V compound semiconductor material by heating the wafer in close proximity to a III-V compound semiconductor wafer coated with a layer of tin or indium. A localized overpressure of the Group V element is produced by the combination of the III and V elements with the tin or indium tending to reduce surface decomposition of the implanted wafer.
    Type: Grant
    Filed: November 1, 1985
    Date of Patent: April 11, 1989
    Assignee: GTE Laboratories Incorporated
    Inventors: Francisco C. Prince, Craig A. Armiento
  • Patent number: 4818988
    Abstract: A crosspoint switching array of a matrix of crosspoint switches connected in rows and columns. Each crosspoint switch includes an MOS inverter circuit for propagating a digital signal from crosspoint-to-crosspoint along its row. Each crosspoint switch includes a first MOS switch connected to the preceding crosspoint switch in the column and a second MOS switch connected to its row. The second switch is activated to connect the row to the column at a particular crosspoint. Otherwise, the first switch is activated to connect the crosspoint switch to the preceding crosspoint switch in the column. The output of the first or second switch is applied to an MOS inverter circuit for driving the following crosspoint switch in the column.
    Type: Grant
    Filed: January 4, 1988
    Date of Patent: April 4, 1989
    Assignee: GTE Laboratories Incorporated
    Inventors: Michael Cooperman, Richard W. Sieber
  • Patent number: 4794438
    Abstract: A semiconductor radiation detector having a body which includes a matrix of semiconductor material, specifically silicon, having an array of individual rods of conductive material, specifically TaSi.sub.2, disposed therein. The rods form Schottky barriers with the semiconductor material. A set of contacts spaced along the length of the body each make ohmic contact to several rods at one end of each rod, and an ohmic contact is made to the semiconductor material of the matrix. Incident radiation is directed at a surface of the body which lies parallel to the rods. Detectors connected to each of the contacts along the length of the body detect current flow generated in the vicinity of the rods associated with each contact member by radiation penetrating into the body to that depth.
    Type: Grant
    Filed: March 16, 1987
    Date of Patent: December 27, 1988
    Assignee: GTE Laboratories Incorporated
    Inventors: Mark Levinson, Ben G. Yacobi, Brian M. Ditchek
  • Patent number: 4794593
    Abstract: Communication system of a plurality of switching nodes connected in a closed ring. A switching stage at each node transmits words of data from node-to-node in a time-division multiplexed data stream. Data can be inserted onto the ring by each switching stage, and data addressed to a switching stage is removed form the ring by that switching stage. Data words are loaded into input registers at each switching stage on the leading edge of a clock pulse, and decoding occurs within each switching stage during the clock pulse. A received word may be transmitted to a succeeding switching stage, or may be removed form the ring and stored in an output register on termination of a clock pulse.
    Type: Grant
    Filed: November 18, 1987
    Date of Patent: December 27, 1988
    Assignee: GTE Laboratories Incorporated
    Inventor: Joseph M. Lenart
  • Patent number: 4787696
    Abstract: Apparatus for supporting a group of optical fibers in proper alignment with associated laser devices and rear-facet photodetectors. The photodetectors and grooves for supporting the optical fibers are fabricated in a carrier member of device quality silicon. An array of a row of laser devices is moved laterally along a slot in the carrier member transverse to the grooves so as to align each laser device with a groove and with a photodetector. One or more carrier members may be mounted on a supporting structure adapted to receive them.
    Type: Grant
    Filed: December 18, 1987
    Date of Patent: November 29, 1988
    Assignee: GTE Laboratories Incorporated
    Inventors: Peter E. Norris, Robert J. Regan
  • Patent number: 4774435
    Abstract: A thin film electroluminescent device including a transparent substrate having a smooth, planar exterior surface and a rough, non-planar interior surface. Layers of a first transparent electrode of indium tin oxide or tin oxide, an insulating material, for example, silicon oxynitride, manganese activated zinc sulfide, an insulating material, and a second electrode of aluminum are deposited in order on the rough, non-planar interior surface of the substrate. The rough, non-planar interface between the phosphor and insulating material provides surfaces at different angles to the light generated within the phosphor layer preventing light from being trapped within the phosphor layer.
    Type: Grant
    Filed: December 22, 1987
    Date of Patent: September 27, 1988
    Assignee: GTE Laboratories Incorporated
    Inventor: Mark Levinson
  • Patent number: 4769813
    Abstract: Communication systems of a plurality of switching nodes connected in a closed ring. A switching stage at each node transmits words of data from node-to-node in a time-division multiplexed data stream. Data can be inserted onto the ring by each switching stage, and data addressed to a switching stage is removed from the ring by that switching stage. Data words are loaded into input registers at each switching stage on the leading edge of a clock pulse, decoding occurs within each switching stage during the clock pulse, and the data words are placed in the proper output registers of each switching stage in response to the termination of the clock pulse.
    Type: Grant
    Filed: November 18, 1987
    Date of Patent: September 6, 1988
    Assignee: GTE Laboratories Incorporated
    Inventor: Joseph M. Lenart
  • Patent number: 4755256
    Abstract: Method of forming alternating narrow strips of conductive metal silicide, specifically cobalt disilicide, and silicon on a substrate as of silicon with a silicon dioxide or silicon nitride surface layer. Cobalt and silicon are deposited on the substrate in the mole ratio of the eutectic composition of cobalt disilicide and silicon. A molten zone is caused to traverse these materials which upon resolidification at the trailing edge of the molten zone segregate into the two eutectic phases forming alternating narrow strata or lamellae of cobalt disilicide and silicon.
    Type: Grant
    Filed: May 17, 1984
    Date of Patent: July 5, 1988
    Assignee: GTE Laboratories Incorporated
    Inventor: Brian M. Ditchek