Abstract: A method for autonomous dynamic voltage (v) and frequency (f) scaling (DVFS) of a microprocessor, wherein autonomous detection of phases of high microprocessor workload and prediction of their duration is performed (PID). The microprocessor frequency (f) will be temporarily increased (LUT) to an appropriate safe value (even beyond its nominal frequency) consistent with technological and ambient constraints in order to improve performance when the computer system comprising the microprocessor benefits most, while during phases of low microprocessor workload its frequency (f) and voltage (v) will be decreased to save energy. This technique exploits hidden performance capabilities and improves the total performance of a computer system without compromising operational stability. No additional hardware such as service processors is needed for contemporary computer systems supporting performance counters and DFVS already.

Abstract: A processor includes at least one instruction execution unit that executes store instructions to obtain store operations and a store queue coupled to the instruction execution unit. The store queue includes a queue entry in which the store queue gathers multiple store operations during a store gathering window to obtain a data portion of a write transaction directed to lower level memory. In addition, the store queue includes dispatch logic that varies a size of the store gathering window to optimize store performance for different store behaviors and workloads.

Abstract: A method, system and computer-readable medium for configuration file sharing are presented. In a preferred embodiment, the method includes the steps of: creating, in a controller, a superset registry file that includes old registry data, new registry data, and kindred registry data, wherein the old registry data and the new registry data are incompatible, and wherein the kindred registry data is compatible with both the old registry data and the new registry data; and contemporaneously downloading the kindred registry data and software version-specific registry data, selected from the old registry data and the new registry data, to a requesting client.

Abstract: A method and system is presented for correcting a data error in a primary Dynamic Random Access Memory (DRAM) in a Dual In-line Memory Module (DIMM). Each DRAM has a left half (for storing bits 0:3) and a right half (for storing bits 4:7). A determination is made as to whether the data error was in the left or right half of the primary DRAM. The half of the primary DRAM in which the error occurred is removed from service. All subsequent reads and writes for data originally stored in the primary DRAM's defective half are made to a half of a spare DRAM in the DIMM, while the DRAM's non-defective half continues to be used for subsequently storing data.

Abstract: A method of making an integrated circuit package includes forming a through hole in an integrated circuit and assembling a die containing the integrated circuit on a carrier so that the die is mechanically and electrically connected to the carrier. Thereafter, an underfill material is dispensed between the die and the carrier via the through hole.

Abstract: A technique for implementing compensatory feedback in a continuous-time sigma-delta modulator includes providing, based on an analog input signal, a digital output signal at an output of a quantizer circuit of the continuous-time sigma-delta modulator. A functionality of the quantizer circuit is then controlled based on the digital output signal.

Abstract: According to a method of simulation processing, a collection of files including one or more HDL source files describing design entities collectively representing a digital design to be simulated is received. The HDL source file(s) include a statement specifying inclusion of an instrumentation entity not forming a portion of the digital design but enabling observation of its operation during simulation. The instrumentation entity includes sequential logic containing at least one storage element, where the instrumentation entity has an output signal indicative of occurrence of a simulation event. The collection of files is processed to obtain an instrumented simulation executable model. The processing includes instantiating at least one instance of each of the plurality of design entities and instantiating the instrumentation entity. The processing further includes instantiating external instrumentation logic, logically coupled to each instance of the instrumentation entity, to record occurrences of the event.

Abstract: A method, system and computer program product for building decision diagrams efficiently in a structural network representation of a digital circuit using a dynamic resource constrained and interleaved depth-first-search and modified breadth-first-search schedule is disclosed. The method includes setting a first size limit for a first set of one or more m-ary decision representations describing a logic function and setting a second size limit for a second set of one or more m-ary decision representations describing a logic function. The first set of m-ary decision representations of the logic function is then built with one of the set of a depth-first technique or a breadth-first technique until the first size limit is reached, and a second set of m-ary decision representations of the logic function is built with the other technique until the second size limit is reached.

Abstract: The present invention presents a method, system and computer-implementable medium for remapping child references when parent reference updates are processed.

Abstract: A method for providing fault tolerance to multiple computer servers is disclosed. Basically, t backup computer servers are utilized to back up data from multiple active computer servers such that up to t faults can be tolerated. Data from the active computer servers are categorized under their respective data structure accordingly. In response to any access to data within one or more of the active computer servers, backup operations are performed on the accessed data in the t backup computer servers according to their data structures such that data with similar data structures are grouped under their respective fusible data structure within the t backup computer servers.

Abstract: A method of and system for submitting inquiries to members of an organization determine if there is a pending inquiry to be submitted to the member. If there is a pending inquiry to be submitted to the member, the system displays the pending inquiry to the member. The system permits the member to logon to said server if the member responds to said inquiry. The system may allow the member to defer responding to the inquiry and permit the member to logon to the server without responding to the inquiry. If deferral of response to the inquiry is not allowed, the system will deny the member access to the server if the member fails to respond to said inquiry.

Abstract: A method, system and computer program product for reducing XOR/XNOR subexpressions in structural design representations are disclosed. The method includes receiving an initial design, in which the initial design represents an electronic circuit containing an XOR gate. A first simplification mode for the initial design is selected from a set of applicable simplification modes, wherein the first simplification mode is an XOR/XNOR simplification mode, and a simplification of the initial design is performed according to the first simplification mode to generate a reduced design containing a reduced number of XOR gates. Whether a size of the reduced design is less than a size of the initial design is determined, and, in response to determining that the size of the reduced design is less than a the size of the initial design, the initial design is replaced with the reduced design.

Abstract: A method and apparatus for preventing selection of Deleted (D) members as an LRU victim during LRU victim selection. During each cache access targeting the particular congruence class, the deleted cache line is identified from information in the cache directory. A location of a deleted cache line is pipelined through the cache architecture during LRU victim selection. The information is latched and then passed to MRU vector generation logic. An MRU vector is generated and passed to the MRU update logic, which is selects/tags the deleted member as a MRU member. The make MRU operation affects only the lower level LRU state bits arranged in a tree-based structure state bits so that the make MRU operation only negates selection of the specific member in the D state, without affecting LRU victim selection of the other members.

Abstract: A weapon accessory integrates multiple illumination sources and a mechanism for dispensing a chemical irritant within a single housing for attachment as a fore grip to a firearm. The weapon accessory has selectable microprocessor-controlled multi-modes of operation for providing illumination, sighting or target debilitation. Switches on the outside of the housing enable user setting and control of the multiple modes of operation, which include one or a combination of (i) activating high intensity light emitting diodes (LEDs) to illuminate an object or human subject with either visible or infrared light, (ii) activating a visible or infrared laser for sighting a target, (iii) activating a frequency modulation mode that alternates pulsing white and blue LEDs at three superimposed frequencies to temporarily disable, distract and degrade the vision of a human subject, and (iv) activating the chemical irritant dispenser.

Abstract: A method for maintaining confidentiality of personal information during E-commerce transactions. The method includes: (1) compiling a profile of personal information within a depository for at least the buying party to an E-commerce transaction; (2) providing the buying party with a unique identifier linked to his profile for use during subsequent E-commerce transactions; and (3) in response to the buying party providing the identifier to a merchant, completing the E-commerce transaction at the depository without providing any of the buyer's personal information to the merchant.

Abstract: A method, system, and device for enabling intervention across same-level cache memories. In a preferred embodiment, responsive to a cache miss in a first cache memory a direct intervention request is sent from the first cache memory to a second cache memory requesting a direct intervention that satisfies the cache miss. In an alternate embodiment, direct intervention is utilized to access a same-level victim cache.

Abstract: The reassembly timer in a TCP/IP receiver is dynamically set to avoid data corruption on fast networks caused by IP identification wrap-around. A sender generates IP packets with a special option specifying a reassembly time for fragments based on the subnet of the destination or on the calculated round-trip time of the connection. A receiver sets the reassembly timer to the reassembly time specified in the option. A sender can generate IP packets with an alternative option setting a time stamp for the generated packet. A receiver calculates a traversal time based on the difference between the arrival time of the fragment and this time stamp, and sets the reassembly timer based on this traversal time. A receiver can independently set the reassembly timer to a first reassembly time set by the user for fast networks or to a second reassembly timer set by the user for slow networks based on whether the receiver and sender are on the same subnet.

Abstract: The present invention provides a web site editing method, a web site editing system, and a web site editing computer program product enabling both an improvement in efficiency and safety in editing partial sites. A method of editing a web site by using a plurality of editing environments including at least first and second editing environments, the web site being composed of a plurality of web pages and stored in the first editing environment, the method in the first editing environment having: a specification step of accepting that a user specifies a part of the plurality of web pages as a partial site; and a generation step of generating an editing file including a specific file, which corresponds to the web pages included in the partial site, and a common file potentially used for editing the partial site.

Abstract: This invention relates generally to uses of novel nanomaterial composition and the systems in which they are used, and more particularly to nanomaterial compositions generally comprising carbon and a metal, which composition can be exposed to pulsed emissions to react, activate, combine, or sinter the nanomaterial composition. The nanomaterial compositions can alternatively be utilized at ambient temperature or under other means to cause such reaction, activation, combination, or sintering to occur.

Abstract: A method is presented for representing emergent data in intelligent icons. The intelligent icons are visually coded to represent the emergent data. When logically linked, the visual coding of linked intelligent icons changes in accordance with how the intelligent icons are linked.