Abstract: In accordance with the method, system, and program of the present invention, consumer preferences designated for a user are transmitted in a transmittable data format from a portable data processing system associated with the user to multiple independent server systems each associated with a consumer provider from among multiple diverse consumer providers. Specialized services and products from each of the diverse consumer providers are designated for the user at each of the independent server systems, in response to comparing the consumer preferences for the user with a database of services and products at each of the independent server systems.

Abstract: A system, method, and computer-usable medium for applying a destructive firmware update in a non-destructive manner. According to a preferred embodiment of the present invention, during operation of a multiprocessor data processing system, a service processor updates firmware in the multiprocessor data processing system from a first firmware setting to a second firmware setting. The service processor iteratively applies the second firmware setting to hardware within the multiprocessor data processing system by de-allocating a first hardware device when the second firmware setting includes at least one destructive operation targeted to the first hardware device, performing the destructive operation on the first hardware device, and re-allocating the first hardware device into the multiprocessor data processing system when the destructive operation is complete.

Abstract: A method, system and computer program product for reducing subexpressions in structural design representations containing AND and OR gates are disclosed. The method comprises receiving an initial design, in which the initial design represents an electronic circuit, containing an AND gate. A first simplification mode for the initial design from a set of applicable simplification modes is selected, wherein said simplification mode is an AND/OR simplification mode, and a simplification of the initial design according to the first simplification mode is performed to generate a reduced design. Whether a size of the reduced design is less than a size of the initial design is determined and, in response to determining that the size of the reduced design is less than the size of the initial design, the initial design is replaced with the reduced design.

Abstract: A method for managing packet traffic in a data processing network includes collecting data indicative of the amount of packet traffic traversing each of the links in the network's interconnect. The collected data includes source and destination information indicative of the source and destination of corresponding packets. A heavily used links are then identified from the collected data. Packet data associated with the heavily used link is then analyzed to identify a packet source and packet destination combination that is a significant contributor to the packet traffic on the heavily used link. In response, a process associated with the identified packet source and packet destination combination is migrated, such as to another node of the network, to reduce the traffic on the heavily used link. In one embodiment, an agent installed on each interconnect switch collects the packet data for interconnect links connected to the switch.

Abstract: A novel Structure Query Language (SQL) command globally swaps multiple alias names for multiple objects in a database management system.

Abstract: A method, system and computer program product for managing preallocated disk space are presented. The method includes placing a plurality of requests for preallocated disk space on a disk space request queue, wherein each preallocated disk space is preallocated for a fixed amount of disk space and a fixed length of time, and wherein an application using an issued preallocated disk space for more than the fixed length of time results in the application being barred from further current use of the issued preallocated disk space. The requests are sorted in the disk space request queue according to a priority algorithm that establishes a priority level for each of the requests, and preallocated disk space is allocated to requesters according to the priority level established by the priority algorithm.

Abstract: A method for preventing unauthorized modifications to a rental computer system is disclosed. During boot up of the rental computer system, a determination is made whether or not a time-day card is bound to the rental computer system. If the time-day card is bound to the rental computer system, another determination is made whether or not a time/date value on the time-day card is less than a secure time/date value stored in a secure storage location during the most recent power down. If the time/date value on the time-day card is not less than the secure time/date value, yet another determination is made whether or not the secure time/date value is less than an end time/date rental value. If the secure time/date value is less than the end time/date rental value, the rental computer system continues to boot.

Abstract: A data processing system includes a first plane including a first plurality of processing nodes, each including multiple processing units, and a second plane including a second plurality of processing nodes, each including multiple processing units. The data processing system also includes a plurality of point-to-point first tier links. Each of the first plurality and second plurality of processing nodes includes one or more first tier links among the plurality of first tier links, where the first tier link(s) within each processing node connect a pair of processing units in the same processing node for communication. The data processing system further includes a plurality of point-to-point second tier links.

Abstract: A processor communication register (PCR) contained within a multiprocessor cluster system provides enhanced processor communication. The PCR stores information that is useful in pipelined or parallel multi-processing. Each processor cluster has exclusive rights to store to a sector within the PCR and has continuous access to read its contents. Each processor cluster updates its exclusive sector within the PCR, instantly allowing all of the other processors within the cluster network to see the change within the PCR data, and bypassing the cache subsystem. Efficiency is enhanced within the processor cluster network by providing processor communications to be immediately networked and transferred into all processors without momentarily restricting access to the information or forcing all the processors to be continually contending for the same cache line, and thereby overwhelming the interconnect and memory system with an endless stream of load, store and invalidate commands.

Abstract: A method for recovering from software and/or hardware failures occurred in a data processing system is disclosed. A current version of boot code and an updated version of boot code are stored in a first memory region and a second memory region, respectively, of a non-volatile memory of the data processing system. The updated version of boot code is periodically replaced by a latest version of boot code downloaded from a support center. After an occurrence of a system crash, a determination is made if the system crash was caused by a known problem that can be remedied by the updated version of boot code. If so, the data processing system is rebooted using the updated version of boot code. Otherwise, data related to the system crash is collected, and the data processing system is rebooted using the current version of boot code.

Abstract: A level shifter circuit is disclosed. The circuit receives a digital input signal characterized by a logical high state having a first high voltage level and generates an output node for driving a digital output signal characterized by a logical high state having a second high voltage level. The output signal logical state mirrors the input signal logical state. The circuit includes a short circuit current reduction mechanism for charging a first internal node of level shifter circuit following a first transition of the input signal logical state. The circuit further includes a performance enhancement mechanism for discharging the first internal node of the level shifter circuit following a second transition of the input signal logical state. The performance enhancement mechanism may comprise a transistor driven by the input signal and connected between the first internal node and ground.

Abstract: A novel Keno game is disclosed in which additional bonus numbers are randomly chosen and displayed in addition to twenty numbers randomly picked for game play. When there are a first predetermined number of matches between the additional bonus numbers and the random twenty numbers the player is awarded a bonus, and the type is bonus is identified by a selection made by the player. The type of bonus is printed out on a bonus ticket that is dispensed to the player. In a subsequent round of Keno game play a player is prompted to insert certain types of bonus ticket if there is a second predetermined number of matches between the additional bonus numbers and the twenty random numbers the player is prompted to insert into the Keno game machine types of bonus tickets that they hold. When the player inserts a bonus ticket it is read and retained and a subsequent round of Keno game play is modified according to the type of bonus identified.

Abstract: An insurance policy funds end-of-lifetime activities for a non-human facility at an end of a lifetime of the facility with a policy benefit whose amount is based upon growth of a premium.

Abstract: A system and method for accelerated web page navigation using keyboard accelerators in a data processing system. A navigation layer is provided within a web browser application to enable pre-processing of a markup language within a web page retrieved from a web server. Multiple sequentially and/or individually accessible pages (i.e., paged content) of the web page are detected and functionality of one or more buttons of a keyboard is associated with one or more navigation functions of the web page (i.e., keyboard accelerators are enabled).

Abstract: A method for protecting Security Accounts Manager (SAM) files within a Windows® operating system is disclosed. A SAM file encryption key is generated by encrypting a SAM file via a syskey utility provided within the Windows® operating system. The SAM file encryption key is then stored in a virtual floppy disk by selecting an option to store SAM file encryption key to a floppy disk under the syskey utility. A blob is generated by performing a Trusted Platform Module (TPM) Seal command against the SAM file encryption key along with a value stored in a Performance Control Register and a TPM Storage Root Key. The blob is stored in a non-volatile storage area of a computer.

Abstract: A system, method and computer-usable medium for designing a firewall to protect a data processing system. A user first specifies a firewall decision diagram. The firewall decision diagram is then reduced and marked. Finally, a firewall is generated from the marked firewall decision diagram.

Abstract: A method, system, and computer program product for autonomically managing a meeting calendar. An Autonomic Meeting Scheduling (AMS) utility detects a set of pre-scheduling data. The AMS utility generates an optimal meeting schedule based upon the set of pre-scheduling data. A meeting invitation is communicated to at least one meeting invitee. The AMS utility detects an invitation reply data from a meeting invitee. Based upon the pre-scheduling data and the invitation reply data, the AMS utility generates and outputs one of at least a meeting probability value (MPV) and a MPV curve. The MPV is a measure of how probable a scheduled meeting will occur. Moreover, a meeting owner may enable the AMS utility to determine whether the MPV has reached a threshold to execute a scheduling decision (i.e., retain a scheduled meeting, reschedule a meeting, or cancel/extinguish a scheduled meeting).

Abstract: A static random access memory decoder circuit includes a first cell supply line coupled to provide a first column of memory cells a first cell supply voltage and a second cell supply line coupled to provide a first column of memory cells a first cell supply voltage. The decoder circuit further includes a write assist circuit having a first threshold transistor coupled to the first cell supply line and a second threshold transistor coupled to the second cell supply line. In response to a write assist signal, the write assist circuit connects one of the first and second cell supply lines selected by control circuitry to an associated one of the first and second threshold transistors, such that a cell supply voltage of the selected one of the first and second cell supply lines is reduced toward the threshold voltage of the threshold transistor.

Abstract: A method for fabricating photonic and electronic devices on a substrate is disclosed. Multiple slabs are initially patterned and etched on a layer of a substrate. An electronic device is fabricated on a first one of the slabs and a photonic device is fabricated on a second one of the slabs, such that the electronic device and the photonic device are formed on the same layer of the substrate.

Abstract: A data processing system and method of password protecting the boot of a data processing system are disclosed. According to the method, in response to an attempt to boot the data processing system utilizing a boot device, the boot device is interrogated for a password. If the boot device supplies password information corresponding to that of a trusted boot device, the data processing system boots utilizing the boot device. If, however, the boot device does not supply password information corresponding to that of a trusted boot device, booting from the boot device is inhibited. In a preferred embodiment, the password information comprises a unique combination of the boot device's manufacturer-supplied model and serial numbers.