Abstract: A method, system and processor for adaptively and selectively controlling the instruction execution frequency of a data processor. Processing logic or a software compiler determines when a number of first-type instructions, requiring longer execution latency, are scheduled to be executed. The logic/compiler then triggers the CPM unit to automatically switch the execution frequency of the instruction processor from a first frequency that is optimal for processing regular-type instructions to a second, pre-established lower frequency that is optimal for processing the first-type instructions, to enable more efficient execution and higher execution throughput of the number of first-type operations within the processor. When the first-type instructions have completed execution, the processor's instruction execution frequency is returned to the first optimal frequency.

Abstract: The present invention includes a system and method for implementing a hardware-supported thread assist under load lookahead mechanism for a microprocessor. According to an embodiment of the present invention, hardware thread-assist mode can be activated when one thread of the microprocessor is in a sleep mode. When load lookahead mode is activated, the fixed point unit copies the content of one or more architected facilities from an active thread to corresponding architected facilities in the first inactive thread. The load-store unit performs at least one speculative load in load lookahead mode and writes the results of the at least one speculative load to a duplicated architected facility in the first inactive thread.

Abstract: A technique of operating a processor subsystem masks interrupts to the processor subsystem during a power-down sequence of a processor of the processor subsystem. A boot vector for the processor of the processor subsystem is set. The boot vector provides an address associated with a saved processor state. A current state of the processor is saved to provide the saved processor state. The technique determines whether one or more first masked interrupts occurred during the saving of the current state of the processor. The processor that is to be powered-down is stopped when the one or more first masked interrupts did not occur during the saving of the current state of the processor. The technique also determines whether one or more second masked interrupts occurred following the saving of the current state of the processor. The processor is powered-down when the one or more second masked interrupts did not occur following the saving of the current state of the processor.

Abstract: Applications that utilize a database are managed through the use of meta-metadata. The database contains multiple database objects. Each database object has metadata that describes one or more operational characteristics of that database object. Each metadata has an associated meta-metadata, which describes a variance to the metadata. An application program is provided access to one or more database objects. If a change in behavior occurs for the application program that has accessed the database objects, the meta-metadata for the accessed database objects is correlated with the application program accessing the database objects.

Abstract: A vehicle antitheft system and method detects the starting of a vehicle and starts a first timer. If the first timer times out without the system having detected a first predetermined sequence, the system actuates a vehicle system warning signal and starts a second timer. If the second timer times out without detecting a second predetermined sequence, which may be the same as or different from the first predetermined sequence, the system disables the vehicle. The system may send vehicle location information to a monitoring service or the like. The vehicle remains disabled until the antitheft system is reset.

Abstract: A technique of operating a communication device includes identifying a signal null associated with a signal to be transmitted on a first communication channel. A channel gain of the first communication channel is adjusted at a time that substantially coincides with the signal null to reduce transient noise spectrum coupled from the first communication channel to one or more second communication channels.

Abstract: A method, system and computer-readable medium for enhanced instant messaging in a data processing system are disclosed. The instant messaging application detects a number of instant messaging sessions of a first messaging participant with a number of other messaging participants and detects a hierarchy class of each of the other messaging participants. The application calculates an average response time for each of hierarchy classes. The application determines whether the average response time for each hierarchy class exceeds a predefined threshold. If the average response time does not exceed the threshold the application displays an indication of the average response time for the hierarchy class to each of the other messaging participants of the hierarchy class. If the average response time does exceed the threshold, the application displays an indication to each of the other messaging participants of the hierarchy class that the first messaging participant is unable to respond.

Abstract: An apparatus and method for a regulated voltage boost charge pump for an integrated circuit (IC) device. The charge pump generally includes a plurality of switching networks and a lift capacitor that are intermittently coupled to an output capacitor or to a regulating transistor, a differential error amplifier biasing a gate terminal of the transistor, and a controller configured to alternate states of switches in the switching networks in a pre-selected timing relationship with a clock signal of the IC device.

Abstract: In a method of data processing, a database defines a Dial entity and at least one instance of the Dial entity. Each instance of the Dial entity has an input having a plurality of different possible input values and one or more outputs, and each of the plurality of different possible input values has a different associated output value set for the one or more outputs. Each instance of the Dial entity determines a value of at least one of a plurality of configuration latches in a digital system separate from the database. The database also associates with the Dial entity at least one set of biasing weights that, when applied, determines a probability of each instance of the Dial entity having particular ones of the plurality of different possible input values.

Abstract: In a cache coherent data processing system including at least first and second coherency domains, a memory block is stored in a system memory in association with a domain indicator indicating whether or not the memory block is cached, if at all, only within the first coherency domain. A master in the first coherency domain determines whether or not a scope of broadcast transmission of an operation should extend beyond the first coherency domain by reference to the domain indicator stored in the cache and then performs a broadcast of the operation within the cache coherent data processing system in accordance with the determination.

Abstract: A method and system in a portable computer having a display screen for increasing portable computer compactness. Data is displayed initially within the display screen. The display screen is then partitioned into a touch-sensitive input area and a display area, wherein data input at the touch-sensitive input area may be simultaneously displayed in the display area, in response to a particular user input. A test is performed to detect if a user's hands are positioned at the touch-sensitive input area. A touch-sensitive pad is thereafter graphically displayed at the touch-sensitive input area within the display screen, in response to detecting a user's hands positioned at the touch-sensitive area, wherein a user may enter data that may be simultaneously displayed in the display area. An additional test may then be performed to detect if the user's hands are no longer positioned at the touch-sensitive input area.

Abstract: A method, system and computer program product for dynamically establishing a client's Time Sharing Option (TSO) and/or Interactive Productivity System Facility (ISPF) session and maintaining the client's TSO/ISPF session on a zero-downtime/operating system (z/OS) host over multiple service calls. A session provisioning and maintenance (SPM) utility determines whether a TSO/ISPF session exists for a client making a request for a TSO/ISPF service. When a TSO/ISPF session does not exist for the client, session establishment is initiated by generating a TSO initialization module in a new UNIX System Services (USS) process. Session establishment involves initializing a user's own TSO address space through USS and using USS service call API's to make TSO/ISPF service call requests in the TSO address space. The SPM utility maintains the client's TSO/ISPF session over multiple service calls, bypassing the overhead of having to establish a new session for every service request which requires TSO/ISPF services.

Abstract: A method for providing centralized user authorization to allow secure sign-on to a computer system is disclosed. In response to a user attempting to boot up a computer system, a message is sent to a trusted server by a hypervisor within the computer to request a new hard drive password for the computer system. If the user is not authorized to access the computer system, a packet is sent by the trusted server to instruct the hypervisor to stop any boot process on the computer system. If the user is authorized to access the computer system, a packet containing a partial hard drive password is sent by the trusted server to the computer system. The packet is then encrypted with a system public key by the computer system to yield the partial hard drive password. The computer system subsequently combines the partial hard drive password with a user password to generate a new complete hard drive password to continue with the boot process.

Abstract: A method, system and computer program product for performing synthesis of representations is disclosed. The method comprises receiving a representation of a relation and building a gate representing an OR function of one or more selected parent paths into a node of said representation of said relation. A synthesized gate for said gate representing said OR function and synthesis of a set of representations of relations by iterating said building step and said creating step over one or more variables in said representation of said relation is performed to accumulate a synthesized gate set, which synthesized gate set is returned.

Abstract: In at least one hardware definition language (HDL) file, at least one design entity containing a functional portion of a digital system is specified. The design entity logically contains a latch having a respective plurality of different possible latch values. With one or more statements in one or more files, a configuration entity is associated with the latch. The configuration entity has a plurality of different settings and each setting reflects which of the plurality of different possible values is loaded in the associated latch. A controlling value set for at least one instance of the configuration entity is also defined in one or more files. The controlling value set indicates at least one controlling value for which presentation of a current setting of the configuration entity instance is restricted.

Abstract: A method, data processing system and computer program product for optimizing the placement of logic gates of a subcircuit in a physical synthesis flow. A Pyramids utility identifies and selects movable gate(s) for timing-driven optimization. A delay pyramid and a required arrival time (RAT) surface are generated for each net in the selected subcircuit. A slack pyramid for each net is generated from the difference between the RAT surface and delay pyramid of each net. The slack pyramids are grown and tested using test points to generate a worst-case slack region based on a plurality of slack pyramids in the selected subcircuit. The worst-case slack region is mapped on a placement region and a set of coordinates representing the optimal locations of the movable element(s) in the placement region are determined and outputted.

Abstract: Methods, systems and computer program products for synthesizing diagnoses stored in healthcare databases are provided. A diagnosis query associated with a single patient or a group of patients is received. Query results are provided responsive to the diagnosis query. The query results may include diagnoses from multiple sources that are expressed in multiple standards formats.

Abstract: A data processing system includes a plurality of communication links and a plurality of processing units including a local master processing unit. The local master processing unit includes interconnect logic that couples the processing unit to one or more of the plurality of communication links and an originating master coupled to the interconnect logic. The originating master originates an operation by issuing a write-type request on at least one of the one or more communication links, receives from a snooper in the data processing system a destination tag identifying a route to the snooper, and, responsive to receipt of the combined response and the destination tag, initiates a data transfer including a data payload and a data tag identifying the route provided within the destination tag.

Abstract: A storage adapter for use in a data storage subsystem includes a controlling processor, a volatile memory, and a nonvolatile memory “dump device.” The storage adapter also includes a battery that can be used to provide sufficient power to the storage adapter to allow data from the volatile memory to be written to the nonvolatile memory of the storage adapter under the control of the processor in the event of an interruption or failure in the main power supply to the storage adapter, i.e. to preserve data stored in the volatile memory in that event. The processor uses the current state of charge of the battery to determine the amount of data that can be “dumped” to the nonvolatile dump device before the battery is depleted.

Abstract: A method and system for maintaining Static Random Access Memory (SRAM) functionality while simultaneously screening for leakage paths from bitline to ground during Float Mode operation. The SRAM configuration enables SRAM cell selection for a read or write operation. In response to the SRAM cell selection, a group of pre-charge (PCHG) signals are provided with a high value. When selection is made from a top sub-group of SRAM cells, a corresponding bitline, “BLT_TOP”, takes a value which reflects a state stored in the selected cell. In addition, the bitline corresponding to the bottom sub-group of cells, “BLT_BOT”, takes a high value. If there is a leakage defect, BLT_BOT drops to a low value. With no leakage defect, the data stored in the selected cell is determined based on the result of a logical NAND operation including the respective states indicated by the BLT_TOP and by the BLT_BOT.