Patents Represented by Attorney Dillon & Yudell LLP
  • Patent number: 7809739
    Abstract: A method and system for enabling dynamic matching of storage utilization characteristics of a host system application with the characteristics of the available storage pools of an attached distributed storage system, in order to provide an optimal match between the application and selected storage pool. An abstraction manager is provided, enhanced with a storage device configuration utility/module, which performs a series of tasks to (1) obtain/collect the correct configuration information from each connected storage device or storage pools and/or (2) calculate the configuration information when the information is not readily available. The storage device configuration module then normalizes, collates and matches the configuration information to the various applications running on the host system and/or outputs the information to a user/administrator of the host system via a software interface.
    Type: Grant
    Filed: August 5, 2005
    Date of Patent: October 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: James Patrick Allen, Matthew Albert Huras, Thomas Stanley Mathews, Lance Warren Russell
  • Patent number: 7809054
    Abstract: Disclosed are a receiver circuit, method and design architecture of a decision feedback equalizer (DFE) Clock-And-Data Recovery (CDR) architecture that utilizes/produces one sample-per-bit in the receiver and reduces bit-error-rate (BER). An integrating receiver is combined with a decision feedback equalizer along with the appropriate (CDR) loop phase detector to maintain a single sample per bit requirement. The incoming voltage is converted to a current and connected to a current summing node. Weighted currents determined by the values of previously detected bits and their respective feedback coefficients are also connected to this node. Additionally, the summed currents is integrated and converted to a voltage. A sampler is utilized to make a bit decision based on the resulting voltage. After sampling, the integrator is reset before analysis of the next bit. The necessary amplification is achieved by maximizing the sensitivity of the latch, using integration in front of the data latch.
    Type: Grant
    Filed: April 18, 2006
    Date of Patent: October 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: Juan A. Carballo, Hayden C. Cranford, Jr., Gareth J. Nicholls, Vernon R. Norman, Martin L. Schmatz
  • Patent number: 7810065
    Abstract: System and method for designing an electronic package. A placement manager receives a physical design of an electronic package from a packaging design tool. The placement manager receives design constraints regarding the physical design for the electronic package. The placement manager inserts specifications for at least one de-gassing opening in the physical design for the electronic package, wherein the specification for at least one de-gassing opening are created in accordance with said design constraints regarding said physical design of said electronic package. The placement manager outputs an updated physical design of the electronic package.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: October 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: Gerald K. Bartley, Darryl J. Becker, Paul E. Dahlen, Philip R. Germann, Andrew B. Maki, Mark O. Maxson, Trevor J. Timpane
  • Patent number: 7809004
    Abstract: A data processing system includes an interconnect fabric, a protected resource having a plurality of banks each associated with a respective one of a plurality of address sets, a snooper that controls access to the resource, one or more masters that initiate requests, and interconnect logic coupled to the one or more masters and to the interconnect fabric. The interconnect logic regulates a rate of delivery to the snooper via the interconnect fabric of requests that target any one the plurality of banks of the protected resource.
    Type: Grant
    Filed: April 14, 2008
    Date of Patent: October 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: Benjiman L. Goodman, Praveen S. Reddy, Jeffrey A. Stuecheli
  • Patent number: 7810081
    Abstract: A method, system and computer program product for performing error correction are disclosed. The method includes performing on source code a selected compilation operation from among a set of compilation operations and, responsive to encountering an error in the selected compilation operation, running an error handler to isolate the error utilizing data logged for the compilation operation. Responsive to determining that the error handler has not sufficiently isolated the error, a source code modifier is run to modify a portion of the source code selected by reference to the data logged for the compilation operation.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: October 5, 2010
    Assignee: International Business Machines Corporation
    Inventors: Marc A. Dickenson, John D. Upton
  • Patent number: 7805696
    Abstract: A method, system, and computer program product for a faster identification of available reference designators (ARDs) in a design automation system. An ARD utility detects a selection of one or more selected component types for placement on a circuit schematic. A list containing one or more unavailable reference designators (URDs) is sorted through to identify one or more ARDs from the list of URDs. A list of ARDs is then generated, from which a pre-determined portion of ARDs are reserved. The reserved list of ARDs is then outputted for selection by a user.
    Type: Grant
    Filed: October 2, 2007
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventors: Diyanesh Chinnakkonda, Benjamin J. Lyndgaard, John F. Mullen, Trevor J. Richert, Ay Vang
  • Patent number: 7802887
    Abstract: A wiremap projector apparatus for projecting moving three-dimensional images within a three-dimensional viewing space. The wiremap projector apparatus includes an array of wires disposed within a three-dimensional viewing space defined between a first and second sheet. A digital projector is positioned with respect to said array of wires such that the projector projects multiple lighted pixel lines onto the array of wires to display a moving three-dimensional image within the three-dimensional viewing space. A position control actuator includes an actuating force means for moving the one or more wires, and a position controller generates and sends a position control signal to the position control actuator. The position controller generates the position control signal from image data processed by the projector to project multiple lighted pixel lines onto the array of wires to display a moving three-dimensional image within the three-dimensional viewing space.
    Type: Grant
    Filed: April 19, 2007
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventor: Lawrence C. Smith
  • Patent number: 7805695
    Abstract: Within a display device, a respective one of a plurality of design graphical representations is displayed for each of a plurality of hierarchically arranged design entity instances within a simulated system. The design entity instances include a particular design entity instance containing a latch that is represented by a particular design graphical representation. A configuration entity instance associated with the particular design entity is identified within a configuration database associated with the simulated system. The configuration entity instance has a plurality of different settings that each reflects a value of the latch. Within the display device, a configuration graphical representation of the configuration entity instance is presented in association with the particular design graphical representation corresponding to the particular design entity instance.
    Type: Grant
    Filed: July 27, 2007
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventors: Wolfgang Roesner, Derek Edward Williams
  • Patent number: 7805574
    Abstract: A caching mechanism implementing a “soft” Instruction-Most Recently Used (I-MRU) protection scheme whereby the selected I-MRU member (cache line) is only protected for a limited number of eviction cycles unless that member is updated/utilized during the period. An update or access to the instruction restarts the countdown that determines when the cache line is no longer protected as the I-MRU. Accordingly, only frequently used Instruction lines are protected, and old I-MRU lines age out of the cache. The old I-MRU members are evicted, such that all the members of a congruence class may be used for data. The I-MRU aging is accomplished through a counter or a linear feedback shift register (LFSR)-based “shootdown” of I-MRU cache lines. The LFSR is tuned such that an I-MRU line will be protected for a pre-established number of evictions.
    Type: Grant
    Filed: October 3, 2006
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventors: Robert H. Bell, Jr., Jeffrey A. Stuecheli
  • Patent number: 7800403
    Abstract: A universal support device for supporting a reconfigurable electronics device is disclosed. The universal support device includes an application specific integrated circuit (ASIC) module coupled to multiple non-volatile memory devices. The ASIC module is capable of interfacing with an external reconfigurable electronics device via a set of load/read-back interface lines and sense mitigation lines. The load/read-back interface lines are capable of being programmed to provide a parallel or a serial load and/or store protocols. The sense mitigation line can sense conditions that indicate a single-event functional interrupt or a radiation-induced event occurred within the reconfigurable electronics device.
    Type: Grant
    Filed: June 6, 2007
    Date of Patent: September 21, 2010
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventor: Joseph R. Marshall, Jr.
  • Patent number: 7802252
    Abstract: A method and system for selecting the architecture level to which a processor appears to conform within a computing environment when executing specific logical partitions or programs and performing migration among different levels of processor architecture. The method utilizes a “processor compatibility register” (PCR) that controls the level of the architecture that the processor appears to support. In one embodiment, the PCR is accessible only to super-privileged software. The super-privileged software sets bits in the PCR that specify the architecture level that the processor is to appear to support so that when the program runs on the processor, the processor behaves in accordance with the architecture level for which the program was designed.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: September 21, 2010
    Assignee: International Business Machines Corporation
    Inventors: William J. Armstrong, Richard L. Arndt, Michael J. Corrigan, Giles R. Frazier, Timothy R. Marchini, Cathy May, Naresh Nayar, John T. O'Quin, II
  • Patent number: 7796513
    Abstract: A method and system for encoding a set of range labels for each parameter field in a packet classification key in such a way as to require preferably only a single entry per rule in a final processing stage of a packet classifier. Multiple rules are sorted accorded to their respective significance. A range, based on a parameter in the packet header, is previously determined. Multiple rules are evaluated according to an overlapping of rules according to different ranges. Upon a determination that two or more rules overlap, each overlapping rule is expanded into multiple unique segments that identify unique range intersections. Each cluster of overlapping ranges is then offset so that at least one bit in a range for the rule remains unchanged. The range segments are then converted from binary to Gray code, which results in the ability to determine a CAM entry to use for each range.
    Type: Grant
    Filed: August 6, 2008
    Date of Patent: September 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Claude Basso, Jean Louis Calvignac, Gordon Taylor Davis, Clark Debs Jeffries
  • Patent number: 7796354
    Abstract: A method for controlling data rate of a tape drive is disclosed. The tape drive is connected to a computer system. The tape drive stores data by dividing the data into multiple codeword quads (CQs). A local memory within the tape drive includes drive to iteratively monitor data rate during write operations. If a number of CQ skips exceeds a pre-defined threshold value, the drive code reduces a maximum allowable data rate of the tape drive.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: September 14, 2010
    Assignee: International Business Machines Corporation
    Inventor: Roger J. Justo
  • Patent number: 7797588
    Abstract: In a global shared memory (GSM) environment, an initiating task at a first node with a host fabric interface (HFI) uses epochs to provide reliability of transmission of packets via a network fabric to a target task. The HFI generates a packet for the initiating task addressed to the target task, and automatically inserts a current epoch of the initiating task into the packet. A copy of the current epoch is maintained by the target task, which accepts for processing only packets having the correct epoch, unless the packet is tagged for guaranteed-once delivery. When a packet delivery is accepted, the target task sends a notification to the initiating task. If the initiating task does not receive the notification of delivery for the issued packet, the initiating task updates the epoch at both the target node and the initiating node and re-transmits the packet.
    Type: Grant
    Filed: February 1, 2008
    Date of Patent: September 14, 2010
    Assignee: International Business Machines Corporation
    Inventors: Lakshminarayana B. Arimilli, Robert S. Blackmore, Chulho Kim, Hanhong Xue
  • Patent number: 7792904
    Abstract: A method for utilizing an IM system enables presenters and participants to interact with material in a master-slave configuration. Both the presenter and participants access the material locally on their computers. The material on the participants' computer interacts with the presenter's computer using an existing instant messaging infrastructure. As the presenter interacts with local material, events are broadcast to slave material as instant messages, such that these events are reproduced as interactions.
    Type: Grant
    Filed: January 15, 2008
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventor: Swaminathan Balasubramanian
  • Patent number: 7791482
    Abstract: A material is laced with Radio Frequency Identification (RFID) tags at a known concentration of RFID tags per unit of material. Subsequently, if an interrogation of the RFID tags reveals a reduced concentration of RFID tags in the material, then a conclusion is drawn that the material has been diluted.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Robert L. Angell, James R. Kraemer
  • Patent number: 7793113
    Abstract: A method, system and computer program product for updating distributed applications in a multiple application-server environment, in which at least one server receives updates later than another server and update delivery is tracked by an update tracker in the form of a message history, is disclosed. In a preferred embodiment, an application will be distributed across multiple servers and will receive updates from a central repository across a network or other communication fabric. Responsive to starting an application server in the data processing system, a messaging system is contacted over a secure connection to determine whether an application update distribution occurred while the application server was unavailable to update applications, and, responsive to a determination that the application update distribution occurred, an application is received.
    Type: Grant
    Filed: May 21, 2008
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventors: Kulvir S. Bhogal, Alexandre Polozoff, Jr.
  • Patent number: 7791883
    Abstract: A heat exchanger is connected with a heat source in order to dissipate heat generated by the heat source. The fastening apparatus includes a first bracket and a second bracket, both connected to the base, and a first latch element. There is a first opening formed in the first bracket. The first latch element is connected to one side of the heat exchanger, and includes a first protrusion and a first contact section. The first protrusion penetrates through the first opening making the first bracket provide movement limitation to the heat exchanger. The second bracket provides additional movement limitation to the heat exchanger. To separate the heat exchanger from the base, the first contact section is pressed to make the first protrusion move out of the first opening.
    Type: Grant
    Filed: October 4, 2006
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventor: Ian Lin
  • Patent number: 7793184
    Abstract: A method, system and computer readable medium for on-chip testing is presented. In one embodiment, the method, system or computer readable medium includes identifying which LBIST channels of a plurality of LBIST channels do not contribute to a particular test and excluding from that particular test each LBIST channel that does not contribute to that particular test.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: September 7, 2010
    Assignee: International Business Machines Corporation
    Inventor: Steven M. Douskey
  • Patent number: RE41814
    Abstract: A transformer is provided along with a combination of bridging tap-changers to provide a wide range of selectable output voltages in discrete, relatively small voltage steps where the highest voltage is more than double the lowest output voltage. Relatively inexpensive, off-the-shelf, bridging tap-changers are utilized in conjunction with transformer winding schemes to provide a low winding loss ratio.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: October 12, 2010
    Assignee: TAPS Technology, Inc.
    Inventor: Donald W. Owen