Abstract: A measuring head serving to determine both the color purity and the convergence in color TV picture tubes with a specially shaped diaphragm aperture, with the distance of the brightness sensors being adapted to the mutual spacing of the phosphor stripes, permits a wide positioning tolerance when placed in front of the screen of the picture tube. Moreover, to make the determination of the convergence more accurate, the output signal of the measuring head is such that it can be made independent of the influence of the intensity and of the time dependence of the brightness signals.

Abstract: A method of producing an integrated insulated-gate field-effect transistor with an increased breakdown voltage provides in that at least one of the two zones, i.e. the source zone and/or the drain zone is surrounded by a relatively high-ohmic partial zone. This partial zone or the partial zones are first produced by way of ion implantation with the aid of a first implantation mask. After removal of this mask, the entire area of the field-effect transistor is covered with an oxidation masking layer comprising several selectively etchable partial layers, of which the lower partial layer is finally exposed and serves as the gate insulating layer. With the aid of the photoresist mask serving as an etching mask, openings are etched through the oxidation masking layer. The photoresist mask, together with the portions of the oxidation masking layer remaining therebelow, is used as an ion implantation mask for manufacturing both the source zone and the drain zone.

Abstract: An end cap for a windshield wiper motor housing includes a cylindrical shell and an end cap, the end cap being retained on the shell without fasteners. This is achieved by placing the end cap within the shell in a prestressed condition and forming supporting elements on one side of the end cap and holding elements on the other side of the end cap. The supporting and holding elements are axially spaced from each other by an amount less than the thickness of the material of the rim of the end cap so that the rim of the end cap in the finished configuration has a corrugated contom. The forces exerted on the holding and supporting elements by the elasticity of the end cap material effectively prevent the end cap from turning relative to the shell and makes the shell more shock resistant.

Abstract: The binary adder cell is provided for summing three input binary variables A, B and C and has a sum output S and a carry output R. The cell comprises a first complemented exclusive-OR gate receiving the input variables A and B and providing an intermediate variable F.sub.1 =A.sym.B, a second complemented exclusive-OR gate receiving the intermediate variable F.sub.1 and the input variable C and providing the sum output S, a third complemented exclusive-OR gate receiving the input variables A and C and providing an intermediate variable F.sub.3 =A.sym.C and a carry generating circuit for generating the carry output R from the two intermediate variables F.sub.1 and F.sub.3 and the sum output S. The gates and the carry generating circuit are designed with MOS transistors according to the same general structure.

Abstract: For the dynamic compensation of the offset voltage in such converters each non-inverting comparator input (+) is connected via a first transfer transistor (T11, T12, T1p) to the signal input (SE) and via a second transfer transistor (T21, T22, T2p) to the associated voltage divider tap of the voltage divider as applied to the reference voltage (Ur). Moreover, each inverting comparator input (-), via a capacitor (C1, C2, Cp) is applied to the associated voltage divider tap and, via a third transfer transistor (T31, T32, T3p) and across a resistor (R'1, R'2, R'p) arranged in series therewith, to the associated comparator output. The second and third transfer transistors are rendered conductive during short intervals (T) between conversions by the clock signal (F), and the first transfer transistors are rendered non-conductive via the inverter (IV), and during the conversion time (t) the first transfer transistors are rendered conductive, and the second and third transfer transistors are rendered non-conductive.

Abstract: A windshield wiper assembly includes a helical compression spring arranged laterally staggered relative to the wiper shaft in such a way that the center line of the helical compression spring runs alongside the wiper shaft. This permits the wiper arm to be made very compact and low, so that it can be used in motor vehicle windshield wiper installations having a concealed parking position.

Abstract: Between the source of operating voltage (U) and the zero point of the circuit there are provided four series arrangements (s1 . . . s4) of the controlled current paths of each time three insulated-gate field-effect transistors of the same conductivity type, of which the upper transistors (o1 . . . o4) as connected to the source of operating voltage, and the center transistors (m1 . . . m4) are of the depletion type and of identical geometry, while the lower transistors (u1 . . . u4) as connected to the zero point of the circuit, are of the enhancement type and likewise of identical geometry. The center transistors (m1, m3, m4) are connected as a resistors while the gate of the center transistor (m2) is connected to the point connecting the upper and the center transistor (o4, m4). The first input (e1) is connected to the gates of the upper transistors (o1, o3) and the second input (e2) to the gates of the upper transistors (o2, o4). The output of the inverter as formed by the series arrangements (s1 . . .

Abstract: An improved digital integrated chrominance-channel circuit having gain control for color-television receivers includes at least one integrated circuit for digitally processing the composite color signal. The circuit includes a first limiter inserted between a parallel multiplier and a burst-amplitude-measuring stage, and a control stage including a parallel subtracter whose minuend input is fed with a reference signal, and whose subtrahend input is connected to the output of the burst-amplitude-measuring stage. A digital accumulator whose enable input is presented with a signal derived from the trailing edge of a burst gating signal is used as an integrator.

Abstract: A diaphragm pump particularly adapted for use as a fuel pump includes septe caps having pipe unions extending therefrom. The caps are snap-engageable with the pump body.

Abstract: On the deflection unit, the two windings as wound on to each toroidal core half, are subdivided into two winding halves which are each wound from the center of the toroidal core half toward the outside.

Abstract: An improved kit of two integrated circuits having a phase-locked loop clock oscillator for use in a color television receiver utilizing digital signal processing is described. The voltage controlled oscillator and the phase discriminator of the phase-locked loop are each located in a different one of the two integrated circuits. The control signals for the voltage controlled oscillator are transferred into it via a two-wire digital bus. External discrete components are eliminated.

Abstract: To provide a power brake having relatively small hysteresis between brake pedal pressure and brake hose pressure and with compact construction, the push rod leading from the brake pedal to the brake master cylinder is divided into an input rod and an output rod. A pressure sensitive element is disposed between the rods and is displacable therewith. The pressure-sensitive element determines the force with which the servo member acts upon the output rod.

Abstract: A counter for the non-volatile storage of an n-bit word includes a storage matrix having 2.sup.m non-volatile electrically programmable storage elements which may be bitwise selected by means of a word shift register and a bit shift register, a binary counter having m+n bistable flip-flops, with each one of the n Most Significant Bit flip-flops being coupled to a storage cell of a non-volatile storage device, and a clock sequence control for providing reset, erase and write pulses.

Abstract: A digital FM demodulation circuit provides improved resolution by selecting from a group of at least four of the most recent samples, a subgroup of three samples. The first and last samples of the selected subgroup are summed and the sum is divided by the intermediate sample.

Abstract: EEPROM showing storage cells comprising a tunnel injector which at the one hand is connected to a first bit line by means of the source-drain-line of a floating gate FET and at the other hand to a second bit line by means of the source-drain-line of a selection FET. Interferences between addressed groups and not addressed groups of storage cells during writing are eliminated by means of connection of the first bitline of the not addressed groups via the source-drain-lines of a depletion type FET and an enhancement FET to ground.

Abstract: The invention discloses an integrated memory matrix comprising nonvolatile reprogrammable storage (memory) cells arranged in rows and columns, as well as a classifying circuit integrated as well in the semiconductor body of the memory matrix, containing a nonprogrammable reference storage cell (Mr) of the same construction as that of the storage cells, and which is manufactured simultaneously as a comparison standard, with the storage cells. With the aid of a first voltage divider (Q1) integrated as well, whose output voltage is adjustable in steps, and whose output current is fed into the source-drain line of the reference storage cell (Mr) and/or of a second voltage divider (Q2) adjustable in steps and integrated as well, whose output voltage is applied to the control gate of the storage transistor (Ts) of the reference storage cell (Mr), it is possible to simulate a threshold voltage which is compared with the threshold voltages of the storage cells (M11 . . .

Abstract: In this IC set, the dark currents and the white levels of the three electron guns, the leakage currents of the cathodes, and a light-detector current are measured during four successive vertical blanking intervals. The cathode leakage currents and the dark currents are measured in the first half of the vertical blanking interval, and the light-detector current and the white level currents are measured at the end of this interval. From these measured data and alignment data stored in a reprogrammable memory (ps), a microprocessor (mp) contained together with the memory (ps) in an integrated circuit (ic2) derives operating data for the picture tube (b) as well as further data.

Abstract: A process is described for manufacturing integrated insulated-gate field-effect transistors comprising contacts on both the source region and the drain region which are self-aligned with respect to the gate electrode. In this process the gate area and the areas of the aforementioned regions are defined by means of an oxidation masking layer, and on these regions by employing the oxidation masking layer, there are produced insulator layers which are relatively thick compared to the gate insulator layer.

Abstract: This circuit, controlled by the counter (Z) and via the row transistors (ZTm) and upon actuation of a pushbutton key, successively interrogates the row lines (1m) and, via the column line (2n) as connected to the row line, forms an inverter with the corresponding resistor (SRn), so that an L level will appear at the input of the corresponding column inverter (SI1n). In the ROM-type matrix (M), with the aid of the matrix transistors (T . . . ) and the resistors (MRmn) it is accomplished that the m.multidot.n lines (Lmn) are only controlled in such a way that the corresponding line conducts an H level upon actuating only one single pushbutton key of the keyboard (TF). Accordingly, a l-ex-m-times-n code appears on the lines (Lmn) which, via the NOR gate (N) also effects the release of the counter (Z) counting the clock pulses of the clock pulse generator (TG).

Abstract: As is well known, a virtually flicker-free picture is obtained by using a sufficiently high picture-reproducing frequency and doing without interlaced scanning. This is achieved with a suitable standard converter in which the picture is temporarily stored in digital form. By suitable multiplexing, the digital frame store (221, 222, 223) can also be used for the conversion of the text and graphics page. Multiplexer (26) and demultiplexer (27) are switched by a blanking signal (Blank, Blank') which is buffered in the frame store together with the associated picture section.