Abstract: In some embodiment, a circuit is provided that comprises a bit line and bit cells coupled to the bit line. The bit line has an impedance. The bit cells, when operated, are each capable of adjusting the bit line impedance to indicate a stored bit value and a selected one of at least two read ports. Other embodiments are described or otherwise claimed herein.
Type:
Grant
Filed:
December 20, 2004
Date of Patent:
August 29, 2006
Assignee:
Intel Corporation
Inventors:
Steven K. Hsu, Atul Maheshwari, Ram K. Krishnamurthy
Abstract: A socket and fabrication method provide enhanced performance. The socket includes a base, and a plurality of signal contacts disposed within the base. A grounding fence is also disposed within the base such that the grounding fence laterally isolates the signal contacts from one another. The use of a grounding fence therefore enables elimination or significant reduction of ground contacts and therefore provides more signaling opportunities for a given amount of real estate.
Abstract: A fabrication method and semiconductor package provide enhanced performance. The semiconductor package includes a semiconductor die having an integrated circuit (IC), and a substrate having a die side coupled to the IC. A plurality of multi-signal bus bars is coupled to a socket side of the substrate such that the bus bars enable I/O signals to be transported between the substrate and a socket.
Abstract: Polarized electric charge storage devices economically provide high available capacitance. The present invention directly employs polarized electrical charge storage (PECS) devices such as polarized capacitors or electrochemical batteries in general AC applications with a novel circuit topology. In one embodiment, an anti-series configuration of first and second PECS devices are used within an AC network for enhancing operation of the AC network. At least one DC source is provided for maintaining the PECS devices forwardly biased while they are subjected to an AC signal. The AC signal, which drives an AC load, is applied to the anti-series devices. The devices are sufficiently biased by the at least one DC voltage source so that they remain forwardly biased while coupling the AC signal.
Abstract: Objects such as semiconductor wafers to be studied in a scanning electron microscope (SEM) are subject to vibrations which are intensified by vibration resonance of the (thin) wafer, so that the resolution of the SEM is severely degraded. In prior art it is known to support the wafer by means of elastic support members. However, such support members do not counteract the detrimental vibrations. According to the invention there are provided elastic support elements 28 that can accommodate to the inevitable shape errors of the wafer 18 and hence remain in contact with the wafer surface 32. Moreover, the support elements are embodied in such a manner that frictional contact exists between the moving part 38 of the support element and the body 34 of the object carrier 20. The support elements thus provide support which is elastic for macroscopic support but hard for the vibrational movements in the nanometer range, thus inhibiting such vibrational movements.
Abstract: Multi-beam lithography apparatus is used for writing patterns on a substrate 14 such as a wafer for ICs. The patterns may have details of various dimensions. In order to enhance the production rate, it is attractive to write fine details with a small spot 16 and large details with a large spot. It is known to vary the spot size by varying the emissive surface of the electron source. In accordance with the invention the spot size is varied by varying the size 22 of the beam limiting aperture 20, thus enabling optimization of the beam current in dependence on the spot size. A preferred embodiment is provided with an additional (condenser) lens 24 such that the object distance remains constant when the magnification of the lens system 18, 24 is varied.
Type:
Grant
Filed:
December 22, 2000
Date of Patent:
July 15, 2003
Assignee:
FEI Company
Inventors:
Jan Martijn Krans, Peter Christiaan Tiemeijer
Abstract: Polarized electric charge storage devices economically provide high available capacitance. The present invention directly employs polarized electrical charge storage (PECS) devices such as polarized capacitors or electrochemical batteries in general AC applications with a novel circuit topology. In one embodiment, an anti-series configuration of first and second PECS devices are used within an AC network for enhancing operation of the AC network. At least one DC source is provided for maintaining the PECS devices forwardly biased while they are subjected to an AC signal. The AC signal, which drives an AC load, is applied to the anti-series devices. The devices are sufficiently biased by the at least one DC voltage source so that they remain forwardly biased while coupling the AC signal.
Abstract: Polarized electric charge storage devices economically provide high available capacitance. The present invention directly employs polarized electrical charge storage (PECS) devices such as polarized capacitors or electrochemical batteries in general AC applications with a novel circuit topology. In one embodiment, an anti-series configuration of first and second PECS devices are used within an AC network for enhancing operation of the AC network. At least one DC source is provided for maintaining the PECS devices forwardly biased while they are subjected to an AC signal. The AC signal, which drives an AC load, is applied to the anti-series devices. The devices are sufficiently biased by the at least one DC voltage source so that they remain forwardly biased while coupling the AC signal.