Abstract: An apparatus is provided for determining thickness and thermal conductivity for an insulative coating disposed on a substrate in an object. The apparatus includes a source for rapidly applying a multiple optical pulses on a surface of the object, where the surface comprises the insulative coating. The system further includes a recording system configured to collect data representative of the propagation of the optical pulses in the object. The apparatus further includes a processor coupled to the recording system and configured to receive the data from the recording system and configured to determine a thickness value and a thermal conductivity value for the insulative coating.

Abstract: The disclosed embodiments relate to a system and method for correcting a video image. In an exemplary embodiment, an image processing unit (21) comprises an image offset generator (56) configured to calculate a baseline measurement for a first display location of a plurality of display locations, a stretch coefficient generator (58) configured to calculate a stretch coefficient relative to a neighboring display location for a remainder of the plurality of display locations, and an image correction processor (59) configured to correct a default display location of each of the plurality of display locations using the baseline measurement for the first display location and the stretch coefficient for the remainder of the plurality of display locations.

Abstract: A pulsed eddy current pipeline inspection device is provided. The pulsed eddy current pipeline inspection device comprises a plurality of stages longitudinally spaced apart from each other and adapted to move between a contracted position and an expanded position, and a plurality of sensors disposed around at least a portion of a circumference of each of the plurality of stages in the contracted position with at least one gap between sensors in each of the plurality of stages in the expanded position, the plurality of sensors being arranged such that the at least one gap in a first one of the plurality of stages is aligned with a portion of a second one of the plurality of stages that has sensors disposed thereon.

Abstract: Memory modules having accurate operating current values stored thereon and methods for fabricating and implementing such devices to improve system performance. Memory modules comprising a number of volatile memory devices may be fabricated. Operating current values for specific memory devices on the memory module or a specific lot in which the memory devices are fabricated may be stored on a non-volatile memory device on the memory module. A system may be configured in accordance with the operating current values stored on the non-volatile memory device such that operating current thresholds are not exceeded.

Abstract: A forward biasing protection circuit is provided. More specifically, there is provided a device comprising a transistor, a resistive element coupled to the body terminal of the transistor, and a clamping element coupled in parallel to the resistive element and configured to limit a voltage between the source terminal and the body terminal of the transistor. A method of manufacturing the forward biasing protection circuit is also provided.

Abstract: A pulse oximeter method and apparatus which provides (1) a notch filter at a distance between a modulation frequency and a common multiple of commonly used power line frequencies (50, 60, 100 and 120) and also (2) a demodulation frequency greater than a highest pulse rate of a person and lower than any harmonic of 50, 60, 100 or 120 Hz, to filter ambient light interference, while choosing an optimum demodulation frequency that avoids interference from the notch filter or from harmonics of the line interference. Also, ambient light for any low frequency interference, such as power line interference, is measured both before and after each of the light emitter wavelengths and the average of the ambient light is then subtracted from the detected signal.

Abstract: The present invention provides a computer implemented method for maintaining a knowledge base. The method taking as input, text examples that are tagged with a structural markup language; and maps knowledge nodes in the knowledge base with the tagged examples to determine: (1) the knowledge nodes that best match the tagged examples, and (2) the knowledge nodes that are best connected to the tagged examples. The results are displayed to the user, who verifies that the tagged examples match the selected knowledge nodes. Based on the user response, indices of the knowledge nodes are updated. The method may further include determining discrepancies between the existing knowledge base and the tagged examples, and further displaying the discrepancies to the user. The user can update the missing information in the knowledge base to remove the discrepancies in the existing knowledge base.

Abstract: An optical device structure includes a first cladding having a first refractive index, a second cladding having a second refractive index, a core disposed between the first and second claddings, wherein the core has a third refractive index, and wherein the first and second refractive indices are relatively lower than the third refractive index, and a diffusion region disposed between the core and one of the first cladding, the second cladding, or both. A method for making the aforementioned optical device structure is provided.

Abstract: An electronic system according to various aspects of the present invention includes a memory and a supply regulation circuit having a regulated output to provide a selected voltage level. In one embodiment, the supply regulation circuit includes a reference voltage circuit connected to the supply and configured to receive a first voltage and a second voltage and provide a reference voltage and a control circuit connected to the reference voltage and configured to control the regulated voltage according to the reference voltage. The supply regulation circuit also includes an adjustment circuit controlled by the control circuit and configured to adjust the regulated voltage according to the reference voltage. The supply regulation circuit may also include a compensator circuit to provide additional adjustment to the regulated voltage.

Abstract: A catalyst system comprising a catalyst and a reductant is disclosed. The catalyst comprises a metal oxide catalyst support, a catalytic metal oxide, and a promoting metal. The catalytic metal oxide comprises gallium oxide, indium oxide or a combination of the two. The promoting metal comprises at least one of silver, cobalt, vanadium, molybdenum, tungsten, zinc, tin and bismuth. The catalyst comprises about 5 to about 31 mol % catalytic metal oxide and about 0.5 to about 9 mol % promoting metal. The reductant comprises a fluid hydrocarbon having at least 4 carbon atoms. Also disclosed is a process for reducing NOx to N2 using the disclosed catalyst system by mixing NOx with a reductant and passing the mixture through a catalyst of the disclosed catalyst system.

Abstract: The present technique provides for the use of spectroscopic probes, such as Raman probes, within the conduits of a polyolefin production system. The Raman probe or other spectroscopic probes may be used to obtain spectroscopic measurements of the contents of the conduits. The spectroscopic measurements may be processed and analyzed to determine the composition of the conduit contents. In addition, the spectroscopic measurements may be used in conjunction with correlations or other statistical models to determine one or more properties of interest of a constituent of the conduit contents. One or more processes upstream and/or downstream of the conduit may be adjusted in response to the determined composition or composition properties.

Abstract: A system having a memory cell. In certain embodiments, the memory cell includes a resistive memory element, an access transistor having a gate, a first terminal, and a second terminal, and a control transistor having a gate, a first terminal, and a second terminal. The first terminal of the access transistor may be coupled to the resistive memory element, and the gate of the access transistor may be coupled to the gate of the control transistor. Additionally, the first terminal of the control transistor may be coupled to the resistive memory element.

Abstract: A pipelined processor includes a branch acceleration technique which is based on an improved branch cache. The improved branch cache minimizes or eliminates delays caused by branch instructions, especially data-dependent unpredictable branches. In pipelined and multiply pipelined machines, branches can potentially cause the pipeline to stall because the branch alters the instruction flow, leaving the prefetch buffer and first pipeline stages with discarded instructions. This has the effect of reducing system performance by making the branch instruction appear to require multiple cycles to execute. The improved branch cache differs from conventional branch caches. In particular, the improved cache is not used for branch prediction, but rather, the improved branch cache avoids stalls by providing data that will be inserted into the pipeline stages that would otherwise have stalled when a branch is taken.

Abstract: Processes, methods and apparatus relating to olefin oligomerization include the use of Raman spectrometry to monitor the concentration of reactants, products or other chemical components. One or more oligomerization conditions are adjusted in response to those monitored concentrations. The present processes, methods and apparatus are capable of monitoring olefin oligomerization with the use of low resolution Raman spectrometry equipment, even where there is some degree of overlap between Raman spectral peaks. Apparatus for olefin oligomerization reactions have at least one Raman probe located in the oligomerization equipment, the Raman probe providing an output signal, and Raman spectrometry equipment located outside the oligomerization equipment and operatively connected to at least one Raman probe.

Abstract: A relational pulse oximetry alarm system and method is presented for earlier identification of the occurrence of an adverse clinical event. The system includes a pulse oximeter based microprocessor alarm system which provides an alarm based on a relational conformation of a plurality of time series and further based on the recognition of specific dynamic patterns of interaction between a plurality of corresponding and related time series including the occurrence of pathophysiologic divergence of two or more time series outputs. The processor is programmed to compare a first time series to a second time series to produce a comparison result, to identify a relationship between the first time series and the second time series, to identify a relational threshold breach, and to output an alarm based on the relational threshold breach. The system can include an oximeter testing system for predicting the timeliness of the response of the alarm of a pulse oximeter to the occurrence of an adverse clinical event.

Abstract: The disclosed embodiments relate to circuits that produce synchronized output signals. More specifically, there is provided a synchronization circuit adapted to receive an input signal, the synchronization circuit comprising a delay monitor adapted to produce a delayed input signal, a counter adapted to determine a difference between the input signal and the delayed input signal and produce a coarse timing signal in response thereto, a circuit adapted to produce a fine timing signal based on the input signal, and a circuit adapted to combine the coarse timing signal and the fine timing signal to produce an output signal.

Abstract: A method, system, and machine readable media are provided for correcting scatter in an image. The method comprises sequentially emitting radiation from a subset of radiation sources toward a detector array and measuring radiation on areas of the detector array not exposed to the emitted primary radiation at the time of measurement. Scatter is estimated from the measured radiation. Furthermore, the scatter estimates are subtracted from the measured data and images with improved image quality are reconstructed.

Abstract: A combinatorial process for production of material libraries from a single sample, comprising forming a diffusion multiple in the single sample, wherein the diffusion multiple comprises a plurality of interdiffusion regions at interfacial locations of dissimilar metals, metal oxides, or alloys, and wherein the diffusion multiple comprises at least three layers of the metals, non-metals, metal oxides, or alloys; and evaluating properties of the diffusion multiple as a function of composition at about the interdiffusion regions.

Abstract: Methods and apparatus for testing a semiconductor device are disclosed. A flexible circuit interposer includes a flexible circuit substrate which allows in-situ probing of an attached device during, for example, circuit debugging, assembly qualification, and the like. A first set of pads is configured in a predetermined pattern on the bottom surface of a flexible substrate. Similarly, a second set of pads is configured in substantially the same pattern on the top surface of the flexible substrate, wherein each of the pads in the second set of pads is electrically continuous with a corresponding pad in the first set of pads. A third set of pads is configured in the same pad pattern on the top surface of the flexible substrate. One or more conductive traces are formed to connect one or more pads in the first set of pads with spatially-corresponding pads in the third set of pads.

Abstract: A processing architecture includes a first CPU core portion coupled to a second embedded dynamic random access memory (DRAM) portion. These architectural components jointly implement a single processor and instruction set. Advantageously, the embedded logic on the DRAM chip implements the memory intensive processing tasks, thus reducing the amount of traffic that needs to be bussed back and forth between the CPU core and the embedded DRAM chips. The embedded DRAM logic monitors and manipulates the instruction stream into the CPU core. The architecture of the instruction set, data paths, addressing, control, caching, and interfaces are developed to allow the system to operate using a standard programming model. Specialized video and graphics processing systems are developed. Also, an extended very long instruction word (VLIW) architecture implemented as a primary VLIW processor coupled to an embedded DRAM VLIW extension processor efficiently deals with memory intensive tasks.