Abstract: A method for predicting a time to failure of a component in a system is presented. The method comprises obtaining a set of data measurements related to the component. The set of data measurements are representative of a plurality of parameters including a plurality of leading parameters. The method comprises generating a prediction model based upon the leading parameters considered in combination. The prediction model is then used to predict the time to failure of the component based on a set of real-time measurements, wherein the plurality of parameters are processed to predict the time to failure for the component. Finally, a confidence level for the predicted time to failure is determined based upon the plurality of parameters.
Type:
Grant
Filed:
November 23, 2004
Date of Patent:
September 5, 2006
Assignee:
General Electric Company
Inventors:
Rasiklal Punjalal Shah, Vrinda Rajiv, Mark David Osborn, Mahesh Kumar Asati, Piero Patrone Bonissone
Abstract: A technique is provided for interconnecting an embedded antenna with external circuitry. The antenna may be formed on an intermediate layer of a layered structure, such as a laminate. The interconnection may be made by providing an aperture through the laminate structure and a terminal pad of the antenna, and making a physical connection by means of a fastener or similar structure extending through the laminate structure. A conductive fluid or other intermediary material such as epoxy may be provided between the fastener and the embedded antenna terminal pad. Similar connection may be made by capacitive coupling with a terminal pad on an exterior surface of the laminate structure.
Abstract: A technique is provided for generating a three-dimensional image from fluoroscopic projection images. The technique allows for the acquisition of fluoroscopic images at different perspectives relative to a region of interest. One or more three-dimensional images may then be reconstructed from the fluoroscopic projection images. The three-dimensional images may then be displayed to provide anatomic context for the fluoroscopic application. A fluoroscopic projection image, such as the most current fluoroscopic image, may be superimposed on the three-dimensional image if desired.
Type:
Grant
Filed:
December 22, 2003
Date of Patent:
September 5, 2006
Assignee:
General Electric Company
Inventors:
Bernhard Erich Hermann Claus, Jeffrey Wayne Eberhard, David Allen Langan
Abstract: The present invention provides, in one embodiment, a method for automatically analyzing an article of manufacture comprising the steps of a) providing a master model and a context model specification; b) creating a context model from the master model and the context model specification; c) translating the context model into an engineering analysis model compatible with an engineering analysis program; d) executing the engineering analysis program to generate a performance estimate form the engineering analysis model; and e) optionally modifying the master model to improve the performance estimate.
Abstract: A threaded fastener includes a lead having bosses separated from one another by bases along the thread crest. The lead-in and lead-out profiles of the bosses, and other features of the bosses and bases may differ from one another along the fastener shank. The lead-in and lead out profiles may have linear and non-linear surfaces. The lead-in and lead-out profiles may have cutting edges angled toward the direction of propagation of the bosses. The boss profiles may be selected to reduce insertion torque and to provide excellent resistance to pullout. The fastener may be formed by roll threading via a tool made by a plunge EDM process.
Abstract: Systems and methods for identifying the relative contribution of fat and water signals in a magnetic resonance (“MR”) image including an algorithm operable for selecting an image signal model, selecting a scan parameter, forming a bias field estimate, applying a bias correction to a phase image, estimating the signal fraction of fat and water at each of a plurality of voxels, and forming a fat-suppressed image, a water-suppressed image, or a combination of a fat-based image and a water-based image. The (“MRI”) fat suppression systems and methods requiring only a single image acquisition including an algorithm operable for selecting a relative phase of approximately ?=?/2 or another suitable relative phase, employing an expectation maximization algorithm to classify the phase of the complex image, and projecting complex vectors into fat and water components to obtain fat and water images.
Type:
Grant
Filed:
August 15, 2002
Date of Patent:
August 29, 2006
Assignee:
General Electric Company
Inventors:
Daniel Blezek, Paritosh Dhawale, William Dixon
Abstract: A system for monitoring and controlling activation of a warning system includes a sensor module locally coupled to the warning system for sensing and controlling a flashing light of the warning system, a transceiver responsive to a microcontroller, and a power line interface for interfacing between the transceiver and the power line servicing the warning system. The sensor module includes a sensor arranged for sensing the flashing light, the microcontroller coupled to the sensor, and a power supply for providing power to the sensor module.
Type:
Grant
Filed:
December 19, 2002
Date of Patent:
August 29, 2006
Assignee:
General Electric Company
Inventors:
David Davenport, Ralph Hoctor, William Hatfield, Kuna Kishore, Mukesh Soni, Dennis Cusano
Abstract: A conversion device for use in an imaging system is provided. The conversion device includes a first perforated plate portion forming a plurality of collimator channels separated by a plurality of thin collimator walls. A second perforated plate portion forming a plurality of scintillator channels separated by a plurality of thin scintillator walls is attached to the first perforated plate portion. A reflective coating is applied to the inside scintillator surface of the plurality of thin scintillator walls. A scintillator material is filled into the plurality of scintillator channels.
Type:
Grant
Filed:
August 4, 2003
Date of Patent:
August 29, 2006
Assignee:
General Electric Company
Inventors:
Robert Joseph Lyons, Martin Kin-Fei Lee, Venkat Subramaniam Venkataramani, Clifford Bueno, James Walter LeBlanc, James Scott Vartuli, Charles David Greskovich, Stephen F. Bancheri
Abstract: A method and apparatus of initial synchronization, or acquisition, of time modulated ultra-wideband (UWB) communications uses a transmitted-reference preamble. The method and apparatus require that the transmitter first send a time-reference, delay-hopped (TR/DH) burst; such a burst is easily detected and can be processed to provide a time mark accurate to within a few nanoseconds. Following the transmission of the TR/DH burst, the transmitter waits a fixed period of time, the duration of which is known to the receiver, and then the transmitter sends a burst of pulse position modulation, time hopped (PPM/TH) or other time modulated UWB. After the reception of the first burst, the receiver can estimate the time of reception of the second burst to the accuracy of the time mark.
Type:
Grant
Filed:
April 19, 2002
Date of Patent:
August 29, 2006
Assignee:
General Electric Company
Inventors:
Ralph Thomas Hoctor, Stephen Michael Hladik
Abstract: A forward biasing protection circuit is provided. More specifically, there is provided a device comprising a transistor, a resistive element coupled to the body terminal of the transistor, and a clamping element coupled in parallel to the resistive element and configured to limit a voltage between the source terminal and the body terminal of the transistor. A method of manufacturing the forward biasing protection circuit is also provided.
Abstract: A unique cell structure for use in flash memory cell and a method of fabricating the memory cell. More particularly, a vertically integrated transistor having a pair of floating gates is fabricated within a trench in a substrate. The floating gates are fabricated using sidewall spacers within the trench. A doped region is buried at the bottom of the trench. The structure can be fabricated such that the buried doped region provides a connecting layer in a multi-bit flash memory cell. Alternatively, the buried doped region may be used as a buried bitline in a single bit flash memory cell.
Abstract: The present technique relates to a method and apparatus for managing voltage buses. In a memory device, such as SRAM or DRAM, a periphery voltage bus may supply voltage to periphery circuitry and an array voltage bus may supply voltage to array circuitry. A bridge circuit may be utilized to isolate the buses from each other and couple the buses together, depending on the control signals are received by the bridge circuit. As such, the bridge circuit enhances the operation of the memory device by reducing duplicative circuits and equalizing the voltage that are applied to the buses. In addition, the bridge circuit isolates the buses from each other to protect sensitive circuitry in the array and periphery circuitry from noise on the other bus.
Abstract: A method for optical coupling comprises: includes providing a holographic recording media fixed relative to at least two optical elements; creating a hologram by transmitting light from each of the optical elements to the recording media; and transmitting light from a sending element of the optical elements through the recording media to a receiving element of the optical elements. Other variations include a system comprising at least two optical elements situated on one side of the recording media and an optical detector situated on an opposite side for detecting light transmitted through the opposite side; and a system comprising at least three optical elements situated on one side of the recording media, a beam splitter, and optical pump/control beams configured for transmitting an optical pump/control beam to the beam splitter and the opposite side so as to control transmission of an optical signal.
Abstract: Techniques for automatically generating three dimensional geometric circuit models from a computer aided design (CAD) of a light emitting diode (LED) device. The models may comprise a robust netlist that may be executed using circuit simulation packages. The spatial positioning of each element in the design is preserved during simulation, such that simulation output data can be used to reconstruct a geometric rendition or map of the electrical current flowing through the LED device. The output data from the circuit simulation may then used to reconstruct a three-dimensional rendition of the current spreading uniformity across the design and a quantitative value for the uniformity may be obtained. Using the present techniques, a designer can predict the current spreading uniformity for any particular LED layout, isolate and correct current crowding areas, and reevaluate the design to meet uniformity specifications.
Abstract: The present disclosure provides for an optical metrology system for scanning an object (106) having a shiny surface. The optical metrology system includes at least one light source (102) configured and adapted to emit a structured light pattern (L) against the surface of the object, at least one first polarizer (108) disposed between the light source and the object such that the light pattern passes therethrough, the first polarizer being configured and adapted to vary at least one of the plane of polarization and the polarization angle of the light pattern, at least one camera (124a–124c) configured and adapted to take images of the object, and at least one second polarizer disposed between the camera and the object, the second polarizer having a fixed orientation.
Abstract: Method and apparatus are disclosed for regulating an antifuse programming current by lightly doping an electrically connected region so that the resistance of the region responds in a non-linear manner to changes in voltage. In this way a variable resistor or a variably resistive transistor may be created which vary their resistance in response to an applied voltage and which may thereby limit a programming current while not limiting a lesser, reading current to a serially connected antifuse.
Abstract: A seal having a first seal mechanism adapted for insertion between a first structure and a second structure, wherein the first structure is in communication with a first medium and the second structure is in communication with a second medium. The seal also includes a second seal mechanism, which is pressuringly biasable against the first seal mechanism and against the second structure by the second medium. In certain embodiments, a system has a first structure in communication with a first medium and a second structure houses a seal assembly between the first and second structures. The seal assembly includes an interface seal disposed against the first structure and a flexible seal pressuringly biased against the second structure and the interface seal by a second medium.
Type:
Grant
Filed:
March 31, 2004
Date of Patent:
August 15, 2006
Assignee:
General Electric Company
Inventors:
Nitin Bhate, Raymond Edward Chupp, Kevin Bruce, Alberto Jose Negroni, Ronald Ralph Cairo
Abstract: A recycling and recovery system and process comprising a flash gas separator that receives a slurry comprising liquid medium and solid polymer particles. The flash gas separator separates the diluent from the solid polymer particles as a vapor stream comprising at least diluent and heavies. A line receives the vapor stream from the flash gas separator. The line leads to a heavies removal system that yields a liquid that is relatively concentrated in heavies and a diluent vapor that is relatively free of heavies. The liquid is passed to a heavies column while the diluent vapor is passed to a diluent recycle chamber and then recycled to a slurry polymerization reactor without additional treatment to remove heavies.
Abstract: A technique is provided for securely storing user data and generating user reports. The user data is input manually or automatically and is transmitted to a service provider via a network. The data is stored in a secure database operating in a processing space which is not directly accessible to the user directly. Based upon pre-established report templates, user data is extracted from the secure database, and is exported from the secure processing space for use in generating user reports. The reports are formed in a second processing space, by combining the data file with the report template. The report may then be transmitted to the user automatically or may be accessed by the user via the network.