Patents Represented by Attorney Fletcher Yoder
  • Patent number: 6776599
    Abstract: A method and device for providing a gate blocking material. Specifically, a method for molding a substrate having known good and bad sites thereon, by blocking the gate area of the bad sites during the molding process. A blocking material or an injection pin are used to interrupt the flow of molding compound through an injection molding system, and thereby prevent molding compound from flowing onto the known bad substrate sites.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: August 17, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Bret K. Street, Casey L. Prindiville, Cary Baerlocher
  • Patent number: 6777330
    Abstract: Titanium-containing films exhibiting excellent uniformity and step coverage are deposited on semiconductor wafers in a cold wall reactor which has been modified to discharge plasma into the reaction chamber. Titanium tetrabromide, titanium tetraiodide, or titanium tetrachloride, along with hydrogen, enter the reaction chamber and come in contact with a heated semiconductor wafer, thereby depositing a thin titanium-containing film on the wafer's surface. Step coverage and deposition rate are enhanced by the presence of the plasma. The use of titanium tetrabromide or titanium tetraiodide instead of titanium tetrachloride also increases the deposition rate and allows for a lower reaction temperature. Titanium silicide and titanium nitride can also be deposited by this method by varying the gas incorporated with the titanium precursors.
    Type: Grant
    Filed: May 13, 2002
    Date of Patent: August 17, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Sujit Sharan, Howard E. Rhodes, Philip J. Ireland, Gurtej S. Sandhu
  • Patent number: 6778404
    Abstract: A stackable package to create a 3-dimensional memory array using ball grid array technology. Specifically, memory chips are coupled to a pre-formed packages which have alignment features to allow for the stacking of the ball grid arrays. The alignment features are used to align and orient each package with respect to an adjacent package, substrate or printed circuit board. The alignment features also support the weight of the adjacent package during solder ball reflow to maintain stack height and parallelism between packages. Each memory device is serially connected to the adjacent memory device through the vias and solder balls on each package.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: August 17, 2004
    Inventors: Todd O. Bolken, Cary J. Baerlocher, Chad A. Cobbley, David J. Corisis
  • Patent number: 6772510
    Abstract: A method and apparatus for attaching an integrated circuit die to a leadframe or substrate. Specifically, a wafer, which is populated with integrated circuit dies, is electrically tested and a wafer map is generated depicting the electrically good dies. An adhesive material is deposited on only the electrically good dies in accordance with the wafer map. The electrically good integrated circuit die may then be attached to a leadframe or substrate.
    Type: Grant
    Filed: August 22, 2000
    Date of Patent: August 10, 2004
    Inventor: David J. Corisis
  • Patent number: 6767817
    Abstract: A method and apparatus are disclosed for forming a tapered contact structure over a contact pad. The tapered contact structure may be used to securely anchor an overlying solder bump or solder ball. Additionally, the tapered contact structure allows the use of either larger contact pads or, alternately, allows a greater density of contact pads to be achieved on an integrated circuit substrate.
    Type: Grant
    Filed: July 11, 2002
    Date of Patent: July 27, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Joseph T. Lindgren
  • Patent number: 6768697
    Abstract: The illustrated embodiments relate to a control circuit that uses a latency signal to generate an output signal. The latency is used to create a control signal that is dependent on the latency signal. The control signal is used to select from among multiple input sources. The selected input source is used to create an output signal.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: July 27, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Nick N. Labrum, Paul A. Silvestri
  • Patent number: 6765983
    Abstract: A technique is provided for reducing motion-related artifacts present in CT images attributable to the dynamic nature of the imaged tissue or the time-varying concentration of a contrast agent. A region of interest that encompasses a structure of diagnostic significance is selected. For projections acquired by the various rows of detectors in a multi-slice CT imaging system, the portions of the projections attributable to the projection of the region of interest are averaged for each view angle. The projections containing these averaged values are then combined with the projections which do not encompass the region of interest. The combined projection set may be reconstructed to form a CT image of the dynamic tissue. In addition, a smoothing step may be performed to interpolate projection values around the region of interest to smooth the visual transition to the unaveraged portions of the image.
    Type: Grant
    Filed: December 13, 2002
    Date of Patent: July 20, 2004
    Assignee: General Electric Company
    Inventors: Weizhong Yan, Peter Michael Edic, Maria Iatrou, Kai Frank Goebel, Erdogan Cesmeli
  • Patent number: 6763578
    Abstract: A method and apparatus for fabricating known good semiconductor dice are provided. The method includes the steps of: testing the gross functionality of dice contained on a semiconductor wafer; sawing the wafer to singulate a die; and then testing the die by assembly in a carrier having an interconnect adapted to establish electrical communication between the bond pads on the die and external test circuitry. The interconnect for the carrier can be formed using different contact technologies including: thick film contact members on a rigid substrate; self-limiting contact members on a silicon substrate; or microbump contact members with a textured surface. During assembly of the carrier, the die and interconnect are optically aligned and placed into contact with a predetermined contact force. This establishes an electrical connection between the contact members on the interconnect and the bond pads of the die.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: July 20, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Warren Farnworth, Alan Wood
  • Patent number: 6756815
    Abstract: The disclosed embodiments relate to an input buffer circuit. The input buffer circuit comprises a first input buffer having a first operational characteristic and a second input buffer having a second operational characteristic. The output of the first input buffer or the second input buffer is selected responsive to buffer selection input data.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: June 29, 2004
    Assignee: Micron Technologies, Inc.
    Inventor: Scott Van De Graaff
  • Patent number: 6752912
    Abstract: In a sputtering apparatus, target particles to be deposited onto a substrate are selectively ionized relative to other particles in the deposition chamber. For example, titanium or titanium-containing target particles are selectively ionized, while inert particles, such as argon atoms, remain substantially unaffected. Advantageously, one or more optical ionizers, such as lasers, are used to create one or more ionization zones within the deposition chamber in which such selective ionization takes place.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: June 22, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej S. Sandhu
  • Patent number: 6754883
    Abstract: An information management system produces a standard bill of resources based on bills of resources that include a list of resources to be utilized in performing a procedure. The system includes a general purpose computer system with storage means, processing means, display means, and input means. Information management software installed on the general purpose computer includes node software objects providing a health care information management function, including a clinical pathway node software object, a case management node software object, and a standardization review node software object. The clinical pathway node software object creates clinical pathway module software objects, including resource software objects and container software objects.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: June 22, 2004
    Assignee: GE Medical Systems Information Technologies, Inc.
    Inventors: Brian C. DeBusk, Elizabeth C. DeBusk, Mark W. Shanks, Michael C. Cofer, W. Francis Lukens
  • Patent number: 6748044
    Abstract: The present technique provides a method and system for generating tomographic mammography data and processing the data using a computer aided detection and diagnosis (CAD) algorithm. The CAD algorithm may perform various types of analysis, including segmentation, feature extraction, and feature classification. The acquired data may be processed in parallel by the CAD algorithm such that information derived from one processing path may be used to enhance or alter the processing of data in a parallel processing path. The processed data may be used to provide an enhanced mammographic image with features of interest marked for inspection by a radiologist. The features of interest may also be classified to aid the inspection by the radiologist.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: June 8, 2004
    Assignee: GE Medical Systems Global Technology Company, LLC
    Inventors: John M. Sabol, Gopal B. Avinash, Matthew J. Walker
  • Patent number: 6735860
    Abstract: An improved die edge contacting socket incorporates particles of a thermally conducting material into an elastomeric compression pad disposed in the sealing cap of the socket. The elastomeric compression pad is preferably composed of an electrically insulating material, such as a silicone-based gel. The thermally conducting material is preferably either diamond, beryllium oxide, silicon nitride, or a like material.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: May 18, 2004
    Assignee: Micron Technology, Inc.
    Inventor: Warren M. Farnworth
  • Patent number: 6734089
    Abstract: Fabrication techniques for making a semiconductor device. More specifically, techniques for fabricating a wordline in a memory device are provided. Specific heat treatments may be added to the process flow to remove or weaken certain layers formed in the wordlines. For instance, an SiNx layer and a crystallized W2N layer may form during the fabrication of the wordline. While the layers may provide certain advantages at certain points in the fabrication process, they may be undesirable at subsequent points. One or more anneal processes may be implemented at various points in the processing to eliminate the crystallized W2N layer and weaken the SiNx layer.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: May 11, 2004
    Inventors: Yongjun Jeff Hu, Satish Bedge, Kevin Torek
  • Patent number: 6734372
    Abstract: A method and device for providing a relief area on the surface of a molded I/C package. Specifically, a method of reducing delamination at the gate area of a molded I/C package by disposing an area of patterned metal traces on the substrate surface to form a relief area. The relief area will permit the I/C package to be broken away form the molding apparatus while reducing the possibility of delamination or Au/Cu burs at the gate area.
    Type: Grant
    Filed: April 23, 2002
    Date of Patent: May 11, 2004
    Assignee: Micron Technology, Inc.
    Inventors: Stephen L. James, Richard W. Wensel, Brad D. Rumsey
  • Patent number: D490063
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: May 18, 2004
    Assignee: Atlinks.USA, Inc.
    Inventor: John M. Miller
  • Patent number: D490066
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: May 18, 2004
    Assignee: Atlinks USA., Inc.
    Inventor: Ronald L. Lytel
  • Patent number: D490067
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: May 18, 2004
    Assignee: Atlinks USA, Inc.
    Inventor: Paul S. Haney
  • Patent number: D490794
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: June 1, 2004
    Assignee: Atlinks USA, Inc.
    Inventor: Brett L. Rathmell
  • Patent number: D491159
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: June 8, 2004
    Assignee: Atlinks USA, Inc.
    Inventor: Ronald L. Lytel