Patents Represented by Attorney Fogg and Associates, LLC
  • Patent number: 7151344
    Abstract: An electroluminescent driver circuit with improved power consumption efficiency. In one embodiment, an electroluminescent driver circuit comprises a load to provide illumination, an inductor, a transistor and a plurality of switches. The inductor has a first side coupled to a positive terminal of a power supply and a second side selectively coupled to the load. The transistor is coupled to selectively conduct current from the second side of the inductor to a ground terminal of the power supply in response to a digital signal. The plurality of switches are coupled to the load to selectively charge and discharge the load. Moreover, the switches selectively provide a discharge path for positive charge on the load to be discharged to the positive terminal of the power supply.
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: December 19, 2006
    Assignee: Intersil Americas Inc.
    Inventor: Grady M. Wood
  • Patent number: 7146528
    Abstract: Methods and an associated apparatus are disclosed for providing fault tolerance for memory. The method involves generating a remapping value. Then the remapping value may be logically combined with the address value intended for accessing a given memory location to remap the bad address to an unused address.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: December 5, 2006
    Assignee: Honeywell International Inc.
    Inventor: Kevin Raymond Driscoll
  • Patent number: 7141941
    Abstract: In order to minimize switching-induced electromagnetic interference in a power supply switching circuit of the type used to control the AC power for multiple high voltage devices, such as cold cathode fluorescent lamps employed for backlighting a large scale liquid crystal display, the gating signals that are used to switch lamp-driving inverter circuits ON and OFF are staggered, or slightly offset in time, so that no two switching devices will be switched at the same time. By slightly offset in time is meant that the time differential between any pair of switching signals is relatively small compared to the period of the switching signal frequency. This has the effect of spreading out and thereby diminishing the magnitude of the spectral content of both capacitively and inductively coupled transients that are produced at switching times of the inverter circuits.
    Type: Grant
    Filed: October 19, 2004
    Date of Patent: November 28, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Robert L. Lyle, Jr., Lawrence George Pearce
  • Patent number: 7142538
    Abstract: A method for communicating between cards in an electronic module is provided. The method includes generating a message for transmission at a first card. The message is transmitted over a bus to a second card by-passing an IP stack at the first card. A queue at the second card is monitored for messages from the first card. A message is read from the queue at the second card when received from the first card.
    Type: Grant
    Filed: December 22, 2001
    Date of Patent: November 28, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventors: Ashok Kumar Singh, Lin Wu, Dapeng Xiong, Celine Yonghong Wang
  • Patent number: 7142592
    Abstract: A device for determining speeds of a digital signal in a serial transmission line. The device comprises a first and second counter and a logic circuit. The first counter is adapted to count the duration of a first pulse in a first byte of the digital signal in the transmission line. The second counter is adapted to count the duration of a second pulse in the first byte. The logic circuit is coupled to the first and second counters. The logic circuit is adapted to compare the smallest duration of the first and second pulses with a plurality of pulse duration's of known baud rates to determine the baud rate of the digital signal in the transmission line.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: November 28, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventors: L. Grant Giddens, Charles Weston Lomax, Jr., Ronald R. Munoz
  • Patent number: 7142355
    Abstract: An ultra-low RIN band fiber light source is provided. In one embodiment, the fiber light source includes at least one segment of optical fiber, one or more pump lasers, at least two wavelength division multiplexers and a reflective device. Each pump is adapted to output a power signal having a select wavelength and a select power level. Each wavelength division multiplexer is adapted to couple an associated power signal from at least one of the one or more pumps into the at least one segment of optical fiber to generate amplified spontaneous emission (ASE) signals having select parameters in the at least one segment of optical fiber. The reflective device is coupled to an end of the at least one segment of optical fiber and is adapted to reflect back a portion of the ASE signals.
    Type: Grant
    Filed: February 28, 2005
    Date of Patent: November 28, 2006
    Assignee: Honeywell International Inc.
    Inventors: Sidney X. Huang, Timothy L. Spicer
  • Patent number: 7139177
    Abstract: A circuit board includes at least one insulator layer and a plurality of conductors over which a plurality of signals is carried. A plurality of terminals is coupled to at least a subset of the plurality of conductors. A void is formed in the circuit board between at least two terminals.
    Type: Grant
    Filed: October 28, 2003
    Date of Patent: November 21, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventor: Gary Gottlieb
  • Patent number: 7133367
    Abstract: The present invention relates to a method and apparatus for testing components in ATM networks utilizing loop-back based ATM layer testing. The method and apparatus utilize interfaces and identifier codes to send and loop-back test cells along portions of virtual channels to test the virtual channels.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: November 7, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventors: Randall L. Powers, Robert S. Kroninger, Melvin R. Phillips, Dieter H. Nattkemper
  • Patent number: 7126521
    Abstract: A two-dimensional all-digital ratiometric decoder to analyze signals representative of state changes in a closed loop control system. In one embodiment, the two-dimensional digital ratiometric decoder comprises at least one selector circuit, a summation circuit, a difference circuit and a divider circuit. The at least one selector circuit is adapted to select the signals to be processed by alternating between the signals representative of the X dimension and the signals representative of the Y dimension. The summation circuit is adapted to add the amplitude magnitudes of the signals selected. The difference circuit is adapted to obtain the difference between the amplitude magnitudes of the signals selected. The divider circuit is adapted to divide the output of the difference circuit by the output of the summation circuit to produce a quotient proportional to the physical change of the object being controlled.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: October 24, 2006
    Assignee: Honeywell International Inc.
    Inventor: Paul Barcelona
  • Patent number: 7119702
    Abstract: A device to audibly verify the activation of a solid state relay. The device includes an audio output device that is coupled to the solid state relay to produce a sound when the solid state relay is activated. The sound produced by the audio output devices emulates the sound of an electromechanical relay when switched.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: October 10, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventor: Ronald R. Gerlach
  • Patent number: 7120522
    Abstract: A method for recursively determining alignment of a flight vehicle during flight is provided. The method includes generating data in a reference coordinate frame and in a second coordinate frame at a plurality of points in time during the flight, recursively generating first and second matrices from the data in the reference coordinate frame and the second coordinate frame, and at each point in time, determining an alignment output based on the inverted first matrix and the second matrix.
    Type: Grant
    Filed: April 19, 2004
    Date of Patent: October 10, 2006
    Assignee: Honeywell International Inc.
    Inventor: Shing P. Kau
  • Patent number: 7112463
    Abstract: Methods for using ink-jet printing to deposit various layers of micro-structure devices are provided. A wide variety of micro-structures may be formed using these techniques including, for example, many forms of MEMs structures as well as other structures.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: September 26, 2006
    Assignee: Honeywell International Inc.
    Inventors: Robert Horning, Thomas Ohnstein, Daniel Youngner
  • Patent number: 7113591
    Abstract: Managing line power for network elements in an access network. In one embodiment a current sense system in a line power network is disclosed. The current sense system includes a power supply, a splitter and a sense circuit. The power supply is adapted to supply output current to a twisted pair drop. The splitter is adapted to combine communication signals and the output current on a twisted pair drop. The sense circuit is coupled to sample the output current of the power supply between the power supply and the splitter. The sense circuit is further adapted to output a sense signal that is representative of the output current.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: September 26, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventors: Charles Weston Lomax, Jr., Christopher Tad Ammann, Randall L. Powers
  • Patent number: 7110933
    Abstract: A method of a modeling metallization parasitics with the use of a simulation program. In one embodiment, a method of simulating interconnect lines in an electronic design automation simulation is disclosed. The method comprises partitioning the interconnect lines into groups of interconnect lines. Each group of interconnect lines does not have interactions with any of the other groups of interconnect lines. Moreover, at least one of the groups of interconnect lines contains at least three interconnect lines. The interconnect lines in each group are modeled. The modeling includes at least one of modeling mutual inductances and modeling of mutual capacitances.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: September 19, 2006
    Assignee: Intersil Americas Inc.
    Inventors: Rex E. Lowther, Gregg D. Croft, Yiqun Lin, Robert Lomenic, James P. Furino, Jr., Joseph A. Czagas
  • Patent number: 7106758
    Abstract: A method for synchronizing a service clock at a destination node with a service clock at a source node is provided. The method includes receiving data packets from a source node at at least one port of the destination node. At the destination node, the method determines control values for a numerically controlled oscillator for a plurality of time periods. The method selectively uses the control values to set the frequency of a service clock at the destination node for use in receiving data packets.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: September 12, 2006
    Assignee: ADC Telecommunications, Inc.
    Inventors: Jonathan R. Belk, Richard A. Nichols
  • Patent number: 7106573
    Abstract: A protection circuit for a DSL transceiver unit includes a capacitor connected in series between a first and second portion of a primary winding of a transformer. The first and second portions are coupled to first and second lines, respectively, of a twisted-pair telephone line. A first voltage controlled device is coupled to the first line and a chassis ground. The first voltage controlled device has a first threshold turn-on voltage at which the first voltage controlled device provides a first current path from the first line to chassis ground. A resistive device and a second voltage controlled device are coupled across the capacitor in series. The second voltage controlled device has a second threshold turn-on voltage at which the second voltage controlled device provides a second current path from a first capacitor terminal of the capacitor to a second capacitor terminal of the capacitor. The second threshold turn-on voltage is lower than the first threshold turn-on voltage.
    Type: Grant
    Filed: June 16, 2003
    Date of Patent: September 12, 2006
    Assignee: ADC DSL Systems, Inc.
    Inventor: Janusz M. Kucharski
  • Patent number: 7100321
    Abstract: A range finder for hunting applications. In one embodiment, a method of using a range finder is disclosed. The method comprises coupling the range finder to a weapon having an associated scope. Positioning at least part of a display of the range finder in front of a select portion of the associated scope. Activating the range finder. Determining the distance to a target and displaying the distance to the target through optics of the scope.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: September 5, 2006
    Inventor: Larry Holmberg
  • Patent number: 7103377
    Abstract: A method for signal gain adjustment in a multi-port, digital distributed antenna system uses a sorter to sort received signals in ascending order according to their signal levels. A threshold comparator generates a dynamic range fair threshold that is updated as any remaining system dynamic range is distributed amongst the remaining signals. Any received signal that is less than or equal to the threshold is attenuated with a unity gain factor. A signal that is greater than the threshold is attenuated with a gain factor that is inversely proportional to the signal level.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: September 5, 2006
    Assignee: ADC Telecommunications, Inc.
    Inventors: Donald R. Bauman, Philip M. Wala, Jerry Edward Toms
  • Patent number: 7097714
    Abstract: The cleaning of particles from an electrostatic chuck. In one embodiment, a method of cleaning an electrostatic chuck in a processing chamber is disclosed. The method comprises directing a flow of gas across the electrostatic chuck to dislodge particles from the electrostatic chuck and removing the flow of gas and particles through an exhaust port in the processing chamber. In this embodiment, the vacuum integrity of the chamber is not compromised during the cleaning of the electrostatic chuck.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: August 29, 2006
    Assignee: Intersil Americas Inc.
    Inventor: John J. Hackenberg
  • Patent number: 7098809
    Abstract: A display control device, having a processor structured for receiving terrain elevation information and samples of current position and altitude above ground data; and one or more algorithms resident on the processor for generating, as a function of the current position and altitude above ground data, one or more display control signals for causing a display device to display, in a monochromatic scale graduated as a function of terrain elevation relative to mean sea level, a strategic portion of the terrain elevation information extending between a minimum elevation of the strategic portion of the terrain elevation information and a pre-selected strategic altitude threshold less than the altitude above ground data.
    Type: Grant
    Filed: February 18, 2003
    Date of Patent: August 29, 2006
    Assignee: Honeywell International, Inc.
    Inventors: Thea L. Feyereisen, Christopher J. Misiak