Patents Represented by Attorney Francis Lammes
  • Patent number: 7617307
    Abstract: A mechanism is provided for integrating a user resource into a managed computing resource system. If a level of data privacy indicating a first level of dedicated computing resources, a user resource is integrated into a first logical design. Responsive to the level of data privacy indicating a second level of dedicated computing resources, the user resource is integrated into a second logical design. If there is no indication of the level of data privacy and the user resource has at least one associated unique IP address, a capacity of a point of deployment (POD) device is determined. If there is no indication of the level of data privacy and no unique IP address, the user resource is integrated into the first logical design. If the user resource utilizes a predefined percentage of the capacity, the user resource is integrated into a third logical design.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: November 10, 2009
    Assignee: International Business Machines Corporation
    Inventors: Rhonda L. Childress, Kenneth David Christiance, David Bruce Kumhyr, Michael Arthur Lamb, Gregg W. Machovec, Neil Raymond Pennell
  • Patent number: 7613873
    Abstract: A memory system employs calibrations to ensure the precise transmission of data. During calibrations, memory refreshes can occur; however, these refreshes can interfere with calibration streams. Therefore, to alleviate collisions and interferences, refreshes are deferred to periods where no calibrations are taking place. The number of deferred refreshes is also tracked such that the overall loss of refreshes is prevented.
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: November 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Mark David Bellows, Ryan Abel Heckendorf
  • Patent number: 7596665
    Abstract: The present invention provides a mechanism for a processor to write data to a cache or other fast memory, without also writing it to main memory. Further, the data is “locked” into the cache or other fast memory until it is loaded for use. Data remains in the locking cache until it is specifically overwritten under software control. The locking cache or other fast memory can be used as additional system memory. In an embodiment of the invention, the locking cache is one or more sets of ways, but not all of the sets or ways, of a multiple set associative cache.
    Type: Grant
    Filed: October 18, 2007
    Date of Patent: September 29, 2009
    Assignee: International Business Machines Corporation
    Inventors: Michael Norman Day, Charles Johns, Thuong Truong
  • Patent number: 7590802
    Abstract: The present invention provides a mechanism of storing data transferred from an I/O device, a network, or a disk into a portion of a cache or other fast memory, without also writing it to main memory. Further, the data is “locked” into the cache or other fast memory until it is loaded for use. Data remains in the locking cache until it is specifically overwritten under software control. In an embodiment of the invention, a processor can write data to the cache or other fast memory without also writing it to main memory. The portion of the cache or other fast memory can be used as additional system memory.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: September 15, 2009
    Assignee: International Business Machines Corporation
    Inventors: Michael Norman Day, Charles Johns, Thuong Truong
  • Patent number: 7584308
    Abstract: A memory system is provided that supports partial cache line write operations to a memory module to reduce write data traffic on a memory channel. The memory system comprises a memory hub device integrated in the memory module and a set of memory devices coupled to the memory hub device. The memory hub device comprises burst logic integrated in the memory hub device. The burst logic determines an amount of write data to be transmitted to the set of memory devices and generates a burst length field corresponding to the amount of write data. The memory hub also comprises a memory hub controller integrated in the memory hub device. The memory hub controller controls the amount of write data that is transmitted using the burst length field. The memory hub device transmits the amount of write data that is equal to or less than a conventional data burst amount.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: September 1, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kevin C. Gower, Warren E. Maule
  • Patent number: 7577761
    Abstract: Enabling user space middleware or applications to pass file name based storage requests directly to a physical I/O Adapter without run-time involvement from the local Operating System (OS)is provided. A mechanism is provided for using a file protection table (FPT) data structure, which may include a file name protection table (FNPT) and file extension protection table (FEPT), to control user space and out of user space Input/Output (I/O) operations. The FNPT has an entry for each file managed by the OS? file system and points to a segment of the FEPT. Each entry in the FEPT may include a protection domain, along with other protection table context information, against which I/O requests may be checked to determine if an application instance that submitted the I/O requests may access the file identified in the I/O requests.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: August 18, 2009
    Assignee: International Business Machines Corporation
    Inventors: William Todd Boyd, John Lewis Hufferd, Agustin Mena, III, Renato J. Recio, Madeline Vega
  • Patent number: 7571489
    Abstract: The invention relates to a system for securing access to resources or computer systems by means of a self modifying, single use password that limits access to a system and automatically changes each time it is used. Independent computer systems, or clients, are utilized by users to generate one time passcodes to prove their identity to one or more authentication servers. Servers are used to authenticate user inputted one time passcodes, to maintain and update the status of one time passcode clients, and perform rekeying and reset operations. Middleware, an optional component, allows for the interaction between one time passcode clients and servers. Middleware allows for client rekeying and resets as well as synchronisation between the client and server.
    Type: Grant
    Filed: October 20, 2004
    Date of Patent: August 4, 2009
    Assignee: International Business Machines Corporation
    Inventors: Peng T. Ong, Sriram Ramachandran
  • Patent number: 7562118
    Abstract: An example of a solution provided here comprises: in response to a request from an original sender, transmitting tracing notifications to the original sender, and providing limits for the tracing notifications. The tracing notifications operate when an e-mail message is forwarded to at least one non-original recipient.
    Type: Grant
    Filed: July 10, 2003
    Date of Patent: July 14, 2009
    Assignee: International Business Machines Corporation
    Inventors: Craig Fellenstein, Carl Phillip Gusler, Rick Allen Hamilton, II, Harry Schatz
  • Patent number: 7558887
    Abstract: A method is provided that supports partial cache line read and write operations to a memory module to reduce read and write data traffic on a memory channel. In a memory hub controller integrated in the memory module determines an amount of data to be transmitted to or from a set of memory devices of the memory module, in responsive to an access request. The memory hub controller generates a burst length field corresponding to the amount of data. The memory controller controls the amount of data that is transmitted to or from the memory devices using the burst length field. The amount of data is equal to or less than a standard data burst amount of data for the set of memory devices.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: July 7, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kevin C. Gower, Warren E. Maule
  • Patent number: 7552240
    Abstract: The present invention provides a method that enables application instances to pass block mode storage requests directly to a physical I/O adapter without run-time involvement from either the local operating system or hypervisor. In one aspect of the present invention, a mechanism is provided for determining whether a user space operation is a resource management operation of a work processing operation. If the user space operation is a resource management operation, appropriate functions are performed to either query, create, modify or destroy resource allocations in the I/O adapter. If the user space operation is a work processing operation, appropriate functions are performed to create work queue entries and inform the I/O adapter of the work queue entries and to retrieve completion queue entries for work queue entries whose processing has been completed by the I/O adapter.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: June 23, 2009
    Assignee: International Business Machines Corporation
    Inventors: William Todd Boyd, John Lewis Hufferd, Agustin Mena, III, Renato John Recio, Madeline Vega
  • Patent number: 7533238
    Abstract: A method for limiting the size of a local storage of a processor is provided. A facility is provided in association with a processor for setting a local storage size limit. This facility is a privileged facility and can only be accessed by the operating system running on a control processor in the multiprocessor system or the associated processor itself The operating system sets the value stored in the local storage limit register when the operating system initializes a context switch in the processor. When the processor accesses the local storage using a request address, the local storage address corresponding to the request address is compared against the 1ocal storage limit size value in order to determine if the local storage address, or a modulo of the local storage address, is used to access the local storage.
    Type: Grant
    Filed: August 19, 2005
    Date of Patent: May 12, 2009
    Assignee: International Business Machines Corporation
    Inventors: Adam P. Burns, Michael N. Day, Brian Flachs, H. Peter Hofstee, Charles R. Johns, John Liberty
  • Patent number: 7512745
    Abstract: Garbage collection in heterogeneous multiprocessor systems is provided. In some illustrative embodiments, garbage collection operations are distributed across a plurality of the processors in the heterogeneous multiprocessor system. Portions of a global mark queue are assigned to processors of the heterogeneous multiprocessor system along with corresponding chunks of a shared memory. The processors perform garbage collection on their assigned portions of the global mark queue and corresponding chunk of shared memory marking memory object references as reachable or adding memory object references to a non-local mark stack. The marked memory objects are merged with a global mark stack and memory object references in the non-local mark stack are merged with a “to be traced” portion of the global mark queue for re-checking using a garbage collection operation.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: March 31, 2009
    Assignee: International Business Machines Corporation
    Inventors: Michael K. Gschwind, John Kevin Patrick O'Brien, Kathryn M. O'Brien
  • Patent number: 7512792
    Abstract: A reference monitor system, apparatus, computer program product and method are provided. In one illustrative embodiment, elements of the data processing system are associated with security data structures in a reference monitor. An information flow request is received from a first element to authorize an information flow from the first element to a second element. A first security data structure associated with the first element and a second security data structure associated with the second element are retrieved. At least one set theory operation is then performed on the first security data structure and the second security data structure to determine if the information flow from the first element to the second element is to be authorized. The security data structures may be labelsets having one or more labels identifying security policies to be applied to information flows involving the associated element.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: March 31, 2009
    Assignee: International Business Machines Corporation
    Inventors: Diana J. Arroyo, George R. Blakley, III, Damir A. Jamsek, Sridhar R. Muppidi, Kimberly D. Simon, Ronald B. Williams
  • Patent number: 7503007
    Abstract: A context enhanced messaging and collaboration system in which resources related to the context of text messages may be automatically identified and exchanged between users in association with the text messages, is provided. A graphical user interface (GUI) is provided for instant messaging between client devices. The GUI operates in conjunction with a context analysis engine that automatically analyzes the context of the textual messages being exchanged between the users and retrieves resources that correspond to the detected context. Representations of these automatically identified resources may be presented to the user via the GUI. The user of the GUI may enter text messages into the GUI and may select individual ones of the retrieved resources for transmission in association with the text messages. Furthermore, an automated mechanism may be used to select resources to attach to individual text messages entered by the user.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: March 10, 2009
    Assignee: International Business Machines Corporation
    Inventors: Brian D. Goodman, Frank Lawrence Jania, Darren Mark Shaw
  • Patent number: 7503043
    Abstract: Building a package for installing a software application on a data processing system with a distributed architecture is provided. The installation package is built using an authoring tool based on a declarative model. A descriptor is used to define a desired configuration of the system. The installation package is built declaring a discoverer element, a producer element and a consumer element into the wizard tree. During the installation process, the discoverer element detects a current configuration of the system. The producer creates a working queue dynamically, inserting the installation operations that are needed for reaching the desired configuration from the current configuration of the system. The producer then executes the installation operations defined in the working queue. In this way, the installation operations are determined at runtime.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: March 10, 2009
    Assignee: International Business Machines Corporation
    Inventors: Francesco Lupini, Luigi Pichetti, Antonio Secomandi
  • Patent number: 7496692
    Abstract: Verifying configuration data for configuring a microprocessor or system-on-a-chip (SoC) is provided. During initialization, configuration data is shifted into the microprocessor or SoC through a configuration input. The configuration data is shifted to all of the on-chip processor units to provide initial settings for configuration latches in the design. While the configuration data is being shifted to the on-chip processor units, a copy of the configuration data is also stored in a local storage of a test control unit. A private interface is provided between the test control unit and the processor units. Via the private interface, a processor unit receives the current configuration data for the processor units. The current configuration data is compared against the original configuration data stored in the test control unit to verify the current configuration of the processor units.
    Type: Grant
    Filed: October 18, 2005
    Date of Patent: February 24, 2009
    Assignee: International Business Machines Corporation
    Inventors: Ingemar Holm, Ralph C. Koester, John S. Liberty, Mack W. Riley
  • Patent number: 7487496
    Abstract: The present invention provides for a method for computer program functional partitioning for heterogeneous multi-processing systems. At least one system parameter of a computer system comprising one or more disparate processing nodes is identified. Computer program code comprising a program to be run on the computer system is received. A whole program representation is generated based on received computer program code. At least one single-entry-single-exit (SESE) region is identified based on the whole program representation. At least one node-specific SESE region is identified based on identified SESE regions and the at least one system parameter. Each node-specific SESE region is grouped into a node-specific subroutine. Each node-specific subroutine is compiled based on a specified node characteristic. The computer program code is modified based on the node-specific subroutines and the modified computer program code is compiled.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: February 3, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kathryn M. O'Brien, John Kevin Patrick O'Brien
  • Patent number: 7480666
    Abstract: A method for navigating relationships between beans using filters and container managed relationships is provided. With the method, filters are specified in the relationship definition of a deployment descriptor of a bean. The filters generate additional predicates to the WHERE clauses in SQL SELECT statements generated based on the contents of the deployment descriptor. Moreover, these filters may be defined such that method parameters may be passed into the resulting deployed code to thereby make them more flexible. Therefore, with the method, rather than defining filters programmatically in methods of a bean's implementation class, filters are defined declaratively in the deployment descriptor of the bean. Since these filters are specified in the deployment descriptor of the bean, they are accessible to clients of the bean through the local interface.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: January 20, 2009
    Assignee: International Business Machines Corporation
    Inventors: Alan Iain Boyle, Geoffrey M. Hambrick, Martin J. Smithson, Sridhar Sudarsan
  • Patent number: 7480934
    Abstract: In electronic commerce (e-commerce) sites that are executed on a single e-commerce application, a user's session is only associated with a single user identity for e-commerce site domain. Acting under a single identity across the site may not be desired. There may be requirements to associate an individual user with one or more separate identities within parts of the site. Aspects of the invention provide a method, system and computer program product for managing multiple user identities for a user of an electronic commerce (e-commerce) site.
    Type: Grant
    Filed: December 3, 2003
    Date of Patent: January 20, 2009
    Assignee: International Business Machines Corporation
    Inventors: Victor S. Chan, Darshanand Khusial, Lev Mirlas
  • Patent number: 7478376
    Abstract: The present invention provides for a method for computer program code size partitioning for multiple memory multi-processor systems. At least one system parameter of a computer system comprising one or more disparate processing nodes is identified. Computer program code comprising a program to be run on the computer system is received. A program representation based on received computer program code is generated. At least one single-entry-single-exit (SESE) region is identified based on the whole program representation. At least one SESE region of less than a certain size (store-size-specific) is identified based on identified SESE regions and the at least one system parameter. Each store-size-specific SESE region is grouped into a node-specific subroutine. The non node-specific parts of the computer program code are modified based on the partitioning into node-specific subroutines. The modified computer program code including each node-specific subroutine is compiled based on a specified node characteristic.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: January 13, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kathryn M. O'Brien, John Kevin Patrick O'Brien