Patents Represented by Attorney Hamilton & DeSanctis
  • Patent number: 8107376
    Abstract: Methods are provided for managing hierarchically organized subscriber profiles. According to one embodiment, a policy engine of a VR defines services available to subscribers in terms of profile identifiers. A scalable subscriber profile database is established having a memory requirement dependent upon the number of available service contexts by hierarchically organizing profile identifiers as leaf profile identifiers, which explicitly define services, and intermediate profile identifiers, which indirectly represent services. The policy engine receives a first-level profile identifier and determines whether it is among those stored in the database. If not, then it obtains service profile information associated with the first-level profile identifier. If the first-level profile identifier is an intermediate profile identifier having leaf profile identifiers, then it further obtains them and associated profile information and stores this information in the database.
    Type: Grant
    Filed: June 13, 2011
    Date of Patent: January 31, 2012
    Assignee: Fortinet, Inc.
    Inventors: Rajesh I. Balay, Chandramouli Sargor, Sachin S. Desai, Francois Lemarchand, Amit K. Khetawat
  • Patent number: 8103727
    Abstract: Methods and systems are provided for delaying local information classification until global intelligence has an opportunity to be gathered. According to one embodiment, an initial information identification process, e.g., an initial spam detection, is performed on received electronic information, e.g., an e-mail message. Based on the initial information identification process, classification of the received electronic information is attempted. If the received electronic information cannot be unambiguously classified as being within one of a set of predetermined categories (e.g., spam or clean), then an opportunity is provided for global intelligence to be gathered regarding the received electronic information by queuing the received electronic information for re-evaluation. The electronic information is subsequently classified by performing a re-evaluation information identification process, e.g.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: January 24, 2012
    Assignee: Fortinet, Inc.
    Inventor: Kunhua Lin
  • Patent number: 8098451
    Abstract: Various embodiments of the present invention provide systems and methods for determining fly height. For example, a system for fly height determination is disclosed that includes a head assembly disposed in relation to a storage medium, a write channel, and a read circuit. The read circuit is operable to receive information from both the head assembly and the write channel. A frequency determination circuit is included that is operable to receive a first signal from the read circuit corresponding to information received from the write channel and to provide a first fundamental frequency and a first higher order frequency based on the first signal, and the frequency determination circuit is operable to receive a second signal from the read circuit corresponding to information received from the head assembly channel and to provide a second fundamental frequency and a second higher order frequency based on the second signal.
    Type: Grant
    Filed: July 28, 2008
    Date of Patent: January 17, 2012
    Assignee: Agere Systems Inc.
    Inventor: Nils Graef
  • Patent number: 8091275
    Abstract: This invention provides pH buffered plant nutrient compositions, methods for fertilizing a plant growing or a seed germinating in a hydroponics system, methods for growing a plant in a hydroponics system, and methods for making a pH buffered plant nutrient composition. The compositions and methods of this invention are useful with distilled water, deionized water, filtered water, and United States municipal tap water. The compositions and methods of this invention are useful with most of the municipal water supplies in the United States. pH buffering agents useful in the practice of this invention include phosphate buffers, aquarium buffers, 2-[N-morpholino]ethanesulfonic acid, and mixtures thereof.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: January 10, 2012
    Assignee: AeroGrow International
    Inventors: W. Michael Bissonnette, Laura L. Conley, Sylvia Bernstein, Susannah Ferguson, John Thompson
  • Patent number: 8085776
    Abstract: Methods and Systems are provided for a distributed Provider Edge (PE). A single Virtual Routing and Forwarding device (VRF) is associated with a single customer site. The VRF includes a single routing table (RIB) and a single forwarding table (FIB). The VRF also includes a plurality of Virtual Private Network (VPN) Protocol Instance Modules (VRP), where each VRP is associated with a different VPN from the customer site. Each VRP accesses the RIB directly and the FIB indirectly to acquiring addressing/routing information for a received data packet. Moreover, each VRP uses a data plane of the VRP to communicate the data packets to a PE backbone device. In turn, the PE backbone device uses the data plane to communicate with each of the VRPs, and the PE backbone device communicates with one or more tunnels.
    Type: Grant
    Filed: September 30, 2006
    Date of Patent: December 27, 2011
    Assignee: Fortinet, Inc.
    Inventors: Rajesh Balay, Vijay Srinivasan, Sanjeev Tyagi, Pasula Srinivasa Reddy, Chandramouli Sargor, John Crawbuck
  • Patent number: 8079084
    Abstract: Various embodiments of the present invention provide elements that may be utilized for improved virus processing. As one example, a computer readable medium is disclosed that includes a virus signature compiled for execution on a virus co-processor. The virus signature includes at least one primitive instruction and at least one CPR instruction stored at contiguous locations in the computer readable medium. The CPR instruction is one of an instruction set that includes, but is not limited to: a compare string instruction, compare buffer instruction; perform checksum instruction; a seek instruction; and a test instruction. The primitive instruction may be, but is not limited to, an add instruction, a branch instruction, a jump instruction, a load instruction, a move instruction, a logic AND instruction, a logic OR instruction, and/or a logic XOR instruction.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: December 13, 2011
    Assignee: Fortinet, Inc.
    Inventors: Lin Huang, Xu Zhou, Michael Xie
  • Patent number: 8074280
    Abstract: Systems and methods for an anti-virus detection module that can detect known undesired computer files in archives that may be encrypted, compressed and/or password-protected are provided. According to one embodiment, a method is provided for detection of malicious or undesired computer files within an archive without decrypting and without decompressing the contents of the archive. A type and structure of the archive are identified by examining primary or secondary identification bytes stored within the archive. Based on the identified type and structure, descriptive information is obtained from the archive describing contained files within the archive file. The descriptive information for each contained files is evaluated to determine if any are malicious or undesired computer files by comparing the descriptive information to signatures of known malicious or undesired computer files. Finally, an attempt is made to prevent contained files determined to be malicious or undesired from being opened.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: December 6, 2011
    Assignee: Fortinet, Inc.
    Inventors: Steven Michael Fossen, Alexander Douglas MacDonald
  • Patent number: 8068503
    Abstract: Methods and systems are provided for steering network packets. According to one embodiment, a mapping associates a processing resource with a network interface module (netmod) and/or a number of line interface ports included within the netmod. In one embodiment, the mapping is configurable within the processing resource and pushed to the netmod. The netmod uses the mapping to steer network packets to the processing resource when the packets conform to the mapping. The mapping may be additionally used to identify a specific process that is to be performed against the packets once the processing resource receives the steered packets from the netmod.
    Type: Grant
    Filed: March 10, 2007
    Date of Patent: November 29, 2011
    Assignee: Fortinet, Inc.
    Inventors: Sachin Desai, Tim Millet, Zahid Hussain, Paul Kim, Louise Yeung, Ken Yeung
  • Patent number: 8069487
    Abstract: Systems and methods for allowing authorized code to execute on a computer system are provided. According to one embodiment, an in-memory cache is maintained having entries containing execution authorization information regarding recently used modules. After authenticating a module, its execution authorization information is added to the cache. Activity relating to a module is intercepted. A hash value of the module is generated. The module is authenticated with reference to a multi-level whitelist including a global whitelist, a local whitelist and the cache. The authentication includes first consulting the cache and if the module is not found, then looking up its hash value in the local whitelist and if it is not found, then looking it up in the global whitelist. Finally, the module is allowed to be loaded and executed if its hash value matches a hash value of an approved code modules within the global whitelist.
    Type: Grant
    Filed: October 15, 2010
    Date of Patent: November 29, 2011
    Assignee: Fortinet, Inc.
    Inventors: Andrew F. Fanton, John J. Gandee, William H. Lutton, Edwin L. Harper, Kurt E. Godwin, Anthony A. Rozga
  • Patent number: 8069233
    Abstract: A system and method of managing a switch includes installing a switch having a plurality of processor elements, installing an operating system on each processor element, creating a system virtual router and configuring the processor elements from the system virtual router.
    Type: Grant
    Filed: November 6, 2006
    Date of Patent: November 29, 2011
    Assignee: Fortinet, Inc.
    Inventors: Abraham R. Matthews, Anna Berenberg
  • Patent number: 8064462
    Abstract: Methods and systems for providing IP services in an integrated fashion are provided. According to one embodiment, a system includes a switch fabric and a line interface/network module, multiple virtual routing engines (VREs) and a virtual services engine (VSE) coupled with the switch fabric. The line interface/network module receives packets, steers ingress packets to a selected VRE and transmits egress packets according to their relative priority. VREs determines if a packet associated with a packet flow requires processing by the VSE by performing flow-based packet classification on the packet and evaluating forwarding state information associated with previously stored flow learning results. The VSE includes a central processing unit configured to perform firewall processing, Uniform Resource Locator (URL) filtering and anti-virus processing. If the packet is determined to require processing by the VSE, then the packet is steered to the VSE for firewall, URL filtering and/or anti-virus processing.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: November 22, 2011
    Assignee: Fortinet, Inc.
    Inventors: Zahid Hussain, Tim Millet
  • Patent number: 8059349
    Abstract: Various systems and methods for peak signal detection. As one example, a method for peak signal detection that includes receiving a signal is disclosed. The received signal includes a signal region where the signal is increasing in amplitude, another signal region where the signal is decreasing in amplitude, and a transitional signal region coupling the first two signal regions. In some cases, the transitional region is of zero duration and the signal transitions directly from the increasing region to the decreasing region. The method further include calculating a distance between the signal region of increasing amplitude and the signal region of decreasing amplitude, and determining a peak of the received signal that is one half the distance from the signal region of increasing amplitude.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: November 15, 2011
    Assignee: Agere Systems Inc.
    Inventors: Viswanath Annampedu, Keith R. Bloss, Tianyang Ding, Jeffrey P. Grundvig, Roy S. Neville
  • Patent number: 8054573
    Abstract: Various embodiments of the present invention provide systems and methods for determining fly-height adjustments. For example, various embodiments of the present invention provide storage devices that include a storage medium, a read/write head assembly disposed in relation to the storage medium (278), and a SAM based fly-height adjustment circuit (214). The storage medium (278) includes a plurality of servo data regions (110) that each include a servo address mark (154). The SAM based fly-height adjustment circuit (214) receives the servo address mark (154) from the plurality of servo data regions (110) via the read/write head assembly (276), and calculates a first harmonics ratio (445) based on the received data. The first harmonics ratio (445) is compared with a second harmonics ratio (450) to determine an error (365) in the distance (295) between the read/write head assembly (276) and the storage medium (278).
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: November 8, 2011
    Assignee: LSI Corporation
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song, Jeffrey P. Grundvig, Viswanath Annampedu
  • Patent number: 8054931
    Abstract: Various embodiments of the present invention provide systems and methods for improved timing recovery. As one example, some embodiments of the present invention provide timing recovery circuits that include an error signal and a digital phase lock loop circuit. The error signal indicates a difference between the predicted sample time and an ideal sample time. The digital phase lock loop is operable to apply an adjustment value such that a subsequent sample time is moved toward the ideal sample time. Further, the digital phase lock loop circuit includes an adjustment limit circuit that is operable to limit the adjustment value.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: November 8, 2011
    Assignee: Agere Systems Inc.
    Inventor: Viswanath Annampedu
  • Patent number: 8044745
    Abstract: Various apparatuses and methods for offsetting the phase and/or frequency of a clock signal are disclosed herein. For example, some embodiments provide an apparatus for generating a clock signal, including a quadrature delay circuit connected to an input clock signal. The quadrature delay circuit outputs components of the input clock signal with different phase shifts. A first amplitude modulator is connected to the first output of the quadrature delay circuit, and a second amplitude modulator is connected to the second output of the quadrature delay circuit. A summer combines the output of the first and second amplitude modulators.
    Type: Grant
    Filed: January 28, 2009
    Date of Patent: October 25, 2011
    Assignee: Agere Systems Inc.
    Inventor: Stanley Jeh-Chun Ma
  • Patent number: 8044688
    Abstract: Various embodiments of the present invention provide systems and circuits that provide for out of band detection. As one example, an out of band detection circuit is disclosed that includes an input signal, a clock generation circuit, and a sampling circuit. The clock generation circuit receives the input signal and derives therefrom a sampling clock, and the sampling circuit is operable to sample the input signal at a time indicated by the sampling clock.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: October 25, 2011
    Assignee: Agere Systems Inc.
    Inventors: Mingdeng Chen, Ari Valero-Lopez, Weiwei Mao
  • Patent number: 8020202
    Abstract: Methods and systems for an intelligent network protection gateway (NPG) and network architecture are provided. According to one embodiment, a firewall provides network-layer protection to internal hosts against unauthorized access by hosts of an external network by performing network address translation (NAT) processing of Internet Protocol (IP) addresses. The firewall changes data in headers of VoIP packets and corresponding data contents of the VoIP packets, to enable bi-directional VoIP communications. An external VoIP interface of the firewall receives incoming VoIP packets having a user alias (e.g., an email address) and an indication regarding a VoIP port of external interface. The packets are directed to an appropriate internal host by the firewall performing port address forwarding based on the port indication to a Session Initiation Protocol (SIP) server within the internal network that maintains a mapping of user aliases to private addresses of the internal hosts.
    Type: Grant
    Filed: May 9, 2010
    Date of Patent: September 13, 2011
    Assignee: Fortinet, Inc.
    Inventor: Michael Xie
  • Patent number: 8018360
    Abstract: Methods and systems for mitigating latency in a data detector feedback loop are included. For example, a method for reducing latency in an error corrected data retrieval system is included. The method includes performing an analog to digital conversion at a sampling instant to create a digital sample, and performing a data detection on the digital sample to create a detected output. The detected output is compared with the digital sample to determine a phase error. During an interim period, the digital sample is adjusted to reflect the phase error to create an adjusted digital sample. After the interim period, the sampling instant is adjusted to reflect the phase error.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: September 13, 2011
    Assignee: Agere Systems Inc.
    Inventor: Ratnakar Aravind Nayak
  • Patent number: 8013552
    Abstract: Various systems and methods for controlling DC motors are disclosed herein. For example, one method provides for controlling a polyphase, brushless DC motor. The method includes providing a DC motor that has a plurality of phases. Such a DC motor operates by inducing a current in the plurality of phases in accordance with a plurality of commutation states. In the example, six commutation states are discussed, but fewer than or more than six commutation states may exist. The method further includes initializing a count, inducing a current in the plurality of phases in accordance with a first commutation state, and incrementing the count until the current achieves a threshold in the first commutation state. Then, a current is induced in the plurality of phases in accordance with a second commutation state, and the count is decremented until the current achieves the threshold in the second commutation state.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: September 6, 2011
    Assignee: Agere Systems Inc.
    Inventors: James A. Dahlberg, Ross S. Wilson, Jason P. Brenden
  • Patent number: 8014099
    Abstract: Various embodiments of the present invention provide systems and methods for using channel bit density estimates to adjust fly-height. For example, various embodiments of the present invention provide methods for adaptively adjusting fly-height. Such methods include providing a storage medium that includes information corresponding to a process data set, and a read/write head assembly that is disposed a variable distance from the storage medium. The process data set is accessed from the storage medium. A first channel bit density estimate is adaptively calculated based at least in part on the process data set and a second channel bit density estimate that was previously calculated. The variable distance is modified based at least in part on the first channel bit density estimate. A third channel bit density is adaptively calculated based at least in part on the process data set and a fourth channel bit density estimate that was previously calculated.
    Type: Grant
    Filed: October 20, 2008
    Date of Patent: September 6, 2011
    Assignee: LSI Corporation
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song, Jefferson E. Singleton