Patents Represented by Attorney, Agent or Law Firm Harold L. Novick
  • Patent number: 6299788
    Abstract: A method for polysilicon etching with HBr, He and He/O2 as reactive gas source is disclosed. A chamber pressure greater than 30 mTorr is held to achieve high selectivity to polysilicon over silicon oxide. A total flow rate of HBr and He greater than 420 sccm is provided. Under this condition of the total flow rate of HBr and He, the flow rates of HBr and He are respectively held in the range of about 180-280 sccm, and the flow rate of He/O2 is at about 5-10 sccm.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: October 9, 2001
    Assignee: Mosel Vitelic Inc.
    Inventors: Kuang-Yung Wu, Tien-Min Yuan, Shih-Chi Lai
  • Patent number: 6299218
    Abstract: A structure for connecting fluid channel of fluid delivery system is disclosed. This connecting structure limits the length of the flow-guiding pipe extending into the delivery channel, to reduce particle contaminates and the probability of crack. The present pipe union connecting structure comprises a first pipe, a second pipe mounted to the first pipe, and an inner pipe extending from the first pipe into the second pipe with a certain extending length. The extending length of the inner pipe is less than the proportion of the minimum distance between the inner wall of the second pipe and the outlet of the inner pipe when standstill, to the tangent value of a certain angle &thgr;, which is the maximum inclined angle between the second pipe and the inner pipe.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: October 9, 2001
    Assignee: Mosel Vitelic Inc.
    Inventors: Pei-Wei Tsai, Hua-Jen Tseng, Chun-Chieh Lee, Gwo-Yuh Yang
  • Patent number: 6297536
    Abstract: A diode structure compatible with silicide processes for electrostatic discharge protection is disclosed. The diode structure comprises a semiconductor layer of a first conductivity type, a diffusion region of a second conductivity type formed in the semiconductor layer, and a doped region of the second conductivity type formed in the semiconductor layer around the diffusion region. The doped region has a doping concentration less than that of the diffusion region to provide a ballastic resistance under a high current stressing condition.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: October 2, 2001
    Assignee: Winbond Electronics Corp.
    Inventor: Ta-Lee Yu
  • Patent number: 6295787
    Abstract: An outer structure for a refrigerated food storage apparatus includes an outer shell forming a visible exterior of the apparatus; and an inner liner made of molded plastic and coupled to the outer shell, to form an inter-panel space to be filled with a body of foam insulation. The inner liner includes bosses of a predetermined length, integrally formed with the inner liner at regular intervals and extending toward the outer shell, to support and maintain a constant spacing between the outer shell and inner liner; a foam-injection inlet for injecting foam; and vents for exhausting air and gases generated during a foam injection process. A reactive foam completely fills the inter-panel space, to form a consistent body of insulation. The force of the reactive foam filling the inter-panel space closes a hinged first flap for covering the foam-injection inlet and a plurality of hinged second flaps for covering the vents.
    Type: Grant
    Filed: September 3, 1999
    Date of Patent: October 2, 2001
    Assignee: Mando Climate Control Corporation
    Inventor: Young-Kil Lee
  • Patent number: 6295061
    Abstract: A system and method which dynamically and interactively displays information, such as advertising messages, in an intelligent artificial form by responding to a user's pointing device movement or activity. The pointing device activity by the user is analyzed in real-time and displays intended information and/or images near the pointer in real-time by employing layer technology. Other effects provided in response the pointing device movement or activity include disappearance, reappearance, dropping to the corner of the screen, etc of the information and/or image as the pointer is shook or moved in a certain shape by the user. These effects attract potential customers or clients by providing the various features disclosed in the invention under the Internet environment through web-sites.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: September 25, 2001
    Assignee: DBM Korea
    Inventors: Eun Kyoung Park, Jun Ho Cho
  • Patent number: 6291827
    Abstract: A novel insulating apparatus for a conductive line is disclosed. The proposed insulating apparatus can be applied to various conductive lines with different shapes. The problem of short circuit can be solved by the present insulating apparatus with the novel connecting configuration. The present invention comprises a plurality of insulator rings worn on the conductive line in series, wherein the insulator rings are annular cylinders. Each of the annular cylinders has an outer diameter larger than the inner diameter of the ones next to it. In addition, each of the annular cylinders has a length sized according to the desired flexibility of the conductive line.
    Type: Grant
    Filed: March 26, 1999
    Date of Patent: September 18, 2001
    Assignee: Mosel Vitelic Inc.
    Inventors: Pei-Wei Tsai, Hua-Jen Tseng, Dong-Tay Tsai, Fu-Chih Huang
  • Patent number: 6292297
    Abstract: A multilevel diffractive optical element comprising a base and a plurality of phase zones having phase levels of a substantially identical height h, each phase zone being defined by a local modulation depth d and a local number of phase levels &xgr;=d/h, the local number of phase levels &xgr; per phase zone being a real number, an integer of which defines the number of complete levels in the phase zone, which complete levels have identical widths, and a fraction of which, in at least one phase zone, defines an incomplete level which is narrower than the complete levels, said local number of phase levels &xgr;=&xgr;(x, y) varying among different phase zones so as to provide corresponding variation of said local modulation depth d=d(x, y) whereby local diffraction efficiencies and consequently an overall diffraction efficiency of the optical element is arbitrarily controlled.
    Type: Grant
    Filed: May 11, 1998
    Date of Patent: September 18, 2001
    Assignee: Yeda Research and Development Co., Ltd.
    Inventors: Yochay Danziger, Erez Hasman, Asher Friesem
  • Patent number: 6283680
    Abstract: Apparatus for transporting a material such as concrete utilizes a flexible duct connected to a hopper and includes a device that can pinch the duct. The pinching device has first and second pinch members that are movable transversely relative to the duct, and a drive member situated between the pinch members and likewise movable transversely to the duct. The apparatus also has an air injector, and a controller for timing the injection of air and the movements of the pinch and drive members so as to drive the material in the flexible duct.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: September 4, 2001
    Inventor: Lucien Vidal
  • Patent number: 6283599
    Abstract: A projection display device includes a lens module, a light source and an adjusting device. The lens module has a first lens and a second lens. The light source emits light through the first lens and the second lens to a surface. The adjusting device is used to change the distance between the first lens and the second lens, thereby adjusting brightness and uniformity of the projected pictures on the surface.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: September 4, 2001
    Assignee: Acer Peripherals, Inc.
    Inventor: Rung-De Lin
  • Patent number: 6273962
    Abstract: A method for preventing corrosion and particulate in a load-lock chamber is disclosed. The load-lock chamber is adjourning with an etching chamber and a wafer transferred module, each time a wafer in the cassette is transferred into the etching chamber for etching by a transfer arm. After that, the etched wafer is withdrawn by the same way to the cassette. The load-lock chamber comprising an outlet of N2-purge tube therein for venting the vacuum in the load-lock chamber to the surrounding. The method comprising at least a step of coupling heating means to the N2-purge tube, or heating N2 gases before injecting into the N2-purge tube so that the temperature of the N2-purge tube will at least not lower than the temperature of an environment within the load-lock chamber.
    Type: Grant
    Filed: April 6, 1999
    Date of Patent: August 14, 2001
    Assignee: Mosel Vitelic Inc.
    Inventors: Kuang-Yung Wu, Jia-Rurng Hwu, Tien-Min Yuan, Shih-Chi Lai
  • Patent number: 6271079
    Abstract: The present invention provides a method of forming trench capacitor with a sacrificial silicon nitride. A deep trench structure is formed in a substrate. A TEOS oxide layer is formed on the substrate and filled in said trench region, etched to a first level subsequently, wherein a portion of the TEOS oxide layer is remained in the trench region and a portion of the substrate exposed to form a trench sidewall. A thermally oxidation process is performed to form a collar oxide on the exposed substrate. A silicon nitride sidewall is formed on the collar oxide, then removing the residual TEOS oxide layer by wet etching. The trench region is then etched using the silicon nitride sidewall as a barrier to form a bottle shape trench region for increasing the surface of the trench region. A bottom cell plate is formed in the fresh trench region. The silicon nitride sidewall is removed.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: August 7, 2001
    Assignee: Mosel Vitelic Inc.
    Inventors: Houng-Chi Wei, Wei-Shang King
  • Patent number: 6269865
    Abstract: A network-type heat pipe device is disclosed, wherein the network-type heat pipe device comprises a heat dissipating unit with a network shape, a heat absorbing unit of any desired shape, and two single flexible capillary pipes connecting the heat absorbing unit with the heat dissipating unit. The working fluid filled in the heat pipe is of a predetermined quantity smaller than the internal volume of the heat pipe. The inside diameters of the capillary pipes of the network-shaped heat dissipating unit and the connecting capillary pipes are small enough such that the vapor and liquid segments of the working fluid may distribute therein by capillary effect.
    Type: Grant
    Filed: August 20, 1998
    Date of Patent: August 7, 2001
    Inventor: Bin-Juine Huang
  • Patent number: 6267885
    Abstract: The invention provides a liquid purification apparatus (10) adapted to employ the combination of the purifying effects of the heavy metals copper and silver in conjunction with hydrogen peroxide and the catalytic reaction thereof. A body means (11, 12) defines a flow passage (13) having a liquid inlet (14) at one end and a liquid outer (16) at the other end. Flow passage (13) has a first electrolytic unit (60) containing at least one copper based anode (22) and a second electrolytic unit (62) containing at least one silver based anode (25) spaced downstream of first electrolytic unit (60). An electrical circuit means (32) supplies operating current thereto and flow passage (13) includes an inlet (34) for the controlled introduction of H2O2 from reservoir means (51) into flow passage (13) between first (60) and second (62) electrolytic units.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: July 31, 2001
    Assignee: Austech Pty., Ltd.
    Inventors: William Ernest Briggs, John Thomas Fisher-Stamp
  • Patent number: 6265269
    Abstract: A method for forming a concave bottom oxide layer in a trench, comprising: providing a semiconductor substrate; forming a pad oxide layer on the semiconductor substrate; forming a silicon nitride layer on the pad oxide layer; etching the silicon nitride layer, the pad oxide layer and the semiconductor substrate to form the trench in the semiconductor substrate; depositing a silicon oxide layer to refill into the trench and cover on the silicon nitride layer, wherein the silicon oxide layer has overhang portions at corners of the trench; anisotropically etching the silicon oxide layer to form a concave bottom oxide layer in the trench; etching the silicon oxide layer to remove the silicon oxide layer on the silicon nitride layer and the sidewalls of the trench; removing the silicon nitride layer and the pad oxide layer.
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: July 24, 2001
    Assignee: Mosel Vitelic Inc.
    Inventors: Chien-Hung Chen, Chih-Ta Wu, Ching-Shun Lin, Juinn-Sheng Chen
  • Patent number: 6265272
    Abstract: A fabrication process of forming a semiconductor device with elevated source/drain regions on a substrate is disclosed. The elevated portion of the source/drain regions is provided as a reactant for a later metallization process, thereby preventing the consumption of too much silicon contained in the source/drain regions. First, an elevated silicon layer is formed on portions of a substrate for forming source/drain regions of a semiconductor device. Next, a gate dielectric layer and a gate electrode layer are formed on the elevated silicon layer successively to construct a gate structure. Then, a lightly doped ion implantation process, a process of forming a sidewall spacer and a heavily doped ion implantation process are performed successively. Thus, the elevated silicon layer can be used as a reactant while performing a self-aligned silicidization process.
    Type: Grant
    Filed: September 28, 2000
    Date of Patent: July 24, 2001
    Assignee: Winbond Electronics Corp.
    Inventor: Yi-Shi Chen
  • Patent number: 6265752
    Abstract: The device includes a N+ buried layer in a substrate. A P-well is formed in an epitaxial layer on the buried layer. N-wells surround the P-well are also formed in the epitaxial layer. One of the N-well regions acts as a drain in the structure. A plurality of field oxide regions is formed on the N-well or P-well to define the active area of the device. A gate oxide is formed on the surface of the P-well and the N-well served as the drain. A gate is formed on the gate oxide. Drain contact is formed in the N-well for drain. The source region of the device is formed in the P-well adjacent to the drain. An isolation layer is deposited on the gate. The method includes forming a N+ buried layer in a P substrate. A P epitaxial layer is then formed on the surface of the P substrate. The N-well and P-well are respectively formed in the epitaxial layer by ion implantation and thermally diffusion. A plurality of field oxide (FOX) regions are created to define the active area.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: July 24, 2001
    Assignee: Taiwan Semiconductor Manufacturing, Co., Inc.
    Inventors: Kou-Chio Liu, Jyh-Min Jiang, Chen-Bau Wu, Ruey-Hsin Liou
  • Patent number: 6262909
    Abstract: Disclosed is a ferroelectric memory device having a memory cell structure where a plurality of ferroelectric capacitor are connected to one switching transistor, and a plurality of data are outputted according to one address input. The ferroelectric memory device comprises a plurality of word lines for driving a corresponding memory cell in accordance with an input address; a plurality of bit lines crossing said word lines, respectively; a plurality of switching transistors connected both to the bit lines and the word lines, respectively; and a plurality of dielectric capacitors wherein one end is coupled in common to a node of the switching transistor, respectively; wherein a plurality of output data are outputted by selecting a memory cell including at least one switching transistor corresponding to the plurality of switching transistors, and to the plurality of dielectric capacitors.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: July 17, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventors: Hoon Woo Kye, Woo Soon Kang
  • Patent number: 6263253
    Abstract: The present invention discloses an allocation method for establishing a theoretical dispatching model for dynamically allocating the bottleneck resource according to the on-line current data. At first, the on-line current data are obtained from the bottleneck resource and those tools next to the bottleneck resource. Decision parameters such as the remaining processing time, buffer WIP of the tools next to bottleneck resource are sequentially derived by using the current data. Each tool next to the bottleneck resource is then determined to receive additional lots from the bottleneck resource or not. Finally, the bottleneck resource is reallocated to those tools that requires the lots from the bottleneck resource.
    Type: Grant
    Filed: November 24, 1998
    Date of Patent: July 17, 2001
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tai-Yi Yang, Yu-Feng Huang, Wen-Yao Chen
  • Patent number: 6262467
    Abstract: A semiconductor device is disclosed, together with a fabricating method therefor. The semiconductor device has an etch barrier structure, made with SiN or SiON, which is formed on an element-isolating region alongside an active region. Although there is an alignment error which causes the element-isolating region to be exposed, the etch barrier structure protects the element-isolating region from being etched when carrying out the etching processes for contact holes in a semiconductor memory cell. Thus, while preventing the deterioration of element-isolation properties, the etch barrier structure can affords a larger allowable alignment error in the etching processes for contact holes, so it is possible to make a small active region and thus, highly integrate semiconductor devices.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: July 17, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Dae Hee Hahn
  • Patent number: 6253676
    Abstract: A printing agent within a through hole of a screen is smoothly and completely released out when separating the screen from a plate to be printed. 1. In a screen printing method, at a time of applying a printing agent to a plate to be printed by a movement of a squeegee, the plate to be printed is gradually separated from said screen from one side of the screen to the other side thereof step by step during a movement of the squeegee to a movement finishing end.
    Type: Grant
    Filed: February 17, 1999
    Date of Patent: July 3, 2001
    Assignee: Minami Co., Ltd.
    Inventor: Takehiko Murakami