Abstract: A method for fabricating a stacked capacitor in a semiconductor configuration, in which one electrode of the stacked capacitor is connected via a terminal region of a first conductivity type to a source or drain of a transistor. The semiconductor configuration having one electrode of a stacked capacitor produced by utilizing different etching rates of semiconductor layers of a second conductivity type which are doped to different extents. After the etching of the one electrode of the stacked capacitor, doping reversal of the semiconductor layers remaining after the etching operation to the first conductivity type is performed, with the result that the electrode has the same conductivity type as the terminal region and no pn junction occurs between the electrode and terminal region.

Abstract: A test method suitable for testing at least one integrated circuit which, on a main area, has contact areas that serve to transfer signals during a first operating mode of the circuit. Only some of the contact areas are contact-connected to test contacts of a test apparatus and the circuit is put into a second operating mode in which the signals which are transferred via at least one of the non-contact-connected contact areas in the first operating mode are transferred via at least one of the contact-connected contact areas.

Abstract: A method and an apparatus for saving current in mobile multi-mode communication terminals, in which the frequency of searching (scanning) for available communication networks is varied as a function of information about the local availability of the communication networks.

Abstract: The invention relates to a pressure sensor component comprising a base body and a pressure connection element. The base body comprises a chip carrier, onto which a semiconductor chip with an integrated pressure sensor is mounted. Contact is made with the semiconductor chip by means of connection, which are routed laterally out from the base body. The base body is open on one side, and the opening is bounded by side parts of the chip carrier. The pressure connection element is placed onto the upper end regions of the side parts. The invention is distinguished by the fact that the filler, with which the inner space of the base body is filled and the semiconductor chip is covered, is simultaneously used to connect and seal the pressure connection element and the base body. The ends of the pressure connection element are preferably configured in such a way that the filler is drawn by capillary forces into the interspace between side parts and pressure connection element.

Abstract: The invention relates to a data transmission method in which the data to be transmitted are divided into a plurality of subchannels each with a normal component and a quadrature component that is orthogonal to the normal component. The divided data are transmitted in different frequency bands. The frequency bands are arranged with non-equidistant frequency spacings between one another. An error signal is generated at the reception end for each subchannel both for the normal branch and for the quadrature branch and fed to a corresponding reception filter.

Abstract: A capacitor having a signal electrode connected to a signal conductor, a ground electrode connected to a ground conductor and a dielectric disposed between the two. In the capacitor, delay-time-dependent limits are moved to higher frequency ranges in order to extend the applicability in the frequency range. This is accomplished by the signal conductor or the ground conductor being spaced apart from the signal electrode or the ground electrode and thus from the dielectric having a high dielectric constant. The signal conductor or the ground conduct is subdivided into at least two conductor regions that are separated in the direction of signal propagation. Each of the conductor regions is electrically connected via at least one conductor connector to the signal conductor or to the ground conductor, respectively.

Abstract: The invention relates to an integrated electric circuit comprising a metal layer provided with a passivation layer. The passivation layer is made of a monomolecular film which is placed on the surface of the metal layer. The monomolecular film is formed prior to contacting the metal layer with metal wires. The wires are pushed through the passivation layer with a force strong enough to pierce the monomolecular film. In the alternative, the film may be selectively removed at defined locations in preparation for the contacting with the wires.

Abstract: A heat-insulating wall has two spaced-apart, at least essentially vacuum-tight cover layers, between which an evacuable heat-insulation material is provided and which are connected to one another by a vacuum-tight connecting profile which runs along the free edges of the cover layers. The connecting profile has a membrane which spans at least essentially the distance between the cover layers. The connecting profile is made up of a plurality of profile sections adjoining one another in a vacuum-tight manner. At the adjoining ends of the profile sections, the membrane has an end section with a thickness of at least approximately the material thickness of the cover layers.

Abstract: A semiconductor chip with a surface covering includes circuits which are produced in at least one layer of a semiconductor substrate and disposed in at least one group. Supply and signal lines extend in at least one interconnect plane over at least one circuit group and have a maximum width so that a distance between each two lines is at a minimum.

Abstract: A circuit for generating a reference voltage for the reading out from and the evaluation of read output signals which are read out with a constant plate voltage from storage cells of a ferroelectric memory via bit lines. In the circuit, a reference voltage device is formed of two reference cells that are subjected to the action of complementary signals. The reference cells can be simultaneously read out in order to generate the reference voltage in a selection and evaluation device.

Abstract: A method and a configuration are provided for digitally processing an analog signal, especially of output quantities of an optical transducer. The analog signal is divided into a number of partial analog signals having in each case different frequency ranges. The levels of the partial signals are adapted to the dynamic ranges of downstream digitizing device by analog amplification. This results in an improved signal-to-noise ratio.

Abstract: A configuration for triggering restraining devices in a motor vehicle. The configuration has a sensor device with two acceleration sensors with differently orientated sensitivity axes and with a rotational movement sensor for detecting rotational movements about the vertical axis of the vehicle. A triggering signal for at least one of the restraining devices is generated in a triggering circuit as a function of the acceleration signals and of the rotational movement signal.

Abstract: Data are received by a receiver in a frame by frame transmission. The received data are processed in a maximum a posteriori probability algorithm using metric increments. In order to calculate the metric increments, use is made of reliability values which have been determined in an estimation unit, using a Kalman filter.

Abstract: A baking oven includes a metallic baking oven muffle that can be closed off on a front side by a door. The muffle walls have heating elements for heating the cooking chamber to over approximately 180° C. and/or for heating the food disposed therein to be cooked. The muffle has a protective layer covering the muffle walls at least on the inner side. To improve the use properties of the baking oven muffle, the thickness of the protective layer is less than approximately 30 &mgr;m. The protective layer is formed as a hard sol-gel layer having a thickness of approximately 10 &mgr;m, preferably, between approximately 5 and 10 &mgr;m. The protective layer is transparent. The inner sides of the muffle serve as a reflector. A functional sol-gel layer is disposed on the hard sol-gel layer. The functional sol-gel layer has a thickness of approximately 10 &mgr;m, preferably, 2 to 3 &mgr;m. When the muffle is aluminum, the protective layer is an anodized aluminum oxide layer.

Abstract: The logic gate has at least one input terminal in which a digital input signal is applied having two possible logical signal values and at least one output terminal to output an output signal having a logical signal values. Two different logical voltage levels are allocated to both possible logical signal values of the output signal and a logic circuit is provided between the input and the output terminals. The logic circuit has several switching elements, especially switching transistors, working or produced according to the logical voltage level. The logic circuit is supplied with a supply potential that exceeds the logic voltage level. The logic circuit has at least two switching elements, especially switching transistors, in the output path allocated to the output terminal.

Abstract: The invention relates to a micromechanical sensor and to a corresponding production method that includes the following steps: a) preparing a doped semiconductor wafer; b) applying an epitaxial layer that is doped in such a way that a jump in the charge carrier density in the interface between the semiconductor wafer and the epitaxial layer occurs; c) optionally etching ventilation holes traversing the epitaxial layer and optionally filling the ventilation holes with a sacrificial material; d) depositing at least one sacrificial layer, at least one spacing layer, a membrane and optionally a semiconductor circuit on the top side of the epitaxial layer using a technology known per se, wherein the semiconductor circuit may be applied after the membrane is formed or while depositing the layers required to form the membrane; e) etching a hole on the back part of the sensor, wherein the etching method is selected in such a way that etching advances in the direction of the top side and ceases in the interference betw

Abstract: The power semiconductor components in prior art high-voltage smart power ICs frequently take up more than half of the total chip surface. To be able to produce the ICs more economically, the material consumption must be reduced, and hence, in particular, the surfaces of the drift zones of the power semiconductor components must be made significantly smaller. Based on the premise that the electrical breakdown field strength of silicon carbide is approximately ten times higher than that of silicon, the parts of a semiconductor component which receive voltage are integrated in silicon carbide. The drift zone can be made much smaller for the same reverse voltage. In an SiC MOS transistor with lateral current conduction, the SiC layer, which is only approximately 1-2 &mgr;m thick and is covered by an SiO2 layer, is arranged so as to be dielectrically insulated on an Si substrate. Two n+-doped SiC regions are used as source and drain contacts.

Abstract: In a laundry drum, a liquid diverter includes a driver having a driver interior and a run-off ramp therein. The driver interior receives liquid scooped and lifted by the drum during rotation thereof. The driver discharges scooped liquid in its lifted position into the drum interior. The run-off ramp is oriented horizontally or has a descending gradient when the drum rotation axis is orientated in a direction deviating from horizontal and when the drum is in a rotary position in which the driver is in its highest position, and thereby, permits, in all of the drum's rotation directions, a flow of scooped liquid on the run-off ramp in a direction of a rising part of the rotation axis when in the driver's lifted position. The liquid is conducted into only part of the drivers in a case of low liquid level as a result of the inclination.

Abstract: The invention relates to a switching transistor presenting reduced switching losses. In the switching transistor, output capacitance is very high when drain/source voltages are low. As the drain/source voltage increases, the capacitance falls to such low values that the energy stored in the transistor becomes very low.