Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper, and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention permits the value of the frame synchronization bytes (FSBs) to be made programmable, so that the system and method are flexible for changes in communication protocols. This flexibility also impacts the quantity, the location, bandwidth, and the bit error rate (BER) of the FSBs.

Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper, and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention permits the bit error rate (BER) of the frame synchronization bytes (FSBs) to be made programmable, so that the system and method are flexible for changes in communication protocols. This flexibility also impacts the number, the location, bandwidth, and the value the FSBs.

Abstract: A system and method have been provided to segment communications between relay nodes in a network using digitally wrapped, or frame structure communications. The overhead bytes in the frame are given special functions, to enable processes such as synchronization or an auxiliary communications channel. Overhead byte quantities, locations, values, or combinations of the above are used to signal the processes. Nodes in the network can be selectively programmed to recognize the overhead byte signals that trigger the processes.

Abstract: A system and method for providing redundancy in an integrated circuit (IC) relay device has been disclosed. The relay device accepts communications on a first and second receive path. The relay device monitors communications on both the receive paths, and selects a path having a high degree of integrity. Likewise, the relay selectively supplies communications on a first and second transmit path. The relay device selects the transmit path having the proper measure of communication integrity. Communications integrity can be based upon internally monitored criteria such as bit error rate, synchronization, clock signals, and forward error correction. Alternately, the integrity is determined external to the relay, and the relay responds to external switch commands.

Abstract: An encryption system has been provided to self-synchronously scramble communications where the receiver must recover the clock information from the data stream, such as the SONET format. To prevent jamming during initialization, or during times when no data is being transferred, flags and overhead data are scrambled, along with the payload. Timing controls to the scrambler permit this scrambler to be selectively engagable, so that the selective overhead scrambling becomes a second layer of scrambling. A method of self-synchronously scrambling the overhead in NRZ formatted communications is also provided.

Abstract: A stackable test apparatus is disclosed including a body having a first surface with a raised portion extending from the first surface along a perimeter of the body and a plurality of stacking pins extending away from the first surface arraigned in a stacking pin pattern. Also included is a plurality of stacking pin receivers located on a second surface of the body, the stacking pin receivers arraigned in a pattern to match the stacking pin pattern and sized to accept the stacking pin.

Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to selectively synchronize the broadcast frame structure at a plurality of network nodes. The described invention permits the frame synchronization bytes (FSBs) to be made programmable, so that the system and method are flexible for changes in communication protocols, as well for the selective exclusion of nodes. This flexibility also impacts the number, the location, bandwidth, and the bit error rate (BER) of the located FSBs.

Abstract: An apparatus for treating tissue in a tissue treatment area includes a heater that does not contact the tissue. The apparatus may be attached to the skin of a person to form a treatment volume about the tissue to be treated. The heater, supported at the layer, is held near the tissue to be treated, out of contact with the tissue. The apparatus includes a controller to cause the heater to raise the temperature of tissue in the tissue treatment area to a temperature in a range from a pretreatment temperature to 38° C. The controller may include means that cause the heater to operate over a therapeutic sequence, that cycle the heater on and off, that provide selectable average temperature values, that cause the heater to operate over an average temperature range, that cause the heater to operate at an average temperature over a therapy cycle, or that cause the heater to operate at an average temperature over a therapeutic sequence.

Abstract: A ring oscillator stage includes two differential transistor pairs configured to add an adjustable amount of delay to a differential input signal. Each differential pair is biased with a bias current transistor; the bias current transistor is “protected” by a voltage-clamping transistor that limits the drain voltage of the bias current transistor. The voltage-clamping transistors enable use of a power supply voltage (VDD) that would otherwise exceed the reliability breakdown voltage limit of the bias current transistors.

Abstract: A high speed, high sensitivity post amplifier as described herein includes a digitally-controlled DC offset cancellation feature. The amplifier circuit is configured to provide DC offset voltage levels in response to a digital control signal, where the digital control signal is generated based upon a data error metric such as bit error rate. The AC signal path and the DC offset adjustment signal path in the amplifier circuit are separated to facilitate operation with normal power supply voltages, and to achieve low power operation.

Abstract: A method for analyzing Gigabit Ethernet (GBE) and fiber channel protocol communications is provided which provides a more detailed understanding of the errors, than that provided under the IEEE 802.3z standard. The method creates an additional parity error signal which is not specified under the IEEE 802.3z standard. The parity error signals and IEEE 802.3z invalid code word signals are used to provide an analysis of whether the underlying communication errors are a result of 8B/10B coding word errors or running disparity errors. A system and apparatus to monitor performance in accordance with the above-mentioned method is also provided.

Abstract: A computer-implemented method of quickly determining whether two or more electronic devices are communicatively compatible is described. The method includes reading a plurality of input parameter data associated with a first electronic device and a plurality of output parameter data associated with a second electronic device; analyzing the pluralities of input and output parameter data by determining whether they comply with a plurality of communication compatibility rules; generating results from the analysis; and providing a visual display of the results. The results identify which input and output parameter data do and do not comply with these rules, and thus whether and to what extent the devices are communicatively compatible.

Abstract: Skew-tolerant Gray codes have the property that consecutive code words differ in only one co-ordinate position, and the additional property that, in each consecutive group of three consecutive code words, the first and third code words differ in only two adjacent coordinate positions.

Abstract: An integrated circuit relay device and switching method are presented that permit communications to be routed in a variety of patterns so that diagnostic procedures can be performed in situ, to evaluate digital wrapper communication links. The relay has a pair of inputs, a pair of outputs, a decoder, and an encoder. The relay is programmable to operate in a variety of modes, so that communications can be passed between any set of ports, with or without encoding and decoding processes. The flexible relay routing permits either test signals or normal communications to conducted through the device.

Abstract: A laser driver includes two DC-coupled differential drive circuits in which the common mode voltage of the first differential drive circuit is maintained a level affording a high compliance voltage for a laser diode driven by the second differential drive circuit. This is accomplished by means of an operational amplifier which compares the common mode voltage of the second differential drive circuit to a reference voltage. The operational amplifier operates in a closed-loop configuration to draw current through a common mode bias resistor in the first differential drive circuit in order to force the common mode voltage of the second differential drive circuit to a desired value determined by the reference voltage.

Abstract: A system and method have been provided for sorting information segments in a packet/cell earliest deadline first queue circuit. The invention permits information segments to be inserted at a rate that is twice as fast as the maximum extraction rate. Pairs of permanent and temporary registers are organized into a hierarchical sequence of stages. Generally, information segments with lower field ranks move systolically through the stages to temporary registers in higher sequence stages. Information segments with higher field ranks move systolically through the stages to permanent registers lower in the sequence of stages. The invention permits the highest rank information segments to be sorted and extracted with great efficiency.

Abstract: A voltage-controlled oscillator (“VCO”) structure includes a plurality of VCO circuits, each having a different nominal operating frequency range. Power consumption of the VCO structure is regulated by selective activation/deactivation of the individual VCO circuits. In a preferred embodiment, only one of the VCO circuits is active at any given time. The active VCO can be selected to satisfy the requirements of the particular application and/or to compensate for semiconductor manufacturing process variations.

Abstract: A forced air warming unit has a casing that encloses a scroll housing with a curved inside surface. A blower is disposed in the scroll housing inside the curved surface. Inlet and outlet openings are provided in the casing. A circuit board is mounted in the casing, against the scroll housing so that the blower is enclosed in space between the scroll housing and the circuit board. At least one opening is provided through the circuit board into the space in which the blower is disposed. A tapered, elongate, arcuate heater plate is disposed in the scroll housing between the circuit board and the blower, with a relatively wide end near the outlet opening and a second, relatively narrower end near the curved inside surface. Air is conducted in response to operation of the blower through the inlet opening, along a first side of the circuit board through the one or more openings in the circuit board into the scroll housing.

Abstract: A system and method is provided which describe a self-healing bidirectional lines switch ring (BLSR) communication node. Two interconnected relay elements, having default and duplex input and output ports, enable bidirectional communications through a node. In the event of a ring failure, the relays can be enabled to return communications to a source node so that the ring remains unbroken.

Abstract: A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure, a microstrip structure, a stripline structure, or the like. The cable can be coupled to destination components using a variety of connection techniques, e.g., direct bonding to a circuit substrate, direct soldering to a flip chip, mechanical attachment to a component, or integration with a circuit substrate. The cable can also be terminated with any number of known or standardized connector packages, e.g., SMA, GPPO, or V connectors.