Abstract: The method merges an alphanumeric data stream with a digitized image file. It comprises the steps of inputting a digitized image file in a first input terminal and storing the digitized image file on a first storage medium. The method then inputs an alphanumeric character string in a second input mechanism and stores the alphanumeric character string in a second storage medium. The method then converts the alphanumeric character string stored in the second storage medium into a bit pel image of the alphanumeric character string by substituting a two dimensional bit pattern of pels for each respective character in the string. The method then performs a logical combination of the bit pattern for each respective alphanumeric character with the digitized image at respective intended character locations in the digitized image area and outputs the logically combined digitized image with the alphanumeric character string superimposed thereon.

Abstract: The invention disclosed herein provides the basic operating capabilities of SNA data communications for host based application-to-application sessions across a packet switched network such as the Defense Data Network (DDN). The problem that is presented by the integration of these two technologies is that SNA is a connection oriented technology and DDN is a connectionless technology that requires an Internetting Protocol (IP) header on all information transmitted through the network and across multiple networks. One of the concepts of the invention is the definition of a localized SNA network to each SNA host by the channel attached Front End Processors (FEPs). These FEPs present an SNA PU4 definition to the host to allow it to carry out regular SNA sessions over the packet switched network to another host through its own respective FEP. The two FEPs working together imbed the SNA protocols in the IP datagrams and provide the proper SNA connections and control.

Abstract: A real time control system is disclosed for controlling the sequential execution of scheduled operatons such as in process control or broadcast scheduling applications. The system uses a fail safe feature characterized as a sender/listener architecture. An external clock input to the sender and the listener assures synchronous sequential stepping through identical schedules stored in each processor. Under normal operation, the sender processor controls the execution of events as they are sent from a host computer connected to the system, Unscheduled events or errors are processed by being added to the schedule in real time for both the sender and listener processors. The listener processor monitors the sender's signaling in the controlled network and, in the case of a failure in the sender, the listener immediately assumes control of the system as the new sender.

Abstract: The invention includes a control vector checking code respository located either within the same system as the crytographic facility or alternately remotely from the system containing the cryptographic facility. The control vector checking code repository will be linked to the cryptographic facility by one of several means. A first means for linking the repository to the cryptographic facility would include a physically secure data communications link. A second means for connecting the repository to the cryptographic facility would be by using an insecure channel with authentication, wherein either a modification detection code or alternately a message authentication code would be transmitted to the cryptographic facility and then the desired control vector checking code would be transmitted over the link. The cryptographic facility will include a code authorization mechanism to compare the transmitted MAC or MDC with a corresponding value computed from the received control vector checking code.

Abstract: A fused, redundancy selection circuit is disclosed which is disabled by the absence of a chip select signal. The circuit has the feature of avoiding the use of nodes with a floating potential and in this manner it provides an enhanced radiation hardened characteristic. The circuit is effectively disabled if no redundancy is required on a particular memory chip, by leaving fuses which are a part of the circuit, intact. Alternately, if the memory chip is tested to have defects, the redundancy circuit is selectively enabled to provide the desired redundancy for the chip, by blowing fuses which are a part of the circuit. Thereafter, the redundancy circuit is now an active part of the memory chip and it is selectively enabled when the chip select signal is applied to the chip. An advantageous feature of the circuit is that it does not dissipate power when its function is not required either because its enabling fuses have not been blown or alternately when the chip select signal is off.

Abstract: A cryptographic system and method is provided which accepts a key K encrypted under a key formed by exclusive-ORing a key-encrypting key KK with a first control vector C5 and outputs the same key K encrypted under a key formed by exclusive-ORing KK with a second control vector C6. The set (C5, C6) represents a mapping of the type and usage of the key K defined by the control vector C5 to the type and usage defined by the control vector C6. The set of allowable control vector mappings, that is from C5 to C6, are defined in a control vector translation table, which is specified in advance by authorized installation personnel.

Abstract: A recognition method and apparatus is disclosed which provides information on what type of barcode is to be recognized and the strategy to be applied in identifying and decoding the barcode. For N raster lines of a dimension "x", an array of one byte sums of dimension "x" is created. The sums are the sum of the "1" bits in the rectangular binary image input array in the N lines of the image. A new array can be generated which will have a dimension equal to the number of changes from black to white in the original "x-y" digital image. The values in this array will represent the length of each run of same color pels. These runs are then normalized according to rules of a particular barcode standard being handled.

Abstract: A computer method is disclosed to isolate linguistically salient strings ("words") from a natural language text stream. The process is applicable to a variety of computer hardware, to any character encoding scheme, and to the idiosyncrasies of most natural languages.

Abstract: The drivers of a bus are provided with an internal positive voltage clamp, which insures that large positive voltage waves will not be launched down the bus. By increasing the output conductance of the driver when larger than desired voltage is detected at its output, higher voltage waves are prevented from developing on the bus.

Abstract: An improved memory array having row address inputs connected to a row address decoder and column address inputs connected to a column address decoder, the row address decoder and column address decoder having an address bus connected thereto, the memory being organized into an array of word lines organized into rows and columns having a pair of bit lines for each column, the improvement comprising, segmenting the array into a plurality of segments, each segment containing a portion of all of the bit lines; a bit equalization circuit for each segment, to equalize the potential on each bit line in the bit line pair when activated; an equalization circuit control means, having an input coupled to the input address lines, and an output connected to each equalization circuit on each respective segment of the array, for enabling the equalization circuits on those segments of the array which are not selected by the input address and for disabling the equalization circuits on that segment of the array which is select

Abstract: The current peak detector can be described as four separate sections. The first section is power distribution. The second is the analog section where the Idd current transient peak is first detected. There are two analog sections, one for Idd internal, and another for Idd external. The third section is the automatic multiplexer that controls which of the two analog sections will drive the digital section. The fourth and final section is the digital section where a voltage that is analogous to the peak current is converted to a DC voltage level with infinite memory. The digital section performs the logic function of replacing any prior digitized voltage peak with any higher voltage peak that may occur during the test period.

Abstract: A Parametric Information Extraction (PIE) system has been developed to identify automatically commonly specified information such as author, date, recipient, address, subject statement, etc. from documents in free format. The program-generated data can be used directly or can be supplemented manually to provide automatic indexing or indexing aid, respectively.

Abstract: In processing a priority queue, the elements are kept in an unsorted stack and are searched for the next highest priority element only after the highest priority element has been read from the holding register. Each time a new element is written into the queue, a comparison is made of the priority of the new element with the priority of the existing element in the holding register. If the new element has a higher priority, then the existing element in the holding register is written onto the top of the stack. Alternately, if the element in the holding register has the higher priority, then the new element is written onto the top of the stack. This assures that the holding register always contains the element having the highest priority. Therefore, a read of the priority queue by reading the contents of the holding register guarantees that the highest priority element is there and it can be accessed immediately without further searching the queue.

Abstract: When the user is logged on to a processor running multiple virtual terminals and he presses the Secure Attention Key, the existing virtual terminal processes are not destroyed. Instead, the invention creates a new virtual terminal, establishes a trusted path for the new virtual terminal, makes the new virtual terminal the current virtual terminal, and then runs the trusted process in the new virtual terminal.

Abstract: The invention is an apparatus and method for validating that key management functions requested for a cryptographic key by the program have been authorized by the originator of the key. The invention includes a cryptographic facility characterized by a secure boundary through which passes an input path for receiving the cryptographic service requests, cryptographic keys and their associated control vectors, and an output path for providing responses thereto. There can be included within the boundary a cryptographic instruction storage coupled to the input path, a control vector checking unit and a cryptographic processing unit coupled to the instruction storage, and a master key storage coupled to the processing means, for providing a secure location for executing key management functions in response to the received service requests. The cryptographic instruction storage receives over the input path a cryptographic service request for performing a key management function on a cryptographic key.

Abstract: A method and apparatus are disclosed for use in a data processing system which executes a program which outputs cryptographic service requests for operations with cryptographic keys which are associated with control vectors defining the functions which each key is allowed by its originator to perform. The improved method and apparatus enable the use of control vectors having an arbitrary length. It includes a control vector register having an arbitrary length, for storing a control vector of arbitrary length associated with an N-bit cryptographic key. It further includes a control vector checking means having an input coupled to the control vector register, for checking that the control vector authorizes the cryptographic function which is requested by the cryptographic service request. It further includes a hash function generator having an input coupled to the control vector register and an N-bit output, for mapping the control vector output from the control vector register, into an N-bit hash value.

Abstract: Cryptographic PIN processing is achieved in an improved manner by associating control vectors with the PIN generating (verification) keys and PIN encrypting keys which provide authorization for the uses of the keys intended by the originator of the keys. The originator may be the local cryptographic facility (CF) and a utility program under the control of a security administrator, or the originator may be another network node which uses the key management methods described in the above-referenced copending patent applications to distribute said keys.Among the uses specified by the control vector are limitations on the authority to use the associated key with certain PIN processing instructions, such as PIN generation, verification, translation and PIN block creation. Furthermore, the control vector may limit the authority of certain instructions to process clear PIN inputs (such as in PIN verification).

Abstract: The trusted path mechanism invention guarantees that data typed by a user on a terminal keyboard is protected from any intrusion by unauthorized programs. It allows a user to create a non-forgeable and non-penetrable communication path between the user's terminal and the trusted operating system software. The user can create a trusted path by simply pressing a key, called the Secure Attention Key (SAK), on the terminal keyboard. This operation can be called when the user logs into the system in order to be sure that the user is communicating with the real login program and not a Trojan horse program masquerading as a login program, which could steal the user's password. After the user establishes the trusted path, he can enter his critical data, such as a password, and can be sure that his critical data is not being stolen by an intruder's program.

Abstract: Data cryptography is achieved in an improved manner by associating with the data cryptography key, a control vector which provides the authorization for the uses of the key intended by the originator of the key. Among the uses specified by the control vector are limitations on encryption, decryption, authentication code generation and verification, translation of the user's data. Complex combinations of data manipulation functions are possible using the control vectors, in accordance with the invention. The system administrator can exercise flexibility in changing the implementation of his security policy by selecting appropriate control vectors in accordance with the invention.

Abstract: A method for simplifying key management in situations where unique cryptographic keying relationships are required end-to-end between pairs of parties and a symmetric encryption algorithm is to be used. It is useful in cases where the parties come from disjoint subsets of the total population of parties. The method provides some of the characteristics of a public key crypto system (PKS) utilizing the public identities of the parties as part of the key, but lacks the property of PKS which allows a party to independently generate a secret key which is known only to that party.