Abstract: An improved checkpoint retry mechanism is disclosed which automatically updates checkpoint addresses to enable the retry of instruction sequences for shorter segments of recently executed code, in response to the detection of an error since the passage of the current checkpoint. It does this by updating three different types of checkpoint addresses, a first checkpoint address for the instruction which follows a memory write or I/O write operation, a second type checkpoint address for the first instruction in an interrupt service routine, and a third type checkpoint address for the first instruction in an interrupted routine following an interrupt event. The resulting checkpoint retry mechanism is more efficient and faster because it adaptively updates the checkpoint address to reduce the size of code segments which must be reexecuted during retry operations. The invention operates to avoid memory corruption and erroneous I/O outputs during retry operations and protects from erroneous retry sequences.

Abstract: A cryptographic method and apparatus are disclosed which transform a message or arbitrary length into a block of fixed length (128 bits) defined modification detection code (MDC). Although there are a large number of messages which result in the same MDC, because the MDC is a many-to-one function of the input, it is required that it is practically not feasible for an opponent to find them. In analyzing the methods, a distinction is made between two types of attacks, i.e., insiders (who have access to the system) and outsiders (who do not). The first method employs four encryption steps per DEA block and provides the higher degree of security. Coupling between the different DEA operations is provided by using the input keys also as data in two of the four encryption steps. In addition, there is cross coupling by interchanging half of the internal keys.

Abstract: A very large scale integrated (VLSI) compatible, random number generator which is highly invulnerable to cryptographic attack. The invulnerability to cryptographic attack is based upon a low frequency sampling of the output of a pseudo-random number generator which is operated at a varying frequency from a free-running ring oscillator. In a first embodiment, a free-running ring oscillator is used to drive a sampled linear feedback shift register. The asynchronous, serial pseudo-random number output from the linear feedback shift register is sampled periodically, thereby introducing randomly occurring deviations from the pseudo-random number sequence. A variation of the free-running ring oscillator is employed as the pseudo-random number generator, by introducing into the feedback loop of the ring oscillator, an exclusive OR circuit which is connected so that the ring oscillator thereby produces a serial, pseudo-random number sequence.

Abstract: The invention finds application primarily in three phase power systems having A, B and C voltage phases. The invention includes a first voltage measurement device coupled between the A phase input and the B phase input, having a first measured voltage output. The invention further includes a second voltage measurement device coupled between the A phase input and the C phase input, having a second measured voltage output. The invention also includes a comparator having a first input connected to the first output of the first voltage measurement device and a second input connected to the second output of the second voltage measurement device, for generating a signal when the first measured voltage is equal to and opposite in polarity from the second measured voltage. This signal indicates that a zero crossover event has occurred with the A phase.

Abstract: A computer method is disclosed for accurately transforming multiple radar observations of aircraft into a common coordinate system for air traffic control applications. The method involves a transformation from radar observables of the target slant range, azimuth and altitude to the target position coordinates in a stereographic system plane for display. The method includes a conformal coordinate conversion process from geodetic to conformal spherical coordinates followed by a conformal stereographic projection process onto a system display plane. The resulting display of aircraft position on the system plane is more accurate than has been available in the prior art.

Abstract: The invention disclosed herein provides the basic operation capabilities of SNA data communications for host-to-remote terminal sessions across a packet switched network such as the Defense Data Network (DDN). The problem that is presented by the integration of these two technologies is that SNA is a connection oriented technology and DDN is a connctionless technology that requires an Internetting Protocol (IP) header on all information transmitted through the network and across multiple networks. One of the concepts of the invention is the definition of a localized SNA network to each SNA host by the channel attached front end processors (FEPs). These FEPs present a SNA LU2 definition to the host to allow it to carry out regular SNA sessions over the packet switched network to remote terminal users. The second concept is providing primary SNA PU5 support, in the Remote Access Facilities (RAF). This enables each RAF to control all the SNA terminals and devices attached to it as a separate network.

Abstract: An improved natural language text parser is disclosed which provides syntactic analysis of text using a fast and compact technique. Sequential steps of word isolation, morphological analysis and dictionary look-up combined with a complement grammar analysis, are applied to an input data stream of woods. Word expert rules, verb group analysis and clause analysis are then applied to provide an output data structure where the words in the input data stream are associated with appropriate phrase markings. The principle of operation of the parser is applicable to a variety of Indo-European languages and provides a faster and more compact technique for parsing in a data processor than has been available in the prior art.

Abstract: In the remote trusted path invention, secure systems may provide a mechanism for the user to establish a trusted path for direct communication with the system's trusted computing base for security-critical operations. This invention allows users to request such a trusted path from remote systems using a new TELNET option and command, in a system-independent, confirmed, backward-compatible manner. It also describes how to implement remote support for such a trusted path in systems which use a Secure Attention Key mechanism such as Secure AIX.

Abstract: A compiler method is disclosed which defines a data flow for a specific complex function to be executed on a plurality of data processing elements in a distributed processing system, by means of defining a plurality of control blocks which are associated with each task. The control blocks are in relocatable code so that they may be associated with any one of several similar types of data processing elements within the distributed processing network. The control blocks include local operating system control blocks, token control, post and wait control blocks, and processing element task execution control blocks. The use of the distributed processing system compiler method enables the quick and easy implementation of complex functions having interdependent processing tasks in a distributed processing system.

Abstract: The parity generation circuit which is disclosed takes advantage of a property of the parity of a number before and after it has been incremented. This is characterized as the parity toggle property and it allows parity generation to be done on the most significant bits of an adder before the carry input to these most significant bits has been generated from the least significant bit portion of the sum produced by the adder. The final parity for the entire sum output of the addition process is adjusted quickly when the carry into the most significant bits of the sum becomes available from the least significant bit portion of the sum output. The parity toggle property of the invention allows for the quick adjustment of the parity without incurring the undue delay of waiting for the production of the carry output from the low order sum before commencing computations with the high order sum.

Abstract: Correctly spelled compound words are provided as candidates to replace a misspelled compound word in many natural languages such as Dutch, Danish, German, Icelandic, Norwegian, Swedish, Swiss German, etc. The basic technique consists of looking up words in a dictionary by the association of component flags with each possible constituent word within the misspelled compound word as well as with the possible replacement candidates for each letter string between these possible constituent words, and by the application of powerful tree-scanning techniques that isolate the possible components of a compound word and determine their correctness in isolation and association of each other.

Abstract: A computer method is disclosed for analyzing text by employing a model known as a paradigm, that provides all the inflectional forms of a word. A file structure is created consisting of two components, a list of words (a dictionary), each word of which is associated with a set of paradigm references, and the file of paradigms consisting of grammatical categories paired with their corresponding ending or affix portions (known as the desinence) specifying tense, mood, number, gender or other linguistic attribute. A computer method is disclosed for generating the file structure of the dictionary by generating all forms of the words from a list of standard forms of the words (known as the lemma) which is generally the infinitive of a verb or the singular form of a noun, the lemmas being generated with their corresponding paradigms.

Abstract: The improved I/O controller includes a data processing element for executing a sequence of stored program instructions to control the transfer of data between respective ones of a plurality of I/O devices and the host computer. The controller further includes a memory element for storing the program instructions and parameter tables associated with the transfer of data. A first sequence of stored program instructions defines a first communications protocol and a second sequence of stored program instructions defines a second communications protocol. A first control table is associated with a first I/O device, for relating the first device to the first program instructions and a second control table is associated with a second I/O device, for relating the second I/O device to the second program instructions.

Abstract: Romance language verbs are frequently modified by the addition of pronouns called enclitic pronouns. The pronouns can only be added within prescribed grammatical constraints and affect the spelling and, sometimes, the accentuation of the verbs. Many linguistic processes for which automation is desirable, such as synonym look-up or grammatical analysis, require identification of the unmodified verb forms. The methods described herein make is possible to convert a verb modified by enclitic pronouns to its unmodified form.

Abstract: The improved register file includes an array of storage cells arranged in columns and rows, each column having a pair of bit lines for writing into the cell. Each storage cell includes a flip-flop cell having a first storage node connected to a respective read line which is unique for that cell. A read address latch has an enabling input connected to the master clock signal which is the same master clock signal for the LSSD logic on the integrated circuit chip. The read address latch applies its decoded output to a multiplexer which selects those read lines coming from one of the rows of storage cells in the array, and applies those selected read lines to an output storage cell array. The output storage cell array is enabled by a slave clock signal which is the same slave clock signal employed in the LSSD logic on the same integrated circuit chip. The output storage cell array stores the data from the selected read lines out of the multiplexer.

Abstract: An external dispatcher distributes prioritize tasks to a plurality of processor channels. The processor channels then contend for one of two partitions for the execution of instructions assigned thereto during a multiphase instruction cycle. Two unique processor channels, working on unrelated tasks, utilize the even and the odd partitions to execute a single instruction assigned to the respective processor channels. The instruction cycle is subdivided into phases in order to maximize the use of a memory system and the central processing unit (CPU). When one of the partitions is accessing the memory system and working registers associated therewith, the other partition is utilizing the CPU. The net result is the efficient use of all memory bandwidth and the CPU without requiring pipe lined set/execute structures common on high performance micro-program systems.

Abstract: A computer method is disclosed for ranking word similarities which is applicable to a variety of dictionary applications such as synonym generation, linguistic analysis, document characterization, etc. The method is based upon transforming an input word string into a key word which s invariant for certain types of errors in the input word, such as the doubling of letters, consonant/vowel transpositions, consonant/consonant transpositions. The specific mapping technique is a morphological mapping which generates keys which will have similarities that can be detected during a subsequent ranking procedure. The mapping is defined such that unique consonants of the input word are listed in their original order followed by the unique vowels for the input words, also in their original order. The keys thus generated will be invariant for consonant/vowel transpositions or doubled letters.

Abstract: A fiber-optic receiver invention includes an improved edge detector which receives the input current pulse from a photo diode located at the output of an optical fiber link. The edge detector differentiates the input waveform and provides a sequential positive going and negative going pulse combination at its output. The output of the edge detector is applied to the input of a switched threshold comparator circuit. The switched threshold comparator senses the differentiated waveform signal and provides complementary output signals which are the desired data output waveforms. At the same time, the switched threshold comparator applies the output waveform to an emitter-coupled differential amplifier having an unbalanced collector circuit. The emitter-coupled differential amplifier has a first transistor connected between a current and the reference input to a differential comparator.

Abstract: A microsequencer includes at least two program counters which access microinstructions stored in a memory system. A first program counter is cyclicly incremented to sequentially access microinstructions of a principal microprogram. When a particular microinstruction is accessed which indicates that a subroutine will be the next program to be executed, a branched-from address, representing the microinstruction calling the subroutine, is retained in the first program counter. An address representing the first instruction of the subroutine is loaded into a second program counter. The second program counter is then cyclicly incremented to sequentially access microinstructions associated with the subroutine. After the subroutine has been executed, the first program counter is re-enabled and cyclicly incremented so that the execution of the principal program is resumed in an orderly manner.

Abstract: The invention is a software reconfigurable cross point switch which selectively interconnects a plurality of phone lines and a plurality of shared resources such as call progress monitors, dual tone multifrequency (DTMF) receivers, DTMF automatic dialers and automatic answer tone detectors. The invention achieves its objective of enhanced switching efficiency and greater flexibility in the connectivity between diverse communications elements, by independently switching two separate switching planes of the cross point switch so as to enable different paths to be taken by the transmit portion and the receive portion of a particular telephone connection.The cross point switch architecture invention flexibly allows for many applications, one in particular being conference summing.