Abstract: A semiconductor device has a gate contact structure, including a semiconductor substrate, a polycrystalline silicon layer used as a gate electrode of a transistor, a middle conductive layer, a top metal layer having an opening exposing the polycrystalline silicon layer, and a contact plug directly contacting the polycrystalline silicon layer through the opening.

Abstract: An apparatus and method for fabricating a color filter by printing pixels on a substrate using an ink jet head, optically analyzing pixel quality and controlling printing in accordance with the pixel quality. Optically analyzing may include analyzing a number of ink droplets or a transmittance of a printed pixel.

Abstract: A pixel employable by a display device, including a plurality of transistors, including a first transistor having a gate electrode, and a capacitor including a first terminal connected to the gate electrode of the first transistor and a second terminal that is an intrinsic semiconductor.

Abstract: A display module including a display panel, a chassis on a non-image-displaying surface of the display panel, and a double-sided tape between the display panel and the chassis, the double-sided tape including a foam layer, a top adhesive layer on an upper surface of the foam layer, and a first bottom adhesive layer on a lower surface of the foam layer.

Abstract: A siloxane polymer composition includes an organic solvent in an amount of about 93 percent by weight to about 98 percent by weight, based on a total weight of the siloxane polymer composition, and a siloxane complex in an amount of about 2 percent by weight to about 7 percent by weight, based on the total weight of the siloxane polymer composition, the siloxane complex including a siloxane polymer with an introduced carboxylic acid and being represented by Formula 1 below, wherein each of R1, R2 R3, and R4 independently represents H, OH, CH3, C2H5, C3H7, C4H9 or C5H11, R? represents CH2, C2H4, C3H6, C4H8, C5H10 or C6H12, and n represents a positive integer so the siloxane polymer of the siloxane complex has a number average molecular weight of about 4,000 to about 5,000.

Abstract: A method and apparatus for controlling a light source for use with an optical disc having optimum power values for different stages in a writing signal for the optical disc, includes comparing current operational characteristics of the light source to previous operational characteristics, and, when the current operational characteristics differ from the previous operational characteristics and a stage in the writing signal has overlapping power, determining a compensation voltage based on the current operational characteristics and an optimum power value for that stage.

Abstract: A flash memory device includes a memory block including word lines arranged between a first selection line and a second selection line, the word lines being divided into a first group and a second group, a control logic configured to determine an activation order of the first and second selection lines and determine first and second read voltages to be supplied to unselected word lines, the control logic determining the activation order according to whether a selected word line belongs to the first group or the second group, and a row selection circuit configured to, during a read operation, drive the unselected word lines with the first and second read voltages, and activate the first and second selection lines, according to the control logic.

Abstract: A color camera includes at least three sub-cameras, each sub-camera having an imaging lens, a color filter, and an array of detectors, The color camera combines images from the three sub-cameras to form a composite multi-color image, wherein the three sub-cameras include a total number of detectors N and a total number of different color sets X, wherein a first number of signals of a first color set is less than N/X and a second number of signals of a second color set is greater than N/X, signals of the second color set being output from at least two of the three sub-cameras, wherein resolution of a composite image of the second color set is greater than resolution of an individual sub-camera and a resolution of the composite image. Corresponding images of the same color set may be shifted, either sequentially or simultaneously, relative to one another.

Abstract: A self-aligned 1 bit silicon oxide nitride oxide silicon (SONOS) cell and a method of fabricating the same has high uniformity between adjacent SONOS cells, since the lengths of nitride layers do not vary due to misalignment when etching word lines of the 1 bit SONOS cells. An insulating layer pattern that forms a sidewall of a word line is formed on a semiconductor substrate, and a word line for a gate is formed on the sidewall thereof. Etching an ONO layer using a self-aligned etching spacer provides uniform adjacent SONOS cells.

Abstract: An optical element may include a first diffractive structure having a radially symmetric amplitude function and a second diffractive structure having a phase function. The second diffractive structure may serve as a vortex lens. A system employing the optical element may include a light source and/or a detector.

Abstract: A donor substrate for a flat panel display includes a base film, a light-to-heat conversion layer on the base film, a first buffer layer on the light-to-heat conversion layer, the first buffer layer including an emission host material, a transfer layer on the first buffer layer, and a second buffer layer on the transfer layer, the second buffer layer including an emission host material identical to the emission host material of the first buffer layer.

Abstract: A plasma display panel (PDP) includes a front substrate, a rear substrate facing the front substrate, barrier ribs between the front and rear substrates to define a plurality of discharge cells, photoluminescent material in the discharge cells, first electrodes on the front substrate along a first direction, second electrodes on the rear substrate and extending in a second direction crossing the first direction, at least one dielectric layer on the rear substrate, and a white pigment layer on the substrate.

Abstract: A system including a plurality of transmission lines, a transmitter outputting respective signals to each of the plurality of transmission lines, a receiver receiving each of the plurality of signals via respective transmission lines, the receiver including a connection path connected to a termination voltage, a plurality of termination circuits distributed along the connection path, each termination circuit receiving a unique termination voltage from the connection path, receiving a respective signal and outputting a terminated input signal, a reference voltage generator including multiple reference voltage generator units connected to a common voltage, each reference voltage generator unit uniquely receiving at least one unique termination voltage and outputting a reference voltage, and a plurality of data input buffers receiving respective signals and an appropriate reference voltage of the multiple reference voltages output from the reference voltage generator.

Abstract: A plasma display panel may include first and second substrates facing each other and spaced apart from each other, barrier ribs between the first and second substrates, the barrier ribs defining discharge cells to define discharge and non-discharge regions, address electrodes extending in a first direction in respect to the discharge cells, and first and second electrodes formed on the second substrate and extending in a second direction intersecting the first direction, where at least one of the first and second electrodes includes black projections extending from the discharge region to the non-discharge region.

Abstract: An approach is provided for semiconductor devices and methods for providing a contact structure. Methods may include forming a gate pattern on a substrate including a device isolation pattern provided to define an active region, the gate pattern crossing over the active region and being disposed on the device isolation pattern, and forming a first doped region and a second doped region in the active region adjacent to opposite sides of the gate pattern, respectively. The methods may include sequentially forming a gate spacer and a sacrificial spacer on both sidewalls of the gate pattern, forming an interlayer dielectric on the entire surface of the substrate, planarizing the interlayer dielectric to expose the gate spacer and the sacrificial spacer, removing a portion of the sacrificial spacer to form a groove to expose the first doped region, and forming a contact structure in the groove.

Abstract: An electron emission display device includes first and second substrates facing each other with a non-active area and an active area having a plurality of pixel, a first pixel portion, e.g., an electron emission unit, formed on the first substrate, a second pixel portion, e.g., a light emission unit, formed on the second substrate, and one or more alignment marks formed in the non-active area of at least one of the first and the second substrates and having a pattern substantially similar to that of the plurality of pixels.

Abstract: An optical transceiver includes at least one light source and at least one detector mounted on the same surface of the same substrate. The detector is to receive light from other than a light source on the surface. At least one of the light source and the detector is mounted on the surface. An optics block having optical elements for each light source and detectors is attached via a vertical spacer to the substrate. Electrical interconnections for the light source and the detector are accessible from the same surface of the substrate with the optics block attached thereto. One of the light source and the detector may be monolithically integrated into the substrate.

Abstract: An optical chassis includes a mount substrate an optoelectronic device on the mount substrate, a spacer substrate, and a sealer substrate. The mount substrate, the spacer substrate and the sealer substrate are vertically stacked and hermetically sealing the optoelectronic device. An external electrical contact for the optoelectronic device is provided outside the sealing. At least part of the optical chassis may be made on a wafer level. A passive optical element may be provided on the sealer substrate or on another substrate stacked and secured thereto.

Abstract: An embodiment of an electron emission device includes first and second substrates facing each other, unit pixels being defined on the first and the second substrates, an electron emission unit on the first substrate, phosphor layers on a surface of the second substrate facing the first substrate, each phosphor layer corresponding to at least one unit pixel, non-light emission regions between the phosphor layers, and spacers interposed between the first and the second substrates and arranged in the non-light emission regions, wherein the non-light emission regions comprise spacer loading regions loaded with the spacers, wherein a width of a spacer loading region and a pitch of the unit pixels satisfies the following condition: A/B?about 0.2, where A indicates the width of the spacer loading region and B indicates the pitch of the unit pixels located along the width of the spacer loading region.

Abstract: A wiring structure of a semiconductor device may include an insulation interlayer on a substrate, the insulation interlayer having a linear first trench having a first width and a linear second trench having a second width, the linear second trench being in communication with a lower portion of the linear first trench, the first width being wider than the second width, and a conductive layer pattern in the linear first and second trenches.