Abstract: A driving apparatus, and a driving method for an electron emission display, includes a controller for comparing external video data input signals, switching a polarity control signal in a predetermined period on the basis of the comparison and controlling a video data output signal in accordance with the polarity control signal, and a data driver for modulating the video data signal output from the controller. The switching of the polarity control signal may be shifted temporally when the comparison indicates the video data input signals have the same gray level.

Abstract: A method of guaranteeing users' anonymity and a wireless LAN system therefor are provided. In a wireless LAN system, the method of guaranteeing user' anonymity includes (a) creating a plurality of temporary address sets, each of which corresponds to a unique Media Access Control (MAC) address of a wireless terminal and transmitting the temporary address set to the corresponding wireless terminal, and (b) performing data packet transmission between the wireless terminal and the wireless access node using a temporary address selected from the temporary address set as a source address or a destination address. Therefore, it is possible to guarantee users' anonymity and improve security of a system by not exposing a MAC address during data packet transmission between a wireless terminal and a wireless access node.

Abstract: Example embodiments relate to a memory test system having a semiconductor memory device, a coupling circuit and a tester. The semiconductor memory device may include a plurality of first output nodes and a plurality of second output nodes. The first output nodes may be connected to respective first on-die termination circuits that may not be tested, and the second output nodes may be connected to second on-die termination circuits that may be tested. The semiconductor memory device may be configured to generate test signals of the second on-die termination circuits and to provide the test signals to the second output nodes. The coupling circuit may be configured to connect the first output nodes and the second output nodes to communication channels, respectively. The tester may be configured to test a logic state of the test signals of the communication channels.

Abstract: A piezoelectric inkjet printhead including an upper substrate, having an ink inlet, a manifold connected with the ink inlet, and a plurality of pressure chambers arranged along at least one side of the manifold, wherein the ink inlet passes through the upper substrate, and the manifold and the pressure chambers are formed in a lower surface of the upper substrate, a lower substrate disposed directly adjacent the upper substrate, the lower substrate having a plurality of restrictors each connecting the manifold with one end of each of the pressure chambers, and a plurality of nozzles each being formed in a position of the lower substrate that corresponds to the other end of each of the pressure chambers to vertically pass through the lower substrate, wherein the plurality of restrictors are formed in an upper surface of the lower substrate, and a plurality of piezoelectric actuators.

Abstract: Disclosed herein is an anisotropic conductive film forming composition, including at least one polymer comprising a polymer containing a silane group; at least one polymerizable compound; and a plurality of conductive particles. The at least one polymer may include an elastomeric polymer and a filler polymer, at least one of which contains a silane group. The at least one polymerizable compound may include a cross-linking agent and/or a polymerization reaction enhancer. The cross-linking agent may also have a silane group. In addition, the film forming composition may include a solvent. The film forming composition is advantageous in that the resulting anisotropic conductive film exhibits enhanced peel and adhesive strength and low electrical contact resistance.

Abstract: A method for decoding data stored in a disk is achieved by demodulating a physical cluster read out from the disk and outputting LDC (long distance code) data and BIS (burst indicator subcode) data included in the physical cluster, temporarily storing part of the LDC data and BIS data of the data included in the physical cluster in a first memory portion, reading out the LDC data and BIS data stored in the first memory portion and storing the read out data in a second memory portion, reading out LDC data and BIS data requiring error correction from the second memory portion and temporarily storing the read out data in the first memory portion, and storing LDC data and BIS data for which data processing operation including the error correction operation is completed in the second memory portion.

Abstract: A method of enhancing yield of semiconductor integrated circuit includes determining multiple experimental values, each experimental value corresponding to a distance from a side of a hole to an opposing side of a shape surrounding the hole, forming test patterns representing each of the experimental values on a wafer and calculating experimental value-based systematic fault rates from the test patterns; converting the experimental value-based systematic fault rates of the hole into the experimental value-based systematic fault rates, calculating a length of a side of the hole for which a distance between the side of the hole and the opposing side of the shape corresponds to each of experimental values, and calculating a systematic fault rate of the hole using the experimental value-based systematic fault rates per unit hole length and the length of the sides of the hole calculated for the respective experimental values in the desired layout.

Abstract: A light guide member capable of guiding light received from at least a first light source and second light source, wherein the first light source is spaced a distance D3 from the second light source. The light guide member may include a first side including a plurality of first grooves extending along a first direction and a plurality of second grooves extending along the first direction, wherein the first grooves may have a first pitch and the second grooves have a second pitch, the first pitch being different from the second pitch.

Abstract: A photo-curable adhesive composition including an oligourethane acrylate in a range of about 10 to about 30% by weight, a reactive monomer-diluent in a range of about 32 to about 46% by weight, a polymeric filler in a range of about 20 to about 30% by weight, a photoinitiator in a range of about 2.5 to about 5.0% by weight, an antioxidant in a range of about 0.005 to about 0.02% by weight, a chlorinated polyvinyl chloride in a range of about 3.0 to about 10%, the chlorinated polyvinyl chloride having a chlorine content of about 62 to about 64% by weight, oxalic acid in a range of about 0.3 to about 2.0% by weight, a thixotropic agent in a range of about 0.5 to about 3.0% by weight, and a plasticizer in a range of about 1.0 to about 10.0% by weight, based on the total weight of the composition.

Abstract: A nozzle plate, inkjet printhead with the same and method of manufacturing the same. The nozzle plate includes at least one nozzle and has at least one heater segment disposed adjacent to the nozzle. The heater segment is configured to heat a first fraction of the circumference to a greater degree than a second fraction of the circumference. Heater segments are disposed at intervals around a circumference of the nozzle and are independently operable.

Abstract: A non-volatile memory device includes a tunnel insulating layer pattern on a channel region of a substrate, a charge trapping layer pattern on the tunnel insulating layer pattern, a blocking layer pattern on the charge trapping layer pattern, and a gate electrode including a conductive layer pattern on the blocking layer pattern and a barrier layer pattern on the conductive layer pattern. The conductive layer pattern includes a metal.

Abstract: An optical sheet includes a substrate having rear and front surfaces, a micro-lens-array on the front surface of the substrate, the micro-lens-array including a plurality of micro-lenses, a plurality of protrusions spaced apart from each other on the rear surface of the substrate, and an intercepting reflector layer on the protrusions.

Abstract: A wire grid polarizer includes a substrate adapted to transmit predetermined wavelengths of light, a plurality of dielectric wires extending parallel to one another along a first direction on the substrate, the dielectric wires including a dielectric material adapted to transmit the predetermined wavelengths of light, and a plurality of metal wires extending along the first direction between the dielectric wires, wherein sidewalls of the metal wires include portions in contact with sidewalls of the dielectric wires and portions not in contact with the sidewalls of the dielectric wires.

Abstract: Example embodiments relate to a coupling structure including a chassis base configured to support a display panel, and an electromagnetic wave shielding member connected to the chassis base so as to form an area for installing a circuit board. The electromagnetic wave shielding member may surround the circuit board.

Abstract: An on-the-fly error checking and correcting system and method of supporting a non-volatile memory processes data using an on-the-fly error correction method to be performed between a temporary memory and a flash memory. The flash memory stores actual data read from the temporary memory and parity generated on-the-fly in a write mode, and transmits the stored data to the temporary memory, computes a syndrome from the stored data on-the-fly, and generates an error correction information signal according to the result of computing in a read mode. Thus, error correction may only be selectively performed.

Abstract: A method of forming fine metal interconnect patterns includes forming an insulating film on a substrate, forming a plurality of mold patterns with first spaces therebetween on the insulating film, such that the mold patterns have a first layout, forming metal hardmask patterns in the first spaces by a damascene process, removing the mold patterns, etching the insulating film through the metal hardmask patterns to form insulating film patterns with second spaces therebetween, the second spaces having the first layout, and forming metal interconnect patterns having the first layout in the second spaces by the damascene process.

Abstract: Example embodiments relate to a memory system and a method of controlling power thereof. The memory system may include a memory device and a memory controller. The memory device may be configured to be set to a specific power characteristic mode in response to a mode register set command so as to provide a power characteristic information corresponding to the specific power characteristic mode. The memory controller may be configured to provide the mode register set command to the memory device, configured to read the power characteristic information corresponding to the specific power characteristic mode from the memory device, configured to generate a power control information based on the power characteristic information, configured generate a command in response to the power control information, and provide the command to the memory device according to the power control information.

Abstract: A method of manufacturing a non-volatile memory device includes forming a tunnel isolation layer forming a tunnel isolation layer on a substrate, forming a conductive pattern on the tunnel isolation layer, forming a lower silicon oxide layer on the conductive pattern, treating a surface portion of the lower silicon oxide layer with a nitridation treatment to form a first silicon oxynitride layer on the lower silicon oxide layer, forming a metal oxide layer on the first silicon oxynitride layer, forming an upper silicon oxide layer on the metal oxide layer, and forming a conductive layer on the upper silicon oxide layer.

Abstract: A stacked memory includes at least two semiconductor layers each including a memory cell array. A transistor is formed in a peripheral circuit region of an uppermost semiconductor layer of the at least two semiconductor layers. The transistor is used to operate the memory cell array.

Abstract: In a piezoelectric actuator for an ink-jet printhead, and a method of forming the same, formed on a flow path plate having a pressurizing chamber, the piezoelectric actuator for applying a driving force for ink ejection to the pressurizing chamber, the piezoelectric actuator includes a lower electrode formed on the flow path plate, a bonding pad formed on the flow path plate to be insulated from the lower electrode, wherein a driving circuit for voltage application is bonded to an upper surface of the bonding pad, a piezoelectric layer formed on the lower electrode at a position corresponding to the pressurizing chamber, wherein an end of the piezoelectric layer extends onto the bonding pad, and an upper electrode formed on the piezoelectric layer, wherein an end of the upper electrode extends beyond the end of the piezoelectric layer and contacts the upper surface of the bonding pad.