Abstract: A method for using a computer-based imaging system, which may be in motion, to observe a moving object and determine its motion. The imaging system is used to obtain at least two images separated by a known time interval. The apparent motion of the observed object is expressed in terms of its true optical flow parameters with coefficients that represent the camera motion, projection geometry, and time interval. The result is a system of equations that may be solved for the true optical flow parameters.

Abstract: The indicator circuit and method of this invention include an OR circuit having at least two inputs and an output. A signature mode signal input is connected to one input of the OR circuit and a special test mode signal input is connected to a second input of the OR circuit. A logic circuit for providing indicator signals has at least three inputs and at least two outputs. A first input to the logic circuit is connected to the output of the OR circuit. At least one signature address signal is connected to a second input of the logic circuit. The signal indicating the results of the special test mode is connected to a third input of the logic circuit. A first preprogrammed code indicator circuit has an input connected to a first output of the logic circuit and a second preprogrammed code indicator has an input connected to a second output of the logic circuit. The first preprogrammed code indicator may contain, for example, a manufacturer code.

Abstract: In accordance with one embodiment of the invention, an integrated circuit memory capable of receiving address signals has a plurality of array banks. Each array bank has a plurality of memory cells arranged in rows and columns and has a means for addressing the rows and columns of the array banks in response to the address signals. The integrated circuit includes a means for de-coupling power from at least one array bank in response to at least one bit of an address signal.

Abstract: A system for predicting the life of a cutting tool in an automated metal cutting machine, comprises a plurality of sensors for measuring physical data relating to a cutting operation of said machine, and a computer connected to these sensors. The computer comprises a feature extractor for transforming the physical data into feature values, a tool life predictor for arriving at a prediction of the life of the cutting tool.

Abstract: A computer system capable of compiling PROLOG programs appends to the compiled code information necessary to recreate the source which generated the compiled code. This allows program statements which use the original source code to be compiled. Each program statement is compiled into a separate block of code, with all statements in a procedure linked together in lists. Program statements can be compiled as they are created, and statements can be added or deleted by adding or deleting blocks of compiled code from the appropriate lists.

Abstract: A method and system for range detection using a passive infrared sensing device (10) is disclosed. The method includes determining a region (35,38) on a moving object, such as an automobile (13, 36, 37), the region (35, 38) having a size characteristic of the object and emitting energy (14) characteristic of the object. The next step is to characterize the region by a plurality of feature points (31, 32, 33, 34) and sense the energy emitting from the feature points. The next step is to calculate the distance between the sensing device (10) and the moving object as a function of the feature points. The method has application in adaptive cruise control for automobiles (13, 36, 37). The method includes the use of perspective projection formulae to determine the distance between the sensing device (10) and the moving object 13, 36, 37). To smooth measurements to each other, one embodiment of the method includes the use of an Euler predictor to integrate measurements across measurement firmness.

Abstract: The structure and method of this invention provide, for example, electrical isolation between active elements in adjacent rows and/or columns of an integrated circuit by use of a self-aligned field-plate conductor formed over and insulated from the substrate regions that are bounded by the channel regions of field-effect transistors in adjacent rows and that are bounded by the bitlines forming those transistors in a column. The field-plate conductor is formed, for example, in a strip that extends over the isolation areas and thermal insulator regions between row lines of the memory cell array. The field-plate conductor strip is connected to a voltage supply that has a potential with respect to the potential of the semiconductor substrate which causes the isolation areas to be nonconductive. Component density may be increased over that of prior-art structures and methods.

Abstract: A FAMOS memory bit (40) is protected from voltage spike caused by an electrostatic discharge or otherwise by an ESD protection circuit (12). Responsive to a voltage spike on V.sub.pp, the ESD protection circuit (12) couples the drain of the FAMOS memory bit (40) to V.sub.cc or another high capacitance node.

Abstract: A contact-free floating-gate non-volatile memory cell array and process with silicided NSAG bitlines and with source/drain regions buried beneath relatively thick silicon oxide. The bitlines have a relatively small resistance, eliminating the need for parallel metallic conductors with numerous bitline contacts. The array has relatively small bitline capacitance and may be constructed having relatively small dimensions. Bitline isolation is by P/N junction or by oxide-filled trench, permitting relatively small spacing between transistors. Wordlines may be formed from silicided polycrystalline or other material with low resistivity. Coupling of programming and erasing voltages to the floating gate is improved by using an insulator with relatively high dielectric constant between the control gate and the floating gate. The resulting structure is a dense cross-point array of programmable memory cells.

Abstract: A computer system uses microcode subroutines to execute complex macroinstructions. Each macroinstruction is used to index a table. Simple macroinstructions have a single microinstruction counterpart in the table, and such microinstruction is performed directly in order to execute that macroinstruction. The table entry corresponding to more complex macroinstructions is a jump microinstruction, with the target of the microcode jump being an appropriate subroutine in microcode memory.

Abstract: A semiconductor memory architecture, which includes a given number of discrete components, provides a memory module of increased capacity. The memory module includes a plurality of discrete data memory circuits each organized to provide an individual data string having a length that is an integer multiple of four bits. Each memory circuit has a different separate data lead. A row address strobe signal is applied to the memory circuits. A different column address strobe signal is applied to pairs of the memory circuits. Another discrete memory device includes plural dynamic cell arrays, each of the dynamic cell arrays having a terminal for receiving a row address strobe and a different separate data lead. Each of the dynamic cell arrays has a terminal for receiving a different column address strobe signal.

Abstract: A speech system recognizes words from a spoken phrase that conform to checksum constraints. Grammar rules are applied to hypothesize words according to the checksum constraints. The checksum associated with the phrase is thus inherent in the grammar. Sentences which do not meet a predetermined checksum constraint are not valid under the grammar rules and are therefore inherently rejected. The checksum constraints result in increased recognition accuracy.

Abstract: A method and apparatus are provided for identifying one or more boundaries of a speech pattern within an input utterance. One or more anchor patterns are defined, and an input utterance is received. An anchor section of the input utterance is identified as corresponding to at least one of the anchor patterns. A boundary of the speech pattern is defined based upon the anchor section. Also provided are a method and apparatus for identifying a speech pattern within an input utterance. One or more segment patterns are defined, and an input utterance is received. Portions of the input utterance which correspond to the segment patterns are identified. One or more of the segments of the input utterance are defined responsive to the identified portions.

Abstract: An electrically-erasable, electrically-programmable read-only memory cell 10 is formed at a face of a layer of semiconductor 30 of a first conductivity type. A first source/drain region 16 and a second source/drain region 20 are formed in the face of layer of semiconductor 30 of a second conductivity type opposite the first conductivity type and spaced by a first channel area 50. A third source/drain region 18 is formed in the face of semiconductor layer 30 of the second conductivity type spaced from second source/drain region 20 by a second channel area 52. A thick insulator region 44 is formed adjacent at least a portion of second source/drain region 20 and includes a lateral margin of sloped thickness overlying a corresponding lateral margin of second source/drain region 20. The corresponding lateral margin of second source/drain region 20 has a graded dopant concentration directly proportionate with the sloped thickness of the overlying lateral margin of thick insulator region 44.

Abstract: A grammar learning aid is implemented with a processor and read only memory programmed in a manner that minimizes memory space and maximizes effective teaching. The programming is based on a unification grammar, in which sentences are determined by their features. The programming is implemented with logic programming in which predicates represent data, and in which logic variables permit features to be unified. This feature-based grammar approach permits an erroneous answer to be associated with a feature and that feature used to generate a similar device.

Abstract: An apparatus and method for verifying the identity of an unknown user of a telephone calling card service is disclosed which receives identification information corresponding to a valid user of the service, requests the unknown user to speak an authorization phrase without disclosing the authorization phrase to the unknown user, receives the unknown user's speech signal in response to the request, and verifies the identity of the unknown user based on the received speech signal. Other apparatus, systems, and methods are also disclosed.

Abstract: In a video computer system having a dual-port bit-mapped RAM unit incorporating a shift register, provision is made for coupling data between column lines and the shift register, and for simultaneously preventing any column line from being coupled with the random data output terminal of the RAM unit. Accordingly, this prevents two or more different data bits from appearing simultaneously from the RAM unit and causing confusion as to which is the valid signal and which is a spurious signal.

Abstract: A task scheduling method for a real time computer system having automatic memory management or some other resource that is consumed in terms of a bit rate. The method ensures that non critical tasks do not prevent the timely execution of critical tasks. Each task is evaluated in terms of its rate of consumption of the resource. This rate is controlled by assigning each task a consumption quota and keeping track of the consumption of each task as it executes. The task is required to relinquish its processor time if it attempts to consume more than its quota.

Abstract: A comb insert for semiconductor packaged devices is disclosed. The comb is conductive and thus useful to function as a power supply bus in transferring power to the semiconductor die. A base, formed out of a conductive material, resides underneath the lead fingers of the semiconductor packaged device, electrically isolated from the lead fingers. The base has teeth extending from it, also formed out of the conductive material, that reside between the lead fingers of the semiconductor packaged device. Some of the teeth are electrically connected to the lead fingers for receiving external power. Some of the teeth are electrically connected to the bonding pads of the semiconductor die. Power is transferred from the lead fingers for receiving it, through the teeth electrically connected to these lead fingers, through the base, through the teeth electrically connected to the bonding pads, and to the semiconductor die.

Abstract: An amplifier is arranged with an actively clamped load. In a differential amplifier, a pair of emitter-coupled transistors has loads connected between the collectors and a voltage supply. Separate clamping transistors have their collector-emitter paths connected across respective ones of the loads. A clamping control circuit, responsive to an input signal, produces a variable control signal to clamp output signal swings across the loads. A similar clamping control circuit can be used with a single-ended amplifier. Such an amplifier having an actively clamped load is useful in sense amplifier circuit arrangements in semiconductor memory arrangements used in data processing systems.