Patents Represented by Attorney, Agent or Law Firm Loeb & Loeb LLP
  • Patent number: 6093461
    Abstract: The present invention relates to a protection tube for protecting heaters and sensors used in melting furnace for reprocessing of incinerator ash, other melting furnace, and various other furnaces, the protection tube being excellent in resistance to heat and resistance to corrosion so as to be usable favorably for a long period. The heat- and corrosion-resisting protection tube is formed in a tubular body closed at an end, being composed of ceramics, and the ceramics have a softening point over 1700.degree. C. in the air atmosphere, a three-point bending strength of 150 MPa or more at 1450.degree. C., a resistance to heat shock of .DELTA.T of 150.degree. C. or more by water quenching method, and a mean grain size of 2 .mu.m or more, having a composition of 50 mol % or more of Al.sub.2 O.sub.3 and 50 mol % or less of MgO.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: July 25, 2000
    Assignee: Kyocera Corporation
    Inventors: Shinichi Yamaguchi, Yasuhiro Tanaka
  • Patent number: 6091639
    Abstract: In a non-volatile semiconductor memory, a large current can be flowed through the memory cell during reading. The number of the column lines can be reduced. The electron injection to the floating gates of the respective memory cells is averaged to reduce the dispersion of the threshold voltages thereof. The electron emission from the floating gates of the respective memory cells is also averaged to reduce the dispersion of the threshold voltages thereof. An increase in chip size due to latch circuits can be prevented. By noting that either of a plurality of "0" or "1" of the binary data are stored much in the memory cells of the memory cell bundle or block, a negative threshold voltage is allocated to the memory cells for storing the more bit side data of the binary data. A single column line is used in common for the two adjacent memory blocks.
    Type: Grant
    Filed: September 23, 1999
    Date of Patent: July 18, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Hiroshi Iwahashi
  • Patent number: 6089770
    Abstract: A peeling device according to one aspect of the invention peels off part of a peel-off paper from a peel-off paper-backed adhesive tape which is a laminate of a substrate tape having a surface coated with an adhesive and a peel-off paper affixed to the substrate tape via the adhesive. A rotational member is rotated by a driving force transmitted from a drive source. On an end face of the rotational member there are arranged a peeling projection rotated to be brought into contact with a substrate tape-side surface of an end of the peel-off paper-backed adhesive tape to carry out a bending releasing action on said end portion of the adhesive tape. The adhesive tape is guided toward the peeling projection when it is inserted and part of the end portion other than a free end brought to the peeling projection is held.
    Type: Grant
    Filed: November 6, 1997
    Date of Patent: July 18, 2000
    Assignee: Seiko Epson Corporation
    Inventors: Noriyuki Kamijo, Kenji Watanabe, Takanobu Kameda, Tomoyuki Shimmura, Tomohiro Moriya
  • Patent number: 6088290
    Abstract: When a clock enable signal asynchronous with a clock signal is set at a high level, a power-down control circuit sets a power-down signal at a high level to release a power-down mode. When the power-down mode is released, a clock control circuit outputs an internal clock signal such that an output signal of a command decoder can be latched. According to such a constitution, a period of time from the latching of the command after releasing the power-down mode to the time when the command can be transferred will be reduced, and a high-speed operation can be attained.
    Type: Grant
    Filed: August 11, 1998
    Date of Patent: July 11, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroyuki Ohtake, Shigeo Ohshima, Takehiro Hasegawa
  • Patent number: 6084974
    Abstract: A digital signal processing device includes a rectifier circuit, logarithm conversion circuit, peak-hold/timewise attenuation circuit, gain table, multiplier and timing generation circuit. The rectifier circuit obtains the absolute value of input data. The logarithm conversion circuit converts the linear input data into logarithmic data. The peak-hold/timewise attenuation circuit performs peak-hold and timewise attenuation processes on the instantaneous logarithmic data, to obtain an approximate logarithmic envelope. The gain table which has nonlinear gain characteristic receives the logarithmic data as a readout address, to thereby output a gain value corresponding to the input level. The multiplier multiplies the input data by the gain value so as to provide output data that have been processed in accordance with the nonlinear characteristic.
    Type: Grant
    Filed: May 17, 1994
    Date of Patent: July 4, 2000
    Assignee: Yamaha Corporation
    Inventor: Koji Niimi
  • Patent number: 6083539
    Abstract: The present invention relates to a buckwheat starch syrup prepared by liquefying, saccharisfying, and proteolyzing starch from buckwheat flour, a method for preparing the buckwheat starch syrup, and various foods containing the same. The buckwheat starch syrup of the present invention contains various amino acids and minerals, as well as rutin which is effective in preventing arteriosclerosis, and hence it is healthy and excellent in nutritive balance. Thus, the buckwheat starch syrup of the present invention can be suitably used in various foods.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: July 4, 2000
    Assignee: Sakuma Ebisu Kabushiki Kaisha
    Inventors: Takao Yamada, Yoshio Iljima
  • Patent number: 6084817
    Abstract: A plurality of sense amplifiers are provided between a plurality of memory cell arrays having a plurality of memory cells. These sense amplifiers are connected to bit lines of the respective memory cell arrays by array selection switches. Each of the sense amplifiers is connected to data lines by column switches. An array control portion is provided at each of the memory cell arrays. This array control portion selectively controls the array selection switches and column switches to transmit the data in an arbitrary memory cell in a memory cell array to the data lines through the sense amplifier.
    Type: Grant
    Filed: March 9, 1999
    Date of Patent: July 4, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruki Toda
  • Patent number: 6080155
    Abstract: Apparatus and a method of inserting spinal implants is disclosed in which an intervertebral space is first distracted, a hollow sleeve having teeth at one end is then driven into the vertebrae adjacent that disc space. A drill is then passed through the hollow sleeve removing disc and bone in preparation for receiving the spinal implant which is then inserted through the sleeve. Apparatus and a method of inserting spinal implants is disclosed in which an intervertebral space is first distracted to restore the normal angular relationship of the vertebrae adjacent to that disc space. An extended outer sleeve having extended portions capable of maintaining the vertebrae distracted in their normal angular relationship is then driven into the vertebrae adjacent that disc space. A drill is then passed through the hollow sleeve removing disc and bone in preparation for receiving the spinal implant which is then inserted through the sleeve.
    Type: Grant
    Filed: February 27, 1995
    Date of Patent: June 27, 2000
    Inventor: Gary Karlin Michelson
  • Patent number: 6081636
    Abstract: A transmitter and a receiver for wavelength division multiplexing optical transmission need no multiplexer and can be made compact and manufactured easily while promising a high reliability of a system using them. By using second-order Bragg diffraction gratings to form the output mechanism, a plurality of DFB laser-type elements can be integrated so that their optical outputs adversely affect each other. Therefore, a plurality of lasers can be arranged coaxially to form a light source for wavelength division multiplexing optical transmission without using a multiplexer. By using the same mechanism on the part of a receiver, a demultiplexer can be omitted.
    Type: Grant
    Filed: June 19, 1998
    Date of Patent: June 27, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Junichi Kinoshita
  • Patent number: 6077637
    Abstract: A magnetic carrier for use in a developer for developing latent electrostatic images is composed of magnetic carrier particles with a particle size of 35 .mu.m or less in an amount of 15 wt. % or more, and a developer is composed of the above carrier and a toner. An image formation method is composed of the steps of (a) uniformly charging the surface of a photoconductor to a predetermined polarity, (b) forming latent electrostatic images including low potential portions and high potential portions on the photoconductor by subjecting the charged surface of the photoconductor to selective light radiation corresponding to light images, thereby selectively reducing the potential of the surface of the photoconductor, and (c) developing the thus formed latent electrostatic images to visible toner images by bringing the developer into contact with the latent-electrostatic-images-bearing photoconductor.
    Type: Grant
    Filed: May 11, 1999
    Date of Patent: June 20, 2000
    Assignee: Kyocera Corporation
    Inventors: Yasuo Nishiguchi, Susumu Kikuchi, Yoshio Ozawa, Hisashi Mukataka
  • Patent number: 6076859
    Abstract: A method especially useful for marking property having a multitude of individually-valuable metal components involves adhering at least one specially-constructed label to at least one painted metal surface of the property to be marked. Each label includes a thermal label stock layer having information relating to the marked property imprinted on one side and a non-release thermal adhesive layer coated on another side. The label is impregnated with a chemical which is visible only when exposed to ultraviolet light and has apertures therethrough forming identifying indicia at a predetermined location, such as a personal identification number unique to the property owner, and/or a bar code imprinted thereon containing the identifying indicia. A durable topcoat on the label provides a protective seal. After the label is adhered to the metal surface, the ultraviolet-visible chemical migrates to substrata thereof.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: June 20, 2000
    Assignee: Express Systems Incorporated
    Inventors: Dee Anne Hall, Gilbert W. McGuff
  • Patent number: 6078525
    Abstract: In a non-volatile semiconductor memory device, a binary counter is connected to a most significant bit portion of an address counter for successively generating addresses of rows of a memory cell array. The binary counter forcibly selects one of spare row lines, and permits a pre-program operation (program operation prior to data erasure) to be performed on memory cells connected to the selected one of spare row lines, when the pre-program operation has completely been performed on the memory cells of the rows of the memory cell array. In the pre-program operation, whether or not to verify data is determined on the basis of a coincidence signal outputted from a defective row address storing section.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: June 20, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masao Kuriyama, Hidetoshi Saito, Tadayuki Taura
  • Patent number: 6075279
    Abstract: In a semiconductor device of the present invention, since a second semiconductor substrate is provided wherein a part of a semiconductor device in which an active device is formed is utilized as electrodes and third electrodes are formed on a surface of the second semiconductor substrate and fourth electrodes are formed on a back surface of the second semiconductor substrate to be connected to external devices, the semiconductor device can be provided wherein metal lead terminals connected to external electrodes and protection sealing mold can be omitted by employing the second semiconductor substrate as external connecting electrodes, unlike the semiconductor device in the prior art.Accordingly, outer sizes of the semiconductor device can be remarkably miniaturized, and unnecessary dead space can be eliminated when the device is packaged on a packaging substrate, whereby contributing significantly to miniaturization of the packaging substrate.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: June 13, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Mamoru Andoh
  • Patent number: 6074768
    Abstract: A process for forming a laminate of 123-type copper oxide superconductor thin films having dissimilar crystal axis orientations, a laminate of 123-type thin copper oxide superconductor layers exhibiting excellent superconducting property, and wiring for Josephson junction. A c-axis oriented single crystalline thin film of an oxide superconductor having a Y:Ba:Cu atomic ratio of substantially 1:2:3 and a lattice constant of 11.60 angstroms.ltoreq.c.ltoreq.11.70 angstroms at a temperature of 20.degree. C. under an oxygen partial pressure of 160 Torr is formed on a single crystalline substrate, and an a-axis oriented single crystalline thin film of said oxide superconductor is formed on the above laminated film relying upon a sputter deposition method.
    Type: Grant
    Filed: December 16, 1998
    Date of Patent: June 13, 2000
    Assignee: Kyocera Corporation
    Inventors: Yoshinori Matsunaga, Shuichi Fujino, Akihiro Odagawa, Youichi Enomoto
  • Patent number: 6072164
    Abstract: There is provided a heat-treating method and a radiant heating device by which an object to be heat-treated can be heat-treated at an actually desired temperature regardless of the dopant concentration or resistivity of the object at the time of heat-treating the object with a radiant heating device using a radiation thermometer as a temperature detector. In the method, the object is heat-treated at an actually desired temperature by correcting the temperature of the object in accordance with the dopant concentration or resistivity of the object. In the apparatus, the dopant concentration or resistivity of the object is inputted in advance to a temperature controller and the controller calculates an actual temperature of the object by correcting and computing the temperature of the object detected with the radiation thermometer in accordance with the dopant concentration or resistivity of the object and controls the temperature of the object based on the calculated temperature value.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: June 6, 2000
    Assignee: Shin-Estu Handotai Co., Ltd.
    Inventors: Naoto Tate, Tomoyuki Sakai, Naohisa Toda, Hitoshi Habuka
  • Patent number: 6071337
    Abstract: A method and apparatus for producing crystals by the Czochralski method whereby the thermal history during crystal growth according to the CZ method can be controlled with ease and accuracy. The apparatus comprises a crucible for receiving a raw material, a heater for heating and melting the raw material, and a heat insulating cylinder disposed so as to surround the crucible and the heater, wherein a portion of the heat insulating cylinder that is located above an upper end of the heater is so configured that its inner diameter is larger than the outer diameter of the heater at its lower end, and that its inner diameter at its upper end is equal to or less than the inner diameter of the heater while its outer diameter is equal to or greater than the outer diameter of the heater. This apparatus is used to produce crystals and to control the temperature distribution inside the crystal producing apparatus or the thermal history of crystals.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: June 6, 2000
    Assignee: Shin-Etsu Handotai Co., Ltd
    Inventors: Masahiro Sakurada, Yuichi Miyahara, Tomohiko Ohta
  • Patent number: 6072194
    Abstract: Laser anneal processing of a semiconductor layer is repeated in a number of steps. Grain size is increased using high energy ELA for a first step, and grain sizes are uniformed using ELA with low energy for a later step. As a defective crystallization region occurs in an excessive energy region during the ELA for the first step, in the ELA for the second time, excessive energy is removed and the defective crystallization region is eliminated by reducing the energy to an optimal value, thereby improving the crystallinity of a p-Si layer.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: June 6, 2000
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Ken Wakita, Hidenori Ogata
  • Patent number: 6066306
    Abstract: In a method for producing a silicon single crystal wafer, a silicon single crystal is grown in accordance with the Czochralski method such that the F/G value becomes 0.112-0.142 mm.sup.2 /.degree.C.multidot.min at the center of the crystal, where F is a pulling rate (mm/min) of the single crystal, and G is an average intra-crystal temperature gradient (.degree.C/mm) along the pulling direction within a temperature range of the melting point of silicon to 1400.degree. C. Additionally, the single crystal is pulled such that the interstitial oxygen concentration becomes less than 24 ppma , or the time required to pass through a temperature zone of 1050-850.degree. C. within the crystal is controlled to become 140 minutes or less. The method allows production of silicon single crystal wafers in which neither FPDs nor L/D defects exist on the wafer surface, which therefore has an extremely low defect density, and whose entire surface is usable.
    Type: Grant
    Filed: November 9, 1998
    Date of Patent: May 23, 2000
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Makoto Iida, Eiichi Iino, Masanori Kimura, Shozo Muraoka
  • Patent number: D425325
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: May 23, 2000
    Inventor: Jean Kasem
  • Patent number: D425800
    Type: Grant
    Filed: August 12, 1999
    Date of Patent: May 30, 2000
    Assignee: Cardcom, Inc.
    Inventor: Min Chul Shin