Patents Represented by Attorney, Agent or Law Firm Loeb & Loeb LLP
  • Patent number: 6041220
    Abstract: An antenna device having a surface on which radiation of an output of the antenna device is suppressed in at least one direction is attached to a case so that the radiation-output-suppressed surface of the antenna device is arranged to face an user side at the time of talking.
    Type: Grant
    Filed: July 24, 1997
    Date of Patent: March 21, 2000
    Assignee: Kyocera Corporation
    Inventor: Akihiro Suguro
  • Patent number: 6040918
    Abstract: A copying machine of the present invention has a scanner unit (2) for reading an original, a line type thermal head (14) for printing read image data on tape (16) to be used as a recording medium, a tape cartridge (51) for supplying the tape and a tape conveying mechanism. The tape (16) has an image carrying sheet (161), the front surface of which is a printing face to be printed with an image, an adhesive layer (162) formed by applying an adhesive to the back surface of this image carrying sheet and a release sheet (163) releasably stuck to the surface of the adhesive layer. The tape is taken up like a roll and is detachably fitted into the body of the copying machine in the form of the tape cartridge (51). At both ends of the tape, conveyance border portions of a uniform width are formed. In the border portions, engaging holes ( ) are formed at regular intervals in the direction of the length of the tape.
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: March 21, 2000
    Assignee: Sieko Epson Corporation
    Inventors: Isao Edatsune, Hiroshi Kuriyama, Osamu Urano
  • Patent number: 6036375
    Abstract: The invention relates to an optical semiconductor device housing package comprising a base having a mounting portion on an upper surface of which an optical semiconductor device is mounted; a frame attached to the base so as to encircle the mounting portion, the frame having a through-hole in one side thereof; a cylindrically shaped fixing member into which an optical fiber is inserted, the cylindrically shaped fixing member being fixed to the through-hole of the frame; a light-transmitting member attached to one end portion of the fixing member; and a lid member mounted on an upper face of the frame, for hermetically sealing the optical semiconductor device, wherein the light-transmitting member is formed of amorphous glass.
    Type: Grant
    Filed: July 24, 1997
    Date of Patent: March 14, 2000
    Assignee: Kyocera Corporation
    Inventors: Mitsuo Yanagisawa, Kenichi Ura, Satoru Tomie
  • Patent number: 6037805
    Abstract: To minimize the power consumption, the disclosed semiconductor integrated circuit device, comprises; a bias circuit for generating a predetermined voltage fixed between a first supply voltage and a second supply voltage; a driver circuit for receiving an inversion input signal and a non-inversion input signal each vibrating between the first and second supply voltages, for converting the received input signals into a signal vibrating between an output voltage of the bias circuit and the first supply voltage, and for driving a transfer path by the converted signal; a voltage divider circuit for dividing an output voltage of the bias circuit; and a receiver circuit for detecting the signal for driving the transfer path by use of an output of the voltage divider circuit as a reference voltage, and for converting the detected signal into a signal vibrating between the first supply voltage and the second supply voltage.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: March 14, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tadahiro Kuroda, Takayasu Sakurai
  • Patent number: 6037654
    Abstract: Electrodes for electrically connecting to the outside are formed along one long side of a rectangular semiconductor chip 20. The electrodes are arranged in two rows, one of output terminals 21 and the other of input terminals 22 and power supply terminals 23, or are arranged in one row of the output terminals, input terminals and power supply terminals. Input protective resistors and static electricity protective diodes 28 for the input terminals are located outside the output terminals to be separated from the output system by at least the size of the output terminals. The external circuit connected to the output terminals 21 of the semiconductor device, for example the wiring 35 extending from the inner leads 33 of a tape carrier 29 are routed inside the electrodes toward the opposite long side of the semiconductor device, so that the wiring area overlaps the top of the semiconductor device in a plan view.
    Type: Grant
    Filed: November 27, 1996
    Date of Patent: March 14, 2000
    Assignee: Seiko Epson Corporation
    Inventor: Tsuyoshi Tamura
  • Patent number: 6034901
    Abstract: An external clock signal CK is input to a buffer, which generates an internal clock signal CLK having a skew of D1 with respect to the external clock signal CK. The internal clock signal is input first to a delay circuit which has a delay time A, then to a delay array which provides a delay time D2, and finally to a delay circuit which has a delay time of D2. The delay circuit generates a corrected internal clock signal CK' which is synchronous with the external clock signal CK. The delay array is composed of delay units, each having a state-holding section. The state-holding section of any delay unit that has passed a forward pulse is set in a predetermined state. Once its state-holding section is set in the predetermined state, the delay unit provides a correct delay time of 2.times..DELTA..
    Type: Grant
    Filed: June 8, 1999
    Date of Patent: March 7, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruki Toda
  • Patent number: 6034910
    Abstract: A memory cell array is divided into a plurality of blocks and sense amplifiers and shift registers are provided for the respective blocks. After a plurality of data sets are read out in the first random access cycle and transferred to each of the shift registers, column switching is made and a plurality of next data sets are read out. Then, the pipeline processing for the data items is effected to serially read out data in the serial access cycle.
    Type: Grant
    Filed: December 3, 1998
    Date of Patent: March 7, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Taira Iwase
  • Patent number: 6033023
    Abstract: A portable, compact, flexible and inflatable headrest for securing to one or two vehicle seats having a separately inflatable headrest section contoured for optimal head support and a separately inflatable base for inserting in the space between adjoining seats of a passenger vehicle or in the space between the top of a vehicle seat provided with an extendible seat head rest and the bottom of the extended seat head rest to optimize rest comfort for a passenger using the headrest.
    Type: Grant
    Filed: June 1, 1998
    Date of Patent: March 7, 2000
    Inventors: Martin F. Strassner, Mark S. Bochman
  • Patent number: 6034330
    Abstract: A load insulator having an elongated, load bearing, electrically insulating body extending between and coupled to opposite metal lugs, for coupling the load insulator in a loaded line, has an electrically insulating cover formed on the outside of the body and extending over and completely covering each of the pair of metal lugs at the opposite ends of the body. The insulating cover, which is of integral, one-piece construction, and may be made of polyurethane, is formed within a mold during construction of the load insulator by leaving a void within the mold around the opposite metal lugs and the body before introducing plastic into the mold, to form the insulating cover. Covering each of the opposite metal lugs as well as the body with the insulating cover forces high voltage-produced currents through the inside of the load insulator by preventing current creep around and flashing over the outside of the insulator body.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: March 7, 2000
    Inventor: Hugh Michael Pratt
  • Patent number: 6031253
    Abstract: A package for housing a photosemiconductor device includes: a substrate having a mounting portion for mounting a photosemiconductor device thereon; a frame attached onto the substrate so as to surround the mounting portion and having a through hole in a side portion thereof; a metallic fixing member fixed in the through hole and in which an optical fiber is to be fixed at the outer end and a cylindrical lens is fixed at the inner end; and a lid to be attached to the top surface of the frame and hermetically sealing the photosemiconductor device. Only the central region of the circumferential surface of the cylindrical lens is brazed to the inner surface of the metallic fixing member with a brazing filler metal. Consequently, outer region of the circumferential surface of the cylindrical lens near the ends thereof is not brazed, so that no stress concentrates on the cylindrical lens. As a result, the cylindrical lens is resistant to cracking.
    Type: Grant
    Filed: September 29, 1998
    Date of Patent: February 29, 2000
    Assignee: Kyocera Corporation
    Inventor: Minoru Kobayashi
  • Patent number: 6031379
    Abstract: A mechanism is provided for reducing contamination of the interior of an apparatus by a sample and for performing a stable measurement. An ion lens has an Einzel lens for converging an ion beam, a deflector for deflecting the ion beam and a pair of compensation electrodes each composed of one or more elements. A mechanism is provided for controlling a voltage to be applied to each of the electrodes as desired. Also, alternatively, a shield plate is provided in a flow path of the ion beam. A drive mechanism is provided for projecting and retracting the shield plate. With such an arrangement, it is possible not only to effectively detect a small amount of impurities contained in a sample but also to stably measure the concentration thereof.
    Type: Grant
    Filed: October 3, 1996
    Date of Patent: February 29, 2000
    Assignee: Seiko Instruments, Inc.
    Inventors: Shinichi Takada, Yoshitomo Nakagawa
  • Patent number: 6031582
    Abstract: A motion vector estimating system prepares a predetermined range of a frame/field of image data as a macro block, selects a plurality of proposed motion vectors in the reference region, calculates a signal-strength difference between pixels corresponding to each of the proposed motion vectors of current and reference images.
    Type: Grant
    Filed: December 19, 1997
    Date of Patent: February 29, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuyoshi Nishikawa, Yoshiro Tsuboi, Masafumi Takahashi
  • Patent number: 6027562
    Abstract: A single crystal is grown in accordance with a Czochralski method such that the time for passing through a temperature zone of 1150-1080.degree. C. is 20 minutes or less, or such that the length of a portion of the single crystal corresponding to the temperature zone of 1150-1080.degree. C. in the temperature distribution is 2.0 cm or less. Alternatively, the single crystal is grown such that the time for passing through a temperature zone of 1250-1200.degree. C. is 20 minutes or less, or such that the length of a portion of the single crystal corresponding to the temperature zone of 1250-1200.degree. C. in the temperature distribution is 2.0 cm or less. This method decreases both the density and size of so-called grown-in defects such as FPD (100 defects/cm.sup.2 or less), LSTD, and COP (10 defects/cm.sup.2 or less) to thereby enable efficient production of a single crystal having an excellent good chip yield (80% or greater) in terms of oxide dielectric breakdown voltage characteristics.
    Type: Grant
    Filed: October 16, 1998
    Date of Patent: February 22, 2000
    Assignee: Shin-Etsu Handotai Co., Ltd
    Inventors: Makoto Iida, Eiichi Iino, Masanori Kimura, Shozo Muraoka
  • Patent number: 6028750
    Abstract: There is obtained a substrate for thin film magnetic head having extremely excellent heat radiation and insulation properties and extremely flat surface. On a substrate comprising ceramics or single crystal member, a substrate for thin film magnetic head is constituted with a high thermal conductive insulating film having a thickness in the range of 10-1500 .ANG., thermal conductivity at room temperature higher than 45 W/m.multidot.K, and volume inherent resistance higher than 10.sup.8 .OMEGA..multidot.cm.
    Type: Grant
    Filed: April 22, 1998
    Date of Patent: February 22, 2000
    Assignee: Kyocera Corporation
    Inventor: Takaki Ohtsubo
  • Patent number: 6028794
    Abstract: A nonvolatile semiconductor memory device comprises a plurality of nonvolatile memory cells, which can be electrically programmed and erased, the plurality of nonvolatile memory cells divided into a plurality of blocks, a block erase circuit for erasing the plurality of nonvolatile memory cells contained in the plurality of blocks at the same time per block, erase operation times storage section for storing the number of erase operations of the nonvolatile memory cells to be erased at the same time by the block erase circuit per block in a number of erase operation storage region, and read time setting section for setting the read time based on the number of the erase operations stored in the number of erase operation storage region at the time of reading the storage data in the nonvolatile memory cells.
    Type: Grant
    Filed: January 15, 1998
    Date of Patent: February 22, 2000
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hiroto Nakai, Kaoru Tokushige
  • Patent number: 6027791
    Abstract: A structure for mounting a wiring board in which the wiring board including a ceramics insulating board, metallized wiring layers arranged on said insulating board, and a plurality of connection terminals mounted on said insulating board and electrically connected to said metallized wiring layer, is placed on a mother board having wiring conductors formed on the surface of an insulator which contains an organic resin, and the connection terminals of said wiring board are connected by brazing to the wiring conductors of said mother board, wherein a value F1 defined by the following formula (1):F1=L.times..DELTA..alpha./H.sup.2 (1)wherein L is a distance (mm) between the two connection terminals which are most separated away from each other among a plurality of connection terminals mounted on said insulating board, .DELTA..alpha. is a difference in the coefficient of thermal expansion (ppm/.degree. C.) between the insulating board of said wiring board and said mother board at 40 to 400.degree. C.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: February 22, 2000
    Assignee: Kyocera Corporation
    Inventors: Masahiko Higashi, Kouichi Yamaguchi, Masanari Kokubu, Hitoshi Kumatabara, Noriaki Hamada, Kenichi Nagae, Michio Shinozaki, Yasuhide Tami
  • Patent number: 6029034
    Abstract: The invention seeks to provide an electrophotographic apparatus, which can have a simplified and safe construction in an image forming apparatus using an a-Si photo-sensitive drum and form clear images free from the flow of image or "fog". The image forming apparatus that is sought uses image development a non-magnetic uni-component toner prepared by a polymerization process as a preamble, and is characterized in that a developing roller is rotated in contact with an a-Si photo-sensitive drum via a layer of non-magnetic uni-component toner. The volume resistivity of the developing roller is set to 3.times.10.sup.7..OMEGA. cm or below. The photo-sensitive drum has a surface layer with an element ratio composition represented as (a-Si.sub.1-x C.sub.x :H), x being 0.95.ltoreq.x<1, the dynamic push hardness of the outer surface of the surface layer being 300 kgf/mm.sup.
    Type: Grant
    Filed: June 26, 1997
    Date of Patent: February 22, 2000
    Assignee: Kyocera Corporation
    Inventors: Keiji Itsukushima, Yoshio Ozawa, Yojiro Sato, Hisashi Mukataka
  • Patent number: 6028762
    Abstract: In an electrostatic chunck with grooves formed on the dielectric layer surface, the rate of foreign matter adhering to the semiconductor wafer is reduced and at the same time the semiconduticor wafer can be uniformly heated without causing leakage of lie or other gases supplied to the grooves of the said holding surface into the chamer. The electrostatic chuck is composed of a dielectric layer made from ceramics or sapphire which has electrostatic electrodes, holding surface positioned on a same plane and concave spaces positioned next to the holding surface, at least one of the said holding surface being circumference, and the outermost such holding surface having a width of 1-20 .mu.m and being a smooth surface having a center line average roughness (Ra) of 0.3 .mu.m or less.
    Type: Grant
    Filed: January 28, 1997
    Date of Patent: February 22, 2000
    Assignee: Kyocera Corporation
    Inventor: Satoru Kamitani
  • Patent number: D420933
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: February 22, 2000
    Inventor: Joseph Kharloubian
  • Patent number: D421194
    Type: Grant
    Filed: December 4, 1996
    Date of Patent: February 29, 2000
    Inventor: Jean Kasem