Patents Represented by Attorney Lowe Hauptman & Berner, LLP
  • Patent number: 7258476
    Abstract: A shaped optical fiber light and the manufacturing method thereof are described. The shaped optical fiber light has a shaped protection tube, at least one optical fiber, and a light source. The shaped protection tube is shaped into a predetermined shape and the optical fibers are configured therein. The light source couples to one end or two ends of the optical fibers to form a shaped light tube. The light source is preferably a light source composed of at least one light emitting diode. The optical fiber is preferably an optical fiber with lateral light leakage so as to form a linear lighting pattern with the optical fiber and the shaped protection tube. In addition, the manufacturing method of the shaped optical fiber light is also disclosed.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: August 21, 2007
    Assignee: Baycom Opto-Electronics Technology, Co. Ltd.
    Inventors: Chi-Tsung Peng, Chiu-Hsiung Lee
  • Patent number: 7259685
    Abstract: A helicopter of the type having an electrical system, a landing light, a master switch and a power supply of between about 18-32 V for operating the electrical system when the master switch is in an on position also includes a landing light fault detector. The landing light fault detector includes a light switch for turning the landing lights on and off and circuit means for detecting a fault in the landing light and for providing a signal indicative of a fault whether or not the light switch is in an on or off position.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: August 21, 2007
    Assignee: Safe Flight Corporation
    Inventors: Randall A. Greene, Paul Levine
  • Patent number: 7256096
    Abstract: A method of manufacturing a semiconductor device having a dual-damascene gate including forming LDD regions by forming a gate oxide film on a semiconductor substrate, and by implanting lowly-concentrated impurities in the semiconductor substrate in accordance with a predetermined LDD pattern, and forming a nitride film on the gate oxide film, and forming a wide nitride film in accordance with the wide nitride pattern. The method also includes forming a narrow nitride film by a narrow etching process on the wide nitride film in accordance with a predetermined narrow nitride film pattern, forming a dual-damascene gate by depositing a polysilicon layer on an exposed entire surface and smoothing the deposited polysilicon layer to a top surface of the nitride film, and forming a gate electrode by removing a predetermined region of the polysilicon layer.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: August 14, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Jung Gyu Kim
  • Patent number: 7257636
    Abstract: In the inter-working method of wireless Internet (gateways) according to the present invention described above, DIAMETER which is the first version of the IETF-RFC standard of mobile IP application is applied to the application scenario based on wireless Internet gateway of a home network, not on FA or HA of Mobile IP. After all mobile communication providers connect to wireless Internet, subscribers are not bounded to the network of their mobile communication provider and have the freedom to select any external wireless Internet portal site and use the service of it. Such a wireless Internet connection method will make wireless Internet contents popular in the open wireless network epoch and provide wireless Internet contents providers with an excellent chance.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: August 14, 2007
    Assignee: Electronics and Telecommunication Research Institute
    Inventors: Byung Gil Lee, Hyun Gon Kim, Chee Hang Park
  • Patent number: 7255688
    Abstract: A pull-on disposable wearing article has a first waist region and a second waist region. The first waist region is elastically stretch- and contractible in the transverse direction. The second waist region is formed with a pair of finger-grip zones which are non-stretchable in the transverse direction and an elastically stretch- and contractible middle zone. The finger-grip zones respectively have a dimension in a range of 10 to 100 mm as measured in the transverse direction and extend from a peripheral edge of the waist-hole to peripheral edges of the respective leg-holes, along a pair of bonded zones where transversely opposite side edges of the waist regions are bonded together. The middle zone extends between the finger-grip zones is elastically stretch- and contractible in the transverse direction.
    Type: Grant
    Filed: May 24, 2005
    Date of Patent: August 14, 2007
    Assignee: Uni-Charm Corporation
    Inventors: Toru Sasaki, Yoshio Ono, Satoru Sakaguchi, Tomoko Sugito
  • Patent number: 7252657
    Abstract: In a disposable wearing article, and area of a rear waist region in which a core is present is divided into a first area and a second area. The second area is formed in its transversely middle zone with a through-hole extending through the core. A transverse fiexural stiffness of the core lying in the second area is lower than a transverse flexural stiffness of the core lying in the crotch region and the first area. Proximal portions of leak-barrier sheets and longitudinal ends of elastic members are in the first area. The first area lies above the crotch region in a thickness direction of the article and the second area forms a barrier and a pocket.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: August 7, 2007
    Assignee: Uni-Charm Corporation
    Inventors: Yoshitaka Mishima, Kaiyo Nakajima, Kyo Kikuchi
  • Patent number: 7252565
    Abstract: The present invention may provide a two-part electrical connector having a first part being a tongue portion having a base and a tongue extending longitudinally therefrom; a second part being a socket portion having a base and walls extending therefrom defining a socket for slidably receiving the tongue, the tongue portion and socket portion having locking means to permit releasable mutual engagement, said locking means including a locking member moveable between a first position in which the tongue is held in the socket and a second position in which the tongue is removable from the socket; a primary coupling element located in the tongue; and a secondary coupling element located in at least one of the socket walls, which elements provide a contact-less electromagnetic coupling when the tongue is engaged in the socket.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: August 7, 2007
    Assignee: Thales Holdings UK PLC
    Inventor: Andrew Hunter
  • Patent number: 7252962
    Abstract: A method for checking for sensitivity of acetylcholine esterase in insects using a single insect, includes homogenizing a single insect in aqueous, neutral to acid pH phosphate buffer, providing a solution of acetylcholine iodide in neutral to acid pH phosphate buffered water-miscible organic solvent, providing a solution of 5,5-dithio-bis-(2-nitrobenzoic acid) in the buffer, and providing a solution of propoxur in the buffer, dropping the insect homogenisate into the wells of an assay plate, dropping the acetylcholine iodide and 5,5-dithio-bis-(2-nitrobenzoic acid) solutions into some of the wells and 5,5-dithio-bis-(2-nitrobenzoic acid) propoxur solutions into the other wells and checking for a difference in the yellow coloration between the samples in the two sets of cells.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: August 7, 2007
    Assignee: Institute for Medical Research
    Inventors: Han Lim Lee, Wasi Ahmad Nazni
  • Patent number: 7253769
    Abstract: Method for the elimination in a receiver of an incident signal resulting from multipaths, characterized in that an array of 2n auxiliary sensors (2, 3, Ca to Cf), with n?3, is constructed around an antenna main sensor (1), these auxiliary sensors all being equidistant from the main sensor and regularly spaced apart, and, by successively taking the pairs of auxiliary sensors symmetric with respect to the main sensor to determine the direction of arrival of the signal resulting from the multipaths, the weighted combination of the signals arising from the n sensors is performed, the direction of the transmitter being known (ej?i).
    Type: Grant
    Filed: November 22, 2002
    Date of Patent: August 7, 2007
    Assignee: Thales
    Inventor: Valéry Leblond
  • Patent number: 7253039
    Abstract: In a method of manufacturing a CMOS transistor, an n-channel MOS transistor is formed on an upper MOS transistor in a first region of an SOI substrate having first and second regions. Next, an insulating layer of the SOI substrate is exposed by removing an upper silicon layer in a second region, and then, a first insulating layer is formed to cover the first and second regions. Next, a silicon epitaxial layer is formed on the first insulating layer of the second region, and then, a p-channel MOS transistor is formed on the silicon epitaxial layer. An n-channel MOS transistor is formed on the upper silicon layer of the SOI substrate and a p-channel MOS transistor on the first insulating layer has a vertical step (relative to the n-channel MOS transistor), so that it is possible to increase integration degree.
    Type: Grant
    Filed: December 27, 2004
    Date of Patent: August 7, 2007
    Assignee: Dongbu Elecotronics Co., Ltd.
    Inventor: Hak-Dong Kim
  • Patent number: 7250809
    Abstract: The present invention provides a boosted voltage generator of a semiconductor device where a boosted voltage efficiency and drivability at a target boosted voltage level can be evaluated accurately by employing an enable signal generator. The boosted voltage generator includes a boosted voltage pad; a level detection means for detecting whether or not a present boosted voltage reaches a target boosted voltage level; an oscillation means for performing an oscillation mode in response to a signal outputted from the level detection means; a charge pumping means for outputting a level-controlled boosted voltage in response to a signal outputted from the oscillation means; and an enable signal generation means for operating the oscillation means in response to a signal outputted from the level detection means.
    Type: Grant
    Filed: December 23, 2004
    Date of Patent: July 31, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jun-Gi Choi
  • Patent number: 7251731
    Abstract: To set up a call coming from a user's mobile radio telephone terminal to a receiver terminal for example a home automation terminal, the result of a biometric authentication of the user in the mobile terminal and of a predetermined result are applied to algorithms for authenticating of the mobile terminal implemented in the mobile terminal and fixed storage arrangement in the radio telephone network. If the signature produced by the algorithm in the mobile terminal and transmitted by it and the signature result produced by the algorithm in the fixed storage arrangement are identical, an identifier of the mobile terminal is transmitted from the fixed storage arrangement to the called receiver terminal. The outgoing call is accepted by the receiver terminal only when the latter has recognized the transmitted identifier, or in a variant an identifier of removable supplementary card included in the mobile terminal.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: July 31, 2007
    Assignee: France Telecom
    Inventors: Sylvie Laniepce, Didier Guerin
  • Patent number: 7247376
    Abstract: A powder containing Fe—Ni nano-particles and a method for manufacturing the powder, wherein the powder containing Fe—Ni nano-particles includes a carrier and Fe—Ni nano-particles. The carrier is a ceramic particle with size of about micro-meter (?m). Fe and Ni atoms of the Fe—Ni nano-particles exist simultaneously on the surface of the carrier by electroless plating technology. The atomic ratio of the Fe and Ni atoms can be controlled by changing the relative concentration of the plating solution and the plating condition. The method for manufacturing the powder containing Fe—Ni nano-particles includes the following steps: preparation process, sensitization process, activation process, electroless plating process, and after-deposition process. The manufactured powder has small volume and large surface area. The contact chance between Fe/Ni bimetal and chlorinated organic substance is largely increased. It can be used to treat various environmental pollutants or for some catalytic reactions.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: July 24, 2007
    Inventors: Wen-Jauh Chen, Wei-Long Liu, Ting-Kan Tsai, Shu-Huei Hsieh, Jao-Jia Horng
  • Patent number: 7247533
    Abstract: A method of fabricating a semiconductor device uses selective epitaxial growth (SEG), by which leakage current generation is minimized using lateral SEG growth in case a contact intrudes a shallow track isolation feature. The method includes steps of forming a sidewall spacer on a gate, selectively growing an epitaxial layer in a lateral direction relative to the sidewall spacer and the gate, and forming a contact on the epitaxial layer.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: July 24, 2007
    Assignee: Dongbu Electronics Co., Ltd.
    Inventor: Heui Gyun Ahn
  • Patent number: 7248512
    Abstract: A semiconductor memory device wherein, in order to control the current consumed in a column address counter and latch block in a read operation, delay units disposed in the column address counter and latch block perform a shifting operation according to a signal CASP6, which is enabled in the write and read operations, and a signal WT6RD5Z, which is enabled in the write operation and disabled in the read operation. Accordingly, unnecessary current consumed in the read operation can be reduced.
    Type: Grant
    Filed: June 22, 2005
    Date of Patent: July 24, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Beom Ju Shin
  • Patent number: 7249294
    Abstract: A semiconductor memory device capable of performing a package test with bandwidth other than the default bandwidth without any wiring modification with respect to package option pads reduces package test time. The present invention implements the other package options based upon the wire bonding with an internal option. According to the operation mode, buffer control signals are used to control a VDD or VSS applied to the package option pads via the wire bonding. Buffer control signal are generated using a mode register reset. The buffer receiving the buffer control signal outputs the signal corresponding to the wiring state of the package option pad, blocks the signal path from the package option pads, and outputs a signal corresponding to a package option other than the default package option.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: July 24, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventors: Jun-Keun Lee, Byung-Jae Lee
  • Patent number: 7243869
    Abstract: A distribution structure of a vertical shaft impact crusher includes a core having a hole into which a vertical shaft is inserted. A distribution member for horizontally distributing an aggregate that is vertically provided to the crusher is fused on an outer face of the core. The distribution member includes a plurality of clustered scrapped tips including hard metal, and a fusion material interposed between the scrapped tips to connect the scrapped tips to each other.
    Type: Grant
    Filed: March 24, 2005
    Date of Patent: July 17, 2007
    Inventors: Hong-Soon Hur, Jin-Kyung Hur
  • Patent number: 7245904
    Abstract: For the reconfiguration of a radiotelephone unit including components programmable in configuration modes, the invention provides a removable electronic device having stored data defining a plurality of configuration modes which is connected to the apparatus. A configuration mode is selected from the apparatus in the device. The programmable components are programmed by the device and reconfigured in accordance with the selected configuration mode data under the control of the device. The data of the configuration modes can be downloaded from a server into the device through a downloader terminal.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: July 17, 2007
    Assignee: France Telecom
    Inventors: Benoît Miscopein, Eric Batut
  • Patent number: 7244676
    Abstract: The present invention provides a method for fabricating a semiconductor device capable of securing a bottom contact area of a storage node contact as well as of preventing losses of a bit line hard mask insulation layer. These effects are achieved by planarizing an inter-layer insulation layer, which is filled into etched portions formed between conductive patterns, with the bit line hard mask insulation layer through a CMP process. This planarization process decreases a thickness of an etch target to thereby provide more vertical etch profile compared to a typical etch profile that is tapered or inclined at a bottom contact area. As a result of the decreased thickness of the etch target and the more vertical etch profile, it is possible to obtain the wider bottom contact area and prevent losses of the bit line hard mask insulation layer.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: July 17, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Sung-Kwon Lee
  • Patent number: 7245176
    Abstract: An apparatus for receiving a first supply voltage in order to generate an internal voltage includes a control signal generating block for receiving a control enable signal and a clock signal and generating a pumping control signal having a period determined by one of the control enable signal and the clock signal in response to a test mode signal; and a charge pumping block for converting the first supply voltage into the internal voltage in response to the pumping control signal.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: July 17, 2007
    Assignee: Hynix Semiconductor Inc.
    Inventor: Chang-Ho Do