Abstract: Disclosed herein is a spectacles and sunshade clip assembly. The assembly comprises spectacles including a pair of lens frames, and a pair of hinges affixed to opposite outer ends of the lens, and a sunshade clip including a pair of sunshade lens frames connected to each other by means of a bridge. The sunshade clip further comprises a pair of magnet ribs affixed to opposite outer ends of the sunshade lens frames to linearly extend across only a relatively short distance in a longitudinal direction of the sunshade clip. A respective one of the hinges provided at the spectacles is spaced apart forward from a reference line having a radius of curvature defined by inner surfaces of the lens frames, so that a portion thereof, coming into contact with a corresponding one of the lens frames, forms a forwardly-protruding portion. The forwardly-protruding portion is formed as a recessed magnet-mounting portion to receive a corresponding one of the magnets.

Abstract: A method for correcting angle zero position of an ion implantation equipment. The method includes loading a semiconductor wafer into the ion implantation equipment, implanting ions into the wafer with varying angle, measuring thermal wave and sheet resistance value of the wafer, and correcting the angle zero position with reference to points at which the measured thermal wave or sheet resistance value is minimized.

Abstract: A method for removing mottled etch in a semiconductor fabricating process, prevents mottled etch from being generated after etching, by performing ashing using an oxide plasma, prior to performing wet etching using a photoresist pattern. The method for removing the mottled etch includes the steps of forming a gate oxide film on a semiconductor substrate; forming a photoresist pattern on the substrate; performing ashing using an oxygen plasma; and removing the oxide film consequently by wet etching, the oxide film being opened by the pattern.

Abstract: A plasma processor chamber includes a bottom electrode and a top electrode assembly having a center electrode surrounded by a grounded electrode. RF excited plasma between the electrodes induces a DC bias on them. A measure of the bottom electrode DC bias controls the capacitance of a first series resonant circuit connected between the center electrode and ground. A measure of the center electrode DC bias controls the capacitance of a second series resonant circuit connected between the bottom electrode and ground.

Abstract: A method to detect and/or locate a mobile craft in a reception system making use of transmitters of opportunity, whose signal comprises elements enabling the synchronization of the receiver, wherein certain discriminating sequences are detected of the payload signal. Each transmission present on the carrier frequencies examined by the receiver or receivers is separated by the space/time filtering of the signals in each carrier frequency. The transmitters Ei corresponding to the signals received are identified. The pulse response of the propagation channel for each transmitter Ei and for each detection made on this transmitter are determined by measuring the instant of arrival of the path reflected by the mobile craft is measured and then its delay relative to the instant of transmission from the transmitter. The position of the mobile craft is deduced at the intersection of the ellipsoids defined by the foci constituted by the transmitters Ei from which signals are received and the receiver or receivers Rj.

Abstract: A circuit and method for easily detecting skew of a transistor within a semiconductor device are provided. The circuit for detecting the skew of the transistor includes a linear voltage generating unit for outputting a linear voltage by using a first supply voltage, a first attenuation unit for reducing variation width of the linear voltage according to the performance of the transistor, a saturation voltage generating unit for outputting a saturation voltage by using a second supply voltage, and a comparison unit for comparing an output of the first attenuation unit and the saturation voltage.

Abstract: Disclosed is a cosmetic powder appliance. The cosmetic powder appliance includes a powder receptacle including a lower powder receptacle and an upper powder receptacle having a cylindrical section and a stepped section formed at an upper portion of the cylindrical section, in which the stepped section is formed at a center portion thereof with a passage hole, the cylindrical section is detachably coupled to an upper portion of the lower powder receptacle in such a manner that the lower powder receptacle is covered with the upper powder receptacle, a puffer including a puffer head provided at an upper surface of the stepped section and formed at a center portion thereof with an exhaust hole communicated with the passage hole and a puffer cover for covering the puffer head, and a valve unit installed in the puffer head in order to selectively open the passage hole only when the puffer touches a predetermined cosmetic area.

Abstract: A semiconductor device including a semiconductor substrate, a device isolation region formed by filling a trench in the semiconductor substrate with dielectric material and defining device regions in the semiconductor substrate. The trench has a rounded upper edge, and a dummy thin layer formed on the rounded upper edge.

Abstract: A method for forming a metal pattern in a semiconductor device which is capable of reducing contact resistivity with an interconnection contact. The method includes forming a tungsten interconnection contact passing through a lower insulating layer on a semiconductor substrate, forming an upper insulating layer covering the interconnection contact, and forming a groove having the same line width as a damascene trench on the upper insulating layer. The method also includes forming a mask spacer on a sidewall of the groove, forming the damascene trench having an inclined bottom profile for exposing a top surface and a portion of a sidewall of the interconnection contact, and forming a metal pattern with which the damascene trench is filled, the metal pattern electrically connected to the interconnection contact.

Abstract: A wideband device modeling method comprises using ultra-short time-domain impulse responses measurement and using a subsequent extraction of said ultra-short time-domain impulse responses measurement. The wideband device modeling method in the invention is to provide a model that could faithfully describe an ultra-short TD response and would conform to the wideband consideration. An ultra-short impulse with tens of pico-second width has been used in this work for characterizing the TD responses of the devices. Moreover, the wideband device modeling method in the invention is to provide a layer peeling technique, widely used in characterizing PCB interconnection or package, is mixed with a conventional spiral inductor physical model. The wideband device modeling method in the invention also provides an extension equivalent circuit combined with the BSIM3v3 model.

Abstract: Provided is a method of fabricating an optoelectronic integrated circuit chip. In particular, a method of fabricating an optoelectronic integrated circuit chip is provided, in which an optical absorption layer of a wave-guide type optical detector is grown to be thicker than a collector layer of a hetero-junction bipolar transistor by using a selective area growth by metal organic chemical vapor deposition (MOCVD) method, and the wave-guide type optical detector and the hetero-junction bipolar transistor are integrated as a single chip on a semi-insulated InP substrate, thereby readily realizing the wave-guide type optical detector improved in quantum efficiency and having the ultra-high speed characteristics.

Abstract: The objective is to provide a surface protecting film for polycarbonate which is easy to laminate on polycarbonate and remove from the polycarbonate, the peel adhesive strength change to polycarbonate with times is small and there is no adhesive transferring to the backside of the film substrate in the case of storage for a long period or at a high temperature in the roll shape made of the long length tape. There provided a surface protecting film for polycarbonate, wherein a film substrate having Young's modulus of 1 GPa or more and an adhesive layer are comprised, the glass transition temperature (Tg) of the adhesive composing of the pressure sensitive adhesive layer being between 40 to 90° C. and the initial 180° peel adhesive strength to polycarbonate being between 10 to 300 mN/25 mm.

Abstract: A semiconductor memory device in which only global I/O buses, which receive one or more data groups that must be output first among a N number of data groups that are prefetched in a N-bit prefetch type, from an array of memory cells are precharged with a ½ power supply voltage, thereby making the output speed of the data groups that must be output first thing faster than that of the remaining data groups. The semiconductor memory device includes a data bus controller for precharging predetermined data buses that receive one or more data group that must be output to the outside first among a N number of data groups that are prefetched in a N-bit prefetch type from an array of memory cells, using information to decide an I/O sequence of the N number of the data groups.

Abstract: The present invention relates to a semiconductor memory device. When a device exits from power mode, after a time until an instruction/address receive control signal substantially turns on or off an address and instruction input buffer unit and a time until the address and instruction buffer unit is turned on to synchronize an external command signal to an internal clock signal are compensated for, an internal clock-generating control signal for controlling generation of the internal clock signal is sensed at a high phase of a buffered clock signal and is generated at a low phase of the buffered clock signal. Further, when a device enters power mode, an internal clock-generating control signal for controlling generation of an internal clock signal is sensed at a high phase of a buffered clock signal and is then generated at a low phase of the buffered clock signal.

Abstract: A method for fabricating a nonvolatile memory device including successively forming a first oxide layer, an electrically conductive layer, a second oxide layer, a nitride layer and a third oxide layer on a semiconductor substrate. The method also includes patterning the third oxide layer, forming spacers at sidewalls of the third oxide layer, forming a trench in the substrate by selectively etching the substrate with the third oxide layer as a mask, filling the trench with fourth oxide layer, and removing the third oxide layer, the nitride layer and the second oxide layer. Before filling the trench with the fourth oxide layer, a liner oxide layer is formed on inner walls of the trench. The fourth oxide layer is high density plasma (HDP) oxide and tetrafluoroethane (Si(OC2H5)4). During the filling the trench, lower corners of the conductive layer are made have rounded structure or bird's beak structure.

Abstract: The present invention relates to a circuit for controlling a refresh oscillator, and more specifically, to a circuit for controlling a refresh oscillator, wherein refresh characteristics can be tested in a more efficient manner in such a manner that the refresh characteristics are tested at a refresh cycle, which is extended as long as a predetermined time from an originally set refresh cycle, in a user test mode so as to measure a refresh margin over a wide temperature range.

Abstract: An interference canceller is herein disclosed wherein a baseband signal is input to a detector's fingers, and the fingers detect multi-path signals and estimate the baseband signal's channel. An MRC uses the finger's despread signal and the channel estimate to output a soft bit decision value, while a signal regenerator uses a hard bit decision value and the finger's channel estimate to regenerate the baseband signal. An SIR measurer uses a soft bit decision value and a despreader's channel estimate to measure an SIR. A signal selector compares each detector's SIR measurement value with a target SIR, and when the SIR measurement value is greater than the target SIR, it selects the detector's regeneration signal to group received signals. A subtractor subtracts the regeneration signal from the baseband signal.

Abstract: A semiconductor wafer regenerating system is capable of easily and efficiently removing fabricating patterns formed on a semiconductor wafer to enable reuse of the semiconductor wafer. The system, which removes patterns of the semiconductor wafer in a dry manner by using blasting grit, includes a mesh conveyor, a grit blaster, a swinging element, a collecting element, a separating element, and a dust collector. The mesh conveyor transports the semiconductor wafer so that the patterns face upward. The grit blaster is installed above the mesh conveyor and has at least one blasting nozzle for blasting grits toward the semiconductor wafer to remove the patterns from the semiconductor wafer. The swinging element swings the blasting nozzle in a plane perpendicular to a transporting path of the semiconductor wafer along the mesh conveyor. The collecting element underneath the mesh conveyor collects pulverulent bodies including grits, chips, and dusts falling from the mesh conveyor.