Abstract: The present invention provides a boosted voltage generator of a semiconductor device where a boosted voltage efficiency and drivability at a target boosted voltage level can be evaluated accurately by employing an enable signal generator. The boosted voltage generator includes a boosted voltage pad; a level detection means for detecting whether or not a present boosted voltage reaches a target boosted voltage level; an oscillation means for performing an oscillation mode in response to a signal outputted from the level detection means; a charge pumping means for outputting a level-controlled boosted voltage in response to a signal outputted from the oscillation means; and an enable signal generation means for operating the oscillation means in response to a signal outputted from the level detection means.

Abstract: To set up a call coming from a user's mobile radio telephone terminal to a receiver terminal for example a home automation terminal, the result of a biometric authentication of the user in the mobile terminal and of a predetermined result are applied to algorithms for authenticating of the mobile terminal implemented in the mobile terminal and fixed storage arrangement in the radio telephone network. If the signature produced by the algorithm in the mobile terminal and transmitted by it and the signature result produced by the algorithm in the fixed storage arrangement are identical, an identifier of the mobile terminal is transmitted from the fixed storage arrangement to the called receiver terminal. The outgoing call is accepted by the receiver terminal only when the latter has recognized the transmitted identifier, or in a variant an identifier of removable supplementary card included in the mobile terminal.

Abstract: A light-guide fixing equipment is described, suitable for assembling a light source and a hank of optical fibers of an optical fiber illuminant device. The light-guide fixing equipment comprises an assembling device and a fixing device. The assembling device is constituted by inserting a first casing into a second casing, in which the assembling device includes two openings respectively located in a portion of two end surfaces of the assembling device, and a plurality of locked parts are set and protrude on inner walls of the first casing and the second casing according to the shape of the light source and the hank of the optical fibers. With the other portion of the end surfaces of the assembling device and the locked parts, the source and the hank of the optical fibers can be assembled and fixed within the assembling device.

Abstract: A powder containing Fe—Ni nano-particles and a method for manufacturing the powder, wherein the powder containing Fe—Ni nano-particles includes a carrier and Fe—Ni nano-particles. The carrier is a ceramic particle with size of about micro-meter (?m). Fe and Ni atoms of the Fe—Ni nano-particles exist simultaneously on the surface of the carrier by electroless plating technology. The atomic ratio of the Fe and Ni atoms can be controlled by changing the relative concentration of the plating solution and the plating condition. The method for manufacturing the powder containing Fe—Ni nano-particles includes the following steps: preparation process, sensitization process, activation process, electroless plating process, and after-deposition process. The manufactured powder has small volume and large surface area. The contact chance between Fe/Ni bimetal and chlorinated organic substance is largely increased. It can be used to treat various environmental pollutants or for some catalytic reactions.

Abstract: The box, which can be made from a single sheet or from five separate pieces which are fastened to one another to form the box, is such that at the front ends, extensions project with transverse folding lines to form corner reinforcements. The extensions that form these reinforcements present four folding lines that define the sectors, which form an initial sector which is attached to the inner face of the side, a second sector with a diagonal disposition, a third sector which is attached on the inside of the front, a fourth sector which lies at right angles to the diagonal sector, and a last sector which is attached to one of the two halves of the inner face of the diagonal sector. At their upper edge the sectors present flanges which form projections perpendicular to one another, for positioning in matched opposing notches when the boxes are stacked.

Abstract: A method of fabricating a semiconductor device uses selective epitaxial growth (SEG), by which leakage current generation is minimized using lateral SEG growth in case a contact intrudes a shallow track isolation feature. The method includes steps of forming a sidewall spacer on a gate, selectively growing an epitaxial layer in a lateral direction relative to the sidewall spacer and the gate, and forming a contact on the epitaxial layer.

Abstract: A semiconductor memory device wherein, in order to control the current consumed in a column address counter and latch block in a read operation, delay units disposed in the column address counter and latch block perform a shifting operation according to a signal CASP6, which is enabled in the write and read operations, and a signal WT6RD5Z, which is enabled in the write operation and disabled in the read operation. Accordingly, unnecessary current consumed in the read operation can be reduced.

Abstract: A probe card is used in conducting a visual test for a target test object through simultaneous contact of the probe card with each and every electrode pad of the target test object. The probe card includes a plurality of probes composed of conductive wire strands and having elastically deformable contact parts so curved as to make contact with electrode pads of a target test object. The contact parts are oriented in one and the same direction and extend in a parallel relationship with one another. The probe card further includes a first insulating block for fixedly securing one end parts of the probes, a second insulating block for fixedly securing the other end parts of the probes and a mounting plate for holding the first and second insulating blocks in such a manner that the contact parts of the probes protrude outwardly.

Abstract: A semiconductor memory device capable of performing a package test with bandwidth other than the default bandwidth without any wiring modification with respect to package option pads reduces package test time. The present invention implements the other package options based upon the wire bonding with an internal option. According to the operation mode, buffer control signals are used to control a VDD or VSS applied to the package option pads via the wire bonding. Buffer control signal are generated using a mode register reset. The buffer receiving the buffer control signal outputs the signal corresponding to the wiring state of the package option pad, blocks the signal path from the package option pads, and outputs a signal corresponding to a package option other than the default package option.

Abstract: Provided is an ultra-precision positioning system. The system comprises a base, a motion stage movably provided to the top of the base, and first to sixth feeding mechanisms for moving the motion stage to have six degrees of freedom. The first to sixth feed mechanisms are fixed to the base and the motion stage, respectively. Each of the first to third feeding mechanisms has a piezo actuator and two elastic hinges provided at both sides of the piezo actuator. Each of the fourth to sixth feeding mechanisms has a piezo actuator, three hinge members, and a lever member with a notch hinge which operatively cooperates with the hinge members.

Abstract: The present invention provides a method for fabricating a semiconductor device capable of securing a bottom contact area of a storage node contact as well as of preventing losses of a bit line hard mask insulation layer. These effects are achieved by planarizing an inter-layer insulation layer, which is filled into etched portions formed between conductive patterns, with the bit line hard mask insulation layer through a CMP process. This planarization process decreases a thickness of an etch target to thereby provide more vertical etch profile compared to a typical etch profile that is tapered or inclined at a bottom contact area. As a result of the decreased thickness of the etch target and the more vertical etch profile, it is possible to obtain the wider bottom contact area and prevent losses of the bit line hard mask insulation layer.

Abstract: For the reconfiguration of a radiotelephone unit including components programmable in configuration modes, the invention provides a removable electronic device having stored data defining a plurality of configuration modes which is connected to the apparatus. A configuration mode is selected from the apparatus in the device. The programmable components are programmed by the device and reconfigured in accordance with the selected configuration mode data under the control of the device. The data of the configuration modes can be downloaded from a server into the device through a downloader terminal.

Abstract: A distribution structure of a vertical shaft impact crusher includes a core having a hole into which a vertical shaft is inserted. A distribution member for horizontally distributing an aggregate that is vertically provided to the crusher is fused on an outer face of the core. The distribution member includes a plurality of clustered scrapped tips including hard metal, and a fusion material interposed between the scrapped tips to connect the scrapped tips to each other.

Abstract: An apparatus for receiving a first supply voltage in order to generate an internal voltage includes a control signal generating block for receiving a control enable signal and a clock signal and generating a pumping control signal having a period determined by one of the control enable signal and the clock signal in response to a test mode signal; and a charge pumping block for converting the first supply voltage into the internal voltage in response to the pumping control signal.

Abstract: The present invention relates to a clock control circuit that can reduce power consumption in the input operation of an address signal and control signals and semiconductor memory device including the same, and an input operation method of the semiconductor memory device. The clock control circuit accordance to the present invention generates a control clock signal only when external address signals or external control signals are substantially input. Therefore, unnecessary power consumption a power noise phenomenon can be reduced.

Abstract: The present invention relates to a method for providing an arbitrary sound chosen by a called subscriber for a caller instead of a conventional RBT (RingBack Tone).

Abstract: The invention relates to a side view LED package in use with an LCD backlight unit. The side view LED package comprises: an LED chip; and a strip-shaped lead frame having a toothed structure formed in a lateral edge thereof. The LED chip is mounted on a surface of the lead frame. An integral package body is made of resin, and includes a hollow front half having a cavity for housing the LED chip and a solid rear half divided from the front half by the lead frame. The toothed structure of the lead frame structure can improve resin flow in order to ensure stability even if the LED package is made extremely thin.

Abstract: The present invention relates to a WLP fabrication method capable of welding a lid wafer with a device wafer by using laser illumination. The WLP fabrication method can rapidly weld bonding metal strips of device and lid wafers with each other in order to couple the lid wafer with the device wafer while sealing an internal cavity from the outside without giving any thermal effect to a drive unit in the device wafer.

Abstract: In a method of manufacturing an optical attenuator, a bonding medium layer of polymer is used to bond an actuator structure and a support structure. A silicon layer is provided with waveguides for transmitting optical signals from an optical signal transmission line and an activator is formed at a predetermined portion thereof. The waveguides are inserted into cavities of the bonding medium layer. A support layer is attached to the bonding medium layer at an opposite face to a face where the bonding medium layer is bonded with a silicon substrate.