Abstract: A test device that can improve test reliability is provided. In the test device, an error detecting unit detects an error of inputted test signals to generate an error flag, a normal test unit performs a test operation according to the test signals when the error flag is deactivated, and an error information providing unit indicates the error of the test signals when the error flag is activated.

Abstract: A semiconductor memory device includes a reference signal generating unit for generating a reference signal; a comparing unit for comparing the reference signal with a test signal applied to a test pad to output an adjusted value after adjusting the adjusted value until the test signal is equal to the reference signal; an impedance measuring unit for measuring an impedance of the test pad based on the adjusted value to output the test signal; an impedance adjusting unit for adjusting an impedance of a data I/O pad to have an impedance value corresponding to the adjusted value outputted when the test signal is equal to the reference signal; an impedance control unit for controlling the comparing unit so that the adjusted value is outputted when the test signal is equal to the reference signal; and a reference signal control unit for adjusting a voltage level of the reference signal.

Abstract: A semiconductor memory device includes a delay locked loop for correcting a duty cycle rate of a delay locked clock signal. The semiconductor memory device includes a delay locked circuit, a duty cycle correction circuit, and a clock synchronization circuit. The delay locked circuit outputs a delay locked clock by delaying a system clock by a predetermined time. The duty cycle correction circuit outputs a first clock by correcting a duty cycle of the delay locked clock, wherein the proportion of high to low level periods of the delay locked clock is controlled according to a time difference between a second edge of the first clock and that of a second clock derived from the first clock. The clock synchronization circuit synchronizes a first edge of the first clock with that of the second clock.

Abstract: A semiconductor memory device includes an over driver for driving a pull-up power line of a bit line sense amplifier by an over driving signal, a normal driver for driving the pull-up power line of the bit line sense amplifier by a normal driving signal, and a driving signal generating circuit, in response to a write signal, for generating a driving signal to drive the over driver for a predetermined interval and thereafter to drive the normal driver.

Abstract: A semiconductor memory device includes a bank including a plurality of cell blocks; a first group of local input/output lines to transfer data stored on a first group of the cell blocks; a second group of local input/output lines to transfer data stored on a second group of the cell blocks; a first precharge unit precharging the first group of the local input/output lines; a second precharge unit precharging the second group of the local input/output lines; a precharge signal generator to precharge the first and second groups of the cell blocks and the second group of the cell blocks.

Abstract: A semiconductor memory device can reduce a data writing time. The semiconductor memory device includes a bit line sense amplifier connected to a pair of bit lines. A pair of first local lines id connected to the pair of bit lines by a first switching unit. A pair of second local lines is connected to the pair of first local lines by a second switching unit. A writing driver drives the second local lines using a normal-driving voltage in response to a data signal through a global line. The writing driver drives the second local lines using an over-driving voltage having a higher level than that of the normal-driving voltage during a predetermined period.

Abstract: A method of automatically matching engine speed to vehicle speed while a manual transmission is shifted. The currently selected speed ratio is determined from the ratio of engine speed and vehicle speed. The operator initiates a shift by disengaging the clutch. The operator's throttle inputs before and after clutch disengagement imply whether he wishes an upshift of one speed ratio or a downshift of one or two speed ratios. While the clutch is disengaged, the engine computer acts to bring the engine to the speed needed for smooth reengagement of the clutch. Engine speed control returns to the operator upon clutch engagement.

Abstract: Processing systems and methods receive events, such as a transaction to an account, and converts the events into messages. Each message then invokes one or more rules which are executed by a rules engine. The execution of these rules may invoke the execution of additional rules. After all rules have executed, the account associated with the event is updated, such as by projecting the account. The rules have their parameters defined in a repository so that the parameters can be easily changed without any need to recompile. The processing systems receive authorizations and other transactions and runs in real-time as transactions arrive. As a result, balances are updated continuously and accounts are read and updated only when there is activity. Hierarchy is user configurable, including multiple hierarchy to any depth. System operations are controlled by rules and their parameters and most modifications can be accomplished without access to source code.

Abstract: A computer program product for controlling the computer's processor to perform responsive actions a natural language input has: (1) vocabulary, phrase and concept databases of words, phrase and concepts, respectively, that can be recognized in the inputted communication, wherein each of these database elements is representable by a designated semantic symbol, (2) means for searching the inputted communication to identify the words in the communication that are contained within the vocabulary database, (3) means for expressing the communication in terms of the word semantic symbols that correspond to each of the words identified in the inputted communication, (4) means for searching the communication when expressed in terms of its corresponding word semantic symbols so as to identify the phrases in the communication that are contained within the phrase database, (5) means for expressing the communication in terms of the phrase semantic symbols that correspond to each of the phrases identified in the communicat

Abstract: A system, method, and computer program product for providing discovery services for servers during a startup sequence can include powering on a server in a domain; creating a listener socket for the server to accept coupling requests from other servers; registering server information for the server with a database; searching the database for other registered servers in the domain; establishing a couple to each of the other registered servers in the domain; and verifying validity of the couple to each of the other registered servers including performing a handshake. The server information registered with the database can include an IP address; a listener port; a domain; a version number; or a server type.