Abstract: A method and apparatus for detecting peaks in a signal which comprises an alternating polarity waveform including a plurality of points. A selected point in the signal is designated. Thereafter, a threshold value for the selected point is established utilizing a prior threshold value associated set off with spaces with a point prior to the selected point as follows:(m(n)=t0*ax(n)+t1*m(n-1))wherein n is the point identifier, m(n) is the threshold value, t0 is a fixed positive constant less than one, t1 is a fixed positive constant less than one, ax(n) is the absolute value of the input signal, and m(n-1) is the prior threshold value for the prior point. In this manner the threshold value may be adjusted for fluctuations in amplitude of the signal. Next, the selected point is compared with the threshold value to determine whether or not the selected point is within a predetermined distance of the threshold.

Abstract: A plurality of removable volumes for magnetic tape units are used as array for the storage of data. First an array of removable volumes is mounted on the magnetic tape units. Then each removable volume of the array is accessed at equivalent logical locations for storage or retrieval of the data file. Responsive to access of the array, data for the data file is striped to the removable volumes of the array beginning at the equivalent location on each removable volume. Depending upon the striping format, null marks may be striped to the removable volumes receiving fewer data than other volumes. This maintains the equivalent logical location for the start of the next file.

Abstract: A system for and method of operating of data communication interface for handling communication between a data processing system and a plurality of communication channels is disclosed. The method provides for monitoring posting of actions from the data processing system and from the plurality of communication channels. Responsive to detection of posting of an action, it is determined if the action was posted by the data processing system. Where the action was posted from the data processing system, it is determined if conditions permit the action to be executed. Responsive to an affirmative determination that the action can be executed it is executed. Responsive to a determination that the action was posted from the host data processing, but was not executable, the action is added to the end of a queue of actions. The first entry in the queue is then examined for executability. If executable, the first action is executed and replaced as first action with the next action from the queue, if any.

Abstract: A data backup copying session on a data processing system is secured responsive to initiation of the data backup session by an application executing on a processing unit by generating a unique identifier for the data backup session. Thereafter, all member paths of a group of paths designated by the processing unit for communication between itself and the first storage subsystem are identified and associated with the data backup session. Access to the session is thereafter allowed only along a member path of the group of paths associated with the data backup session. The system and method of the invention further provide for fault recovery and protection against excessive demand on storage control unit memory.

Abstract: A system and method for estimating input phase for bit cells recovered from run length limited code where the bits cells have a nominal duration allows use of sampling rate as low as the nominal data rate in an all digital phase-locked loop. For the all digital phase-locked loop, a clock generates sample cells of a fixed duration. The sample cell phase contribution corresponding to a proportion of the fixed duration to the nominal duration is calculated and added to an accumulated phase value with each successive sample cell. For each sample cell, an input phase estimate is made from the accumulated phase value and timing information for any bit cell event occurring within the sample cell. Finally the input phase estimate information is used to adjust an accumulated phase value for the next sample cell.

Abstract: The invention is one or more tape systems which determine the length of tapes mounted therein to assess the thickness of such tapes. A format identifier is written at one of a plurality of locations on the tape depending upon the tape thickness. The format identifier for a relatively thin tape is written further from the leader block than that for a relatively thick tape, thereby avoiding the writing of user data in a region of the tape embossed with wrap deformations. The thickness determination is combined with a determination of the tape format to assess the compatibility of a desired operation on a tape mounted in a tape system therewith. If the operation is not compatible with the tape and the tape system, the tape system will not permit such operation to continue. A method for operating the tape systems is also disclosed, and accounts for various contingencies, such as blank tapes and marginal determinations of tape thickness.

Abstract: Each processor in a multi-processor system has an associated interface circuit which comprises a register for storing a flag bit status and evaluation logic for comparing the stored flag bit status with an update status from the associated processor. The comparison of the update status with the stored status results in the generation of an associated change status which identifies the changed flag bits. Each interface circuit receives the change status from all other interface circuits. The generated change status is combined with the received change status to determine the combined changed flag bits from all processors. The resultant combined changed flag bits are compared with the original flag bit status and an updated flag bit status is generated therefrom. All processors in the multi-processor system can communicate their respective status changes simultaneously without following a predetermined protocol.

Abstract: The invention is an information reproduction apparatus provided with supporting means for supporting a recording medium, a drive source for moving the recording medium between the initial insertion position and the reproduction position by driving said supporting means, transmission means for transmitting the driving force of said drive source to said supporting means, retraction means operable to force a transmission element to retract from said transmission means, said transmission element being a part of said transmission means, and motion means operable to force the recording medium to move from the reproduction position to the initial insertion position under the condition that said transmission element is not engaged in said transmission means. In forcibly moving said supporting means, when the drive is out of operation, said supporting means are released from the drive force by means of said retraction means, freeing the supporting means from the resistance force of the drive force.

Abstract: An error recovery subsystem which can be easily modified for use with any physical hardware which is being monitored is disclosed. The error recovery subsystem employs a user editable file including the rules for defining the system state, the error states, and the sequences of recovery actions to be taken depending upon the comparison between the system state and the error states. The rules for defining the system state, include don't care variables, and the sequences of recovery actions are specified using an index into a set of elemental recovery actions. Because the system state, error state, and sequence of recovery actions are defined in a user editable file modifications to the error recovery scheme can be made without recompiling the error recovery subsystem program code. Such modifications to the error recovery subsystem may therefore be made on a real time basis. A method for recovering from an error and a program product therefore are also disclosed.

Abstract: The invention is a system and method for high-efficiency checkerboard memory self-test. A random pattern generator configuration includes a linear feedback shift register and a multiple input signature register. The random pattern generator is used to step through the memory addresses in generating the checkerboard pattern. The two least significant address lines connecting the random pattern generator and the memory array are connected together via an exclusive OR gate. Because these address lines indicate the parity of the current and next memory addresses to be generated in the random pattern generator, the output of the exclusive OR gate indicates whether the next memory address to be generated is of the same or different type of state compared to the current memory address. The output of the exclusive OR gate can thus be connected to the data input shift register of the memory array to permit conditional shifting of the checkerboard data pattern into the memory array.

Abstract: A water based cleaning composition suitable for use in tape drives including very small quantities of a surfactant, preferably a tridecyl alcohol ether of polyoxyethylene, and an ionic salt of ammonia is disclosed. The quantity of surfactant is such that it is totally water soluble and furthermore does not exist as a free solvent susceptible to evaporation into the environment. The combination of the surfactant and an ionic salt of ammonia, preferably ammonium carbonate, enhances detergency and the suspension of debris without leaving a residue. In addition, the ionic salt of ammonia is provided in a quantity which maintains a neutral pH, thereby minimizing the corrosiveness of the cleaning composition and eliminating static.

Abstract: A method of tracing the paths used in execution of a computer program includes using the state of a single bit to denote the referencing of a trace point in the program. The trace points are logically located near the program branch points. One or more bit maps are arranged in a known state at the beginning of program execution and the state of a particular bit in one of the bit maps is set when the associated trace point is referenced. Each bit is associated with a particular trace point according to its position in the bit maps. After program execution, the bit maps are compared to the source listing to determine which trace points were referenced. The use of single bits to denote the referencing of trace points minimizes the degradation of performance efficiency of the target program. Because the bit maps are initialized to a known state at the beginning of each program execution and transferred to retentive storage at the end of each program execution, tracing occurs continuously.

Abstract: A thin film magnetic head and a method for making the thin film head by the use of electrical lapping guides includes the use of a resistive lapping guide that has a height dimension and an electrical resistance that optimizes the results of the comparison of the resistive lapping guide to a finished lapping guide. The resistive lapping guide is not lapped during the lapping process. The finished lapping guide is lapped and the resistive comparison between the two determines the stopping of the lapping process. An as-lapped guide which is of the same dimensions as the finished lapping guide after lapping can also be included. An interleaved magnetic head having alternating magneto-resistive read elements and inductive write elements can be precisely lapped by sensing the resistance of the lapping guide elements and using a formula to determine the final resistance of the finished lapping guide to halt the lapping process.

Abstract: An electrical connector including a top clamp plate, two circuit bars, a resilient pressure pad, a bottom clamp plate, and means for fastening two flexible circuits and a third circuit device in mating electrical contact therein is disclosed. Each flexible circuit is mounted on and wrapped about a separate one of the circuit bars with an adhesive to provide a solidly backed sub-assembly. The top clamp plate is then fastened to the sub-assemblies with screws and retaining clips to create a single sub-assembly. The resilient pressure pad is mounted on the bottom clamp plate and the third circuit device is mounted thereon. Each circuit bar is then mounted over the third circuit device to make electrical contact between the third circuit device and each flexible circuit. The components are aligned using pins extending upward from the bottom clamp plate. The single sub-assembly is then fastened to the bottom clamp plate using screws to complete the assembly.

Abstract: A peripheral data storage hierarchy includes three storage levels. The top storage level is a fast accessing direct access storage device(s), such as magnetic disk drives. The intermediate level is an automatic warehouse type library, storing a large plurality of optical disks, which are automatically transferred between storage cells of the library and optical disk drives operatively connected to the host processor. The bottom level of the storage hierarchy includes one or more stand-alone optical disk drives and a shelf unit. Personnel manually carry the optical disks between the stand-alone drives and the shelf unit upon mount and demount commands received from the host processor. The intermediate library level uses the same type of optical disk as used in the bottom level of the data storage hierarchy. An I/O station in each of the automatic libraries enables manual access to the optical disk for transferring the optical disks between the intermediate and bottom levels.

Abstract: A magnetic head is disclosed in which thin strips of shielding are inlaid into the surface of the magnetic head between the read and write gaps for reducing feedthrough. The shielding extends across a substantial portion of the tape-engaging surface between the read and write gaps. Further reduction of feedthrough is achieved by inlaying additional shielding outboard of the read gaps. The shielding does not encircle individual read or write gaps, but may extend across tracks in a multitrack head. The shielding is made of a magnetically permeable material which absorbs magnetic flux which otherwise strays from the magnetic cores. Material and manufacturing costs are maintained low because the shields are small and simple in geometry.

Abstract: A data storage hierarchy includes a media library characterized by a travelling elevator which moves in front of an open-faced wall of storage cells or compartments and ingress-egress slots to a plurality of data recording devices. Optical disks are selectively moved by the travelling elevator between the storage cells and the data recording devices. The carrier can carry a plurality of the optical disks at a given time. Each time the travelling elevator accesses a storage cell or a recording device, the record disk currently held by such cell or device is moved onto the travelling elevator and then the optical disk carried to such cell or device is inserted into the cell or device. Programs are provided for controlling the movements of the travelling elevator for maximizing swap operations of the disk at cells and devices. The optical disks have no home cell in the library.

Abstract: A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.

Abstract: A system and method for on-chip self test of memory circuits is disclosed. Memory circuit testing is accomplished by using a random pattern generator based upon a primitive polynomial and including a linear feedback shift register having at least one stage in addition to the number of address lines required for addressing the memory. The random pattern generator is capable of cycling through all memory addresses, including the all zero address. During each of four random pattern generator cycles, known data is written in or read out of each memory cell. By including means for writing and reading the complement of data during different random pattern generator cycles, both possible states of each memory cell may be tested. The outputted data is routed to multiple input signature register which generates a data signature for the memory which can in turn be compared to that known for a good memory.

Abstract: Roll release mechanism for pinch rolls are improved by providing capability for axial and radial disengagement of the pinch rolls and automatic roll re-engagement upon machine activation. One set of pinch rolls is mounted on a first shaft with a helical cam thereon. A spring latch and pawl are engaged to the first shaft and attached to a second multi-radius shaft parallel to the first shaft. A second set of pinch rolls are mounted on the second shaft so as to engage the first set of pinch rolls. Axial movement of the second shaft results in shaft areas of different radius being fitted within bearings thereby disengaging the pinch rolls. Disengagement is maintained against a spring force by the catching of the pawl on the cam. Machine activation then results in rotation of the first shaft until the pawl is released from the cam and the spring force moves the second shaft axially until the pinch rolls have re-engaged. In addition, the pinch rolls may be re-engaged manually.