Abstract: A low-cost circuit capable of detecting the absence of a pulse train such as the pulse train generated by a fan cooling output circuit of open collector design. The detection circuit is capable of sensing that a pulse output has stopped in either a high or low state by converting the pulse train to a level that can be compared to a reference. The circuit design insures that the steady state voltage level decays to an under voltage value when the pulse train stops regardless of whether the fan output stops in a high or low state.

Abstract: The invention is a method for detecting both surface topography and defect presence using an AC interferometer. Surface topography measurements are maximized by adjusting the signal voltage of the light modulator to a relative phase-sensitive value. Defect detection is maximized by adjusting the signal voltage of the light modulator to a relatively phase-insensitive value. This method not only allows for heretofore unknown defect detection by an AC interferometer but, because the signal voltage can be switched electronically, permits both observations to be taken at a high speed and for many points of a specimen, thereby making the method suitable for the manufacturing environment. More specifically, the method would be applicable to both optical disk and microchip manufacturing.

Abstract: A plurality of host processors share access to a peripheral data storage subsystem and each have program means for controlling asynchronous operations of the subsystem. Control blocks in each of the host processors are addressably linked together for enabling inferred access to a unit control block (UCB) for any of a plurality of peripheral devices in the subsystem. The subsystem selectively groups some of the devices such that only devices designated as primary devices are addressably accessible by host processor application programs. Other devices in the respective groups are secondary devices and are accessed by the subsystem whenever the primary devices in the same group cannot perform a host processor commanded operation. Means are provided for identifying the secondary devices to all of the host processors.

Abstract: A read/write memory cell is disclosed in which multiple ROM data states can be stored. Independent sensing of the resistance values of each of two resistors accounts for the storage of multiple ROM data states. The resistors are encompassed in a pair of cross-coupled resistive gate devices forming branch circuits, thereby allowing each branch circuit to control the conduction of current in the other branch circuit. This allows for read/write data storage in flip-flop-like fashion. In addition, since resistive gate devices are used, the ROM data may be programmed during the later stages of manufacturing.

Abstract: A process and an apparatus are described for regenerating an electroless copper plating bath containing a complexing agent, preferably ethylenediamine tetraacetic acid. From the bath solution to be regenerated, the copper content is reduced by electrolysis to a value below 20 mg/l and the complexing agent subsequently precipitated by acidification and recovered. After dissolution in an alkaline electrolytic solution, the solution thus obtained is fed back to the electroless copper plating bath. A particularly pure ethylenediamine tetraacetic acid free from by-products is obtained if the pH value is kept constant during electrolysis, an anodic current density i.sub.+ of 100 A/m.sup.2 is not exceeded, and the anodic current density during electrolysis is reduced according to the electrolysis characteristic or in steps.

Abstract: An improved sense circuit for determining the data state of a memory cell in a multilevel storage system is disclosed. The sense circuit includes at least two differential voltage level sensing circuits. A first differential voltage level sensing circuit compares the relative magnitudes of a data input signal voltage level corresponding to a particular memory cell charge level and a first reference voltage level, thereby providing at least one first binary data output signal. The first binary data output signal is then used to generate a second reference voltage level having a magnitude different from that of the first reference voltage level. A second differential voltage sensing level circuit compares the relative magnitudes of an adjusted data input signal voltage level and a second reference voltage level, thereby providing at least one second binary data output signal. The adjusted data input signal corresponds to a function of the first data input signal.

Abstract: A flexible disk drive head access mechanism optimized for automated manufacture is disclosed. The mechanism is a complete subassembly. As such, the mechanism can be handled by a robot, as the mechanism is automatically mounted to the disk drive's main frame member. The mechanism comprises a stepping motor having a metal output pulley which is wrapped by a metal band. The middle of the band is welded to the motor's output pulley. The two free ends of the band are welded to a flexible, low-mass band tensioner. This tensioner is a thin, elongated member which includes a U-shaped portion which is operable to tension the band about the pulley. Attachment of the ends of the band to the tensioner not only tensions the band, but also operates to bend the tensioner slightly toward the pulley, thus causing the band to self-center itself in a 360.degree. wrap about the pulley. In this way, rotary to linear output from the mechanism is assured.

Abstract: A process for producing printed circuits including a dry substrate activation process and copper deposition without electroless plating is disclosed. The process requires fewer wet chemical baths, is less environmentally hazardous, and more efficient than conventional processes. Initially, sacrificial copper layers are laminated to the surface of a prepreg substrate and through holes are drilled therein. The sacrificial layer is then removed by etching and copper is sputter deposited upon the substrate surface and the walls of the through holes. Photoresist is then applied, exposed and developed to create the desired pattern of circuit lines. Next, copper is deposited in the photoresist channels and on the through hole walls by electroplating. After the photoresist is stripped, the exposed sputtered copper is removed by differential etching.

Abstract: A power supply circuit for producing at least one output which is essentially free from current ripple is disclosed. A chopped DC voltage source is applied to a transformer having a primary coil and at least two secondary coils. The secondary coils provide input voltages to output stages which each include a rectifier diode, a freewheeling diode and an LC filter. The inductors in the LC filter of adjacent output stages are magnetically coupled together. The characteristics of these inductors are selected such that the current ripple through the inductors in all the output stages, other than the first output stage, is essentially zero. Multiple inductors can also be employed in the first output stage with each one being magnetically coupled to the inductor in a different succeeding output stage.These multiple inductors in the first output stage can be combined in series or in parallel.

Abstract: Nodule formation in a continuous electroless copper plating system is minimized by independently controlling the dissolved oxygen contents on the plating solution in the bath and in the associated external piping. The level of dissolved oxygen in the plating tank is maintained at a value such that satisfactory plating takes place. At the point where the plating solution leaves the tank, additional oxygen gas is introduced into the solution so that the level of dissolved oxygen in the plating solution in the external piping is high enough to prevent any plating from taking place in the external piping and so that in the external piping the copper is etched or dissolved back into solution. At the end of the external piping, the dissolved oxygen level is reduced so that the dissolved oxygen level of the plating solution in the tank is maintained at the level where plating will take place.

Abstract: A method for fixing a pin to a ceramic substrate includes inserting the pin into a hole through the thickness of the substrate, restraining one end of the pin that extends from one surface of the substrate, and striking the end of the pin at the opposite end of the substrate with a force sufficient to form a head on the pin and to cause permanent radial expansion of the pin against the surface of the hole in the substrate.

Abstract: A process is disclosed for simultaneously etching holes in both the thick and thin portions of a dielectric layer on a semiconductor substrate. An anisotropic dry etchant is used to eliminate any significant lateral etching of the dielectric layer during etching. Thus, a mask-and-etch cycle may be eliminated from processing during integrated circuit manufacture, yet dimensional tolerances are maintained.

Abstract: An apparatus capable of simultaneous focusing, positioning, and scanning of an ion beam is described. The apparatus uses metallic elements to form the sides of an open-ended substantially box-shaped structure. Application of AC and DC currents to the four corners of the structure create AC and DC fields within the structure that deflect an ion beam so as to perform the functions of positioning, focusing, and scanning. The center of focusing of the ion beam is placed closer to the center of scanning of the ion beam than in conventional ion beam deflection systems. As a result, the tendency of space charge beam blow-up during scanning is greatly diminished. By combining the functions of positioning, focusing, and scanning in one deflection element, the length of an ion beam deflection system is reduced, and the current capability is greatly increased.