Abstract: A semiconductor device and a method for forming the semiconductor device, include forming a mandrel, forming spacer wordline conductors on sidewalls of the mandrel, separating, by using a trim mask, adjacent spacer wordline conductors, and providing a contact area to contact alternating ones of pairs of the spacer wordline conductors.

Abstract: A system and method of displaying an image on a liquid crystal display equipped with a crystal panel which comprise a plurality of gate lines, a plurality of data lines, and pixel cells disposed in the shape of a matrix corresponding to the intersections of the gate lines and the data lines, the method comprising the steps of: (a) selecting the gate line for the display of an image on the liquid crystal panel in a first term during a frame period for displaying one image and moreover supplying an image signal to display the image to the data line; and (b) selecting the gate line again in a second term during the same frame period as that of the first term, the first term and the second term being in the same frame period, and supplying a non-image signal having a predetermined potential and different from the image signal to the data line during the second term, whereby supply of the non-image signal is for displaying a blanking image.

Abstract: Arrays of microelectronic elements such as magnetorestive memory elements and FET's, including dual-gate FET's, are fabricated by methods involving a host wafer and a first wafer on which part of the microelectronic elements are separately formed. Conductive elements such as metal-filled vias are formed in the host wafer and extend to its surface. Hydrogen ions are implanted at a selected depth in the first wafer. After formation of selected portions of the microelectronic elements above the hyrogen ion implantation depth of the first wafer, the latter is bonded to the surface of the host wafer so that complementary parts of the two wafers can join to form the microelectronic elements. The first wafer is fractured at the hydrogen ion implantation depth and its lower portion is removed to allow for polishing and affixing of electrodes thereon.

Abstract: An object of the present invention is to improve display quality of the LCD device and yield of source-driver chips by adding a slight circuit, and averaging and evening out output levels of LCD source drivers. An output-level averaging circuit for an LCD source driver LCn which comprises an average-value-detecting means (22, S1n) for detecting an average value Ave of output signals O (O1, O2, . . . , On, . . . ) of output drivers D(D1, D2, . . . , Dn, . . . ), an electric-potential-difference detecting means (Cn, S2n, or S3n) for detecting electric potential difference between the detected average value Ave and output levels O of the output driver D, and a feedback means (S4n) for feeding back detected electric potential difference by adding it to output signals O of the output driver D, and which is set to the output portion of the source driver SDn.

Abstract: It is important to ensure good selectivity of a single magnetic tunnel junction storage cell within a memory array without affecting nearby storage cells. For this purpose, this memory array of storage cells preferably comprises a) an array of electrically conducting bit lines and electrically conducting word lines which form intersections therebetween, b) a storage cell disposed at each of said intersections, each storage cell comprising at least one reversible magnetic region or layer characterized by a magnetization state which can be reversed by applying thereto a selected external magnetic field, said reversible magnetic layer comprising a material whose magnetization state is more easily reversed upon a change in the temperature thereof, and c) a temperature change generator for changing the temperature of said reversible magnetic layer of only a selected one of said array of storage cells at any moment.

Abstract: A first image data portion and a second image data portion differing from the first image data portion are converted so that they become similar to each other in binary notation. This conversion is performed, for example, by addition. Then, the first and second converted image data portions are transferred so that those converted portions are positioned adjacently to each other in a time-series manner. Finally, after the execution of said transferring step, the first and second image data portions are restored so that those restored portions respectively include original bits. This restoration is performed, for example, by subtraction.

Abstract: A scanning or positioning system with at least two degrees of freedom is provided comprising a supporting base equipped with magnets, a movable platform equipped with at least two electrical coils, and suspension elements providing an elastic connection between the movable platform and the supporting base. The electrical coils are positioned flat on the movable platform, thereby forming an essentially flat arrangement with the movable platform. Combining the flat arrangement with the flat supporting base yields a scanning or positioning system which is potentially compact, lightweight and flat and which features fast response, low power consumption and a relatively large range of motion, e.g. up to 10 mm. The scanning or positioning system with at least two degrees of freedom can be used in the field of scanning probe microscopy or in the field of data storage or imaging.

Abstract: In a DRAM memory circuit, a current sensing amplifier is provided that exploits the low impedance of a reference transistor biased in the sub-threshold regime to enable transfer of a small voltage swing on the bitline to result in a large voltage signal on a low capacitance sense node. Compared to conventional voltage sensing, reduced bitline-bitline coupling noise results because of the small bitline swing, potentially allowing more cells to be served by a sense amplifier because of weak dependence of sense amplifier on bit-line capacitance. Compared to previous current-sensing schemes, this invention allows no idling current. The current-sensing amplifier additionally may be used in conjunction with a hierarchical bitline scheme to further increase the number of cells served by each sense amplifier.

Abstract: A Field effect transistor semiconductor switch in which the channel of same is made from materials having an electrical conductivity which can undergo an insulator-metal transistor (i.e., Mott transition) upon application of an electric field. The channel contains the Mott material in which the charge carriers, either holes or electrons, are strongly correlated. The Mott transition determines the metal-insulator switching and is demonstrated to be controlled by an external gate electrode.

Abstract: A structure and a method of manufacturing a double-gate metal oxide semiconductor transistor includes forming a laminated structure having a single crystal silicon channel layer and insulating oxide and nitride layers on each side of the single crystal silicon channel, forming openings in the laminated structure, forming drain and source regions in the openings, doping the drain and source regions, forming a mask over the laminated structure, removing portions of the laminated structure not protected by the mask, removing the mask and the insulating oxide and nitride layers to leave the single crystal silicon channel layer suspended from the drain and source regions, forming an oxide layer to cover the drain and source regions and the channel layer, and forming a double-gate conductor over the oxide layer such that the double-gate conductor includes a first conductor on a first side of the single crystal silicon channel layer and a second conductor on a second side of the single crystal silicon channel layer.

Abstract: Methods of fabricating metal oxide semiconductor field effect transistor (MOSFET) devices having a high dielectric constant (k greater than 7) gate insulator, low overlap capacitance (0.35 fF/&mgr;m or below) and a channel length (sub-lithographic, e.g., 0.1 &mgr;m or less) that is shorter than the lithography-defined gate lengths are provided. The methods include a damascene processing step and a chemical oxide removal (COR) step. The COR step produces a large taper on a pad oxide layer which, when combined with a high-k gate insulator, results in low overlap capacitance, sort channel lengths and better device performance as compared to MOSFET devices that are formed using conventional Complementary Metal Oxide Semiconductor (CMOS) technologies.

Abstract: A method and structure of forming an integrated circuit chip having a transistor includes forming a conductive oxide layer, forming a Mott transition oxide layer over the conductive oxide layer and forming an insulative oxide layer over the Mott transition oxide layer.

Abstract: In transferring n data bits by the n data lines of an LCD, the n data lines are divided into s blocks each with m data bits (n=m×s). A majority decision is performed on the s blocks and is again performed on the s outputs from the s blocks. With this, a very small-scale and high-speed decision circuit can be realized. As a result, the effects of a reduction in unnecessary radiation by a reduction in the number of data-bit changes, a reduction in power dissipation by a reduction in the number of data-bit changes and the like are obtainable at realizable cost.

Abstract: A liquid crystal display device has first and second substrates, a first electrode layer overlying one surface of the first substrate, and a second electrode layer overlying one surface of the second substrate. A first alignment layer having a thickness of 100 Å or less overlies the first electrode layer, and a second alignment layer overlies the second electrode layer, and a liquid crystal material is disposed between the alignment layers. In one preferred embodiment, the second alignment layer also has a thickness of 100 Å or less, and each alignment layers is a polyimide layer. A method for manufacturing a liquid crystal display device is also provided. According to the method, first and second substrates are provided, a first electrode layer is deposited over the first substrate, and a second electrode layer is deposited over the second substrate.

Abstract: A method and apparatus to determine and correct track spacing during self-servowriting on a rotating recording medium. The recording medium comprising a plurality of tracks, wherein each track comprises a plurality of sectors, and a transducer mounted on an actuator arm pivotally coupled to a voice coil motor (VCM). The actuator arm is positioned by a servo. The method comprising the steps of: servowriting the at least one of the plurality of sectors with a servo pattern consisting of recorded transitions. The servowriting is performed on one more tracks within the sectors where the number of tracks being servowritten is less than total number of tracks that fills the rotating medium. The transducer is positioned relative to the rotating recording medium to a preselected radial position over a previously servowritten area of the rotating recording medium that has one or more previously recorded transitions.

Abstract: A vertical alignment liquid crystal display device capable of a complete contrast compensation, particularly by performing an optical compensation using an optically uniaxial anisotropic sheet and an optically biaxial anisotropic sheet. A retardation of the optically uniaxial anisotropic sheet should have an opposite sign to the retardation of a liquid crystal layer, and absolute value of the retardation of the optically uniaxial anisotropic sheet should be within the range of 75 to 100% of the retardation of the liquid crystal layer. The optically uniaxial anisotropic sheet may be united with a polarizing plate. The optically biaxial anisotropic sheet should have a retardation axis which is parallel to a transmitting axis of any one of the polarizing plates. The optically biaxial anisotropic sheet should exhibit an in-plane retardation of 190 to 390 nm, and exhibit a retardation of 0.28 to 0.67 in its thickness direction.

Abstract: The present invention provides an attachment structure of a display device which enables the outer dimensions to be reduced while maintaining the display area and makes assembling simple. More specifically, the present invention is directed to an attachment structure for a display device for attaching a display device comprising a display part 102 of a shape of a rectangular plate and a frame part 104 arranged in the outer periphery thereof to an external casing 200 having a rectangular opening part 204 formed of a side wall, in which an aperture 106 is formed in at least one of two opposing edges of the frame 104 in the direction parallel to the plane of the display part 102 and the external casing 200 is provided with a pin 218 which is engageable with said aperture 106 and is or is not moveable in the direction parallel to the plane of the display part 102.

Abstract: New arrangement of a vertical field effect transistor and a capacitor together forming a memory cell which in turn may be the basic building block of a memory chip, such as a very high density DRAM. The capacitor's first electrode is connected to the drain of the transistor. The transistor's source is connected to the sources of other transistors, the gate is connected to a word line, and the second electrode of said capacitor is connected to a bit line.

Abstract: An architecture for selectively writing one or more magnetic memory cells in a magnetic random access memory (MRAM) device comprises at least one write line including a global write line conductor and a plurality of segmented write line conductors connected thereto, the global write line conductor being substantially isolated from the memory cells.

Abstract: An apparatus provides optimal on-off contrast ratio in a liquid crystal display panel. The apparatus includes a capacitive temperature sensing device for sensing the temperature of liquid crystal display pixels and having an output voltage according to an applied input voltage and a sensed temperature; a monitoring device including differentiator and sample and hold circuit for obtaining a peak voltage corresponding to a maximum change of the voltage output from the temperature sensing device; and a device for measuring a difference between the peak voltage with a predetermined reference voltage and outputting a signal representing the difference. Heat is consequently applied to the liquid crystal display panel in accordance with a measured temperature difference. Advantageously, the capacitive temperature sensing device is formed as part of the liquid crystal display element.