Patents Represented by Attorney, Agent or Law Firm Marian Underweiser
  • Patent number: 6333067
    Abstract: A method of forming the device, includes selective area deposition of a ferromagnetic material on a substrate. The substrate surface is partially covered with material having a crystal structure having at least one symmetry relation with the crystal structure of the ferromagnetic material.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Nestor A. Bojarczuk, Jr., Peter R. Duncombe, Supratik Guha, Arunava Gupta, Joseph M. Karasinski, Xinwei Li
  • Patent number: 6333543
    Abstract: A structure and method of forming an integrated circuit (e.g., field effect transistor) having a buried Mott-insulated oxide channel includes depositing source and drain electrodes over a substrate forming a Mott transition channel layer over the substrate and electrodes, forming an insulator layer over the Mott transition channel layer, forming source and drain contacts through the insulator layer (such that the source and drain contacts are electrically connected to the Mott transition channel layer) and forming a gate electrode over the insulator layer between the source and drain contacts.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: December 25, 2001
    Assignee: International Business Machines Corporation
    Inventors: Alejandro G. Schrott, James A. Misewich, Bruce A. Scott
  • Patent number: 6331381
    Abstract: A method is disclosed for forming an alignment layer for use in a liquid crystal cell layer for use in a liquid crystal cell using an ion beam source that includes the steps of: (1) providing a substrate having a surface; (2) providing an ion beam source that emanates an ion beam; (3) providing a mask layer disposed between the substrate surface and the ion beam source. The mask layer has at least two openings disposed between the ion beam source and the substrate surface. The shape and position of the openings reduce the irregularity of the beam exposure in a border region on the surface of the substrate resulting from the ion beam source. The present invention may be used in conjunction with substrate treatment using multiple sweeps with a single ion beam source, or with a substrate treatment using a single sweep with multiple ion beam sources. Also disclosed is an apparatus for practicing the disclosed method.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: December 18, 2001
    Assignee: International Business Machines Corporation
    Inventors: Praveen Chaudhari, Eileen Ann Galligan, James Patrick Doyle, James Andrew Lacey, Shui-Chih Alan Lien, Hiroki Nakano, Minhua Lu
  • Patent number: 6329663
    Abstract: According to the invention, a cleaning method and a cleaning apparatus are disclosed for removing organic contaminants on a surface of a color filter without damaging pigment portions of the color filter. The cleaning is performed by using a source of ultraviolet radiation having a wavelength equal to or less than 180 nm (most preferably a wavelength of 172 nm), which does not transmit through the transparent electrodes (e.g., ITO film, IZO film or the like), thereby protecting the pigment portions of the color filter. As a result, the glass substrate can be cleaned by the ultraviolet radiation without discoloring the pigment portions of the color filter and the cleaning effect is increased because the exposure time to the ultraviolet radiation is not limited.
    Type: Grant
    Filed: April 5, 1999
    Date of Patent: December 11, 2001
    Assignee: International Business Machines Corporation
    Inventor: Kazuo Terada
  • Patent number: 6316786
    Abstract: The present invention pertains to new flip-chip organic opto-electronic structures and methods for making the same. The new organic opto-electronic device includes at least two separate parts. Each part comprises an electrode and at least one of these electrodes carries an organic stack. After completion of these separate parts both are brought together to form the complete opto-electronic device. It is a crucial aspect of the new flip-chip approach that spacers are integrated on one or both sides of the parts and that an interface formation process is employed.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: November 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Peter Mueller, Heike E. Riel, Walter Riess, Horst Vestweber
  • Patent number: 6317182
    Abstract: The object of the present invention is to decrease the generation of the reverse twist in the liquid crystal display device of IPS structure to prevent the generation of afterimage, whereby the present invention can improve the response speed and the aperture ratio. In the structure of the electrodes for the IPS mode in which a switching electrode of one polarity and a switching electrode of the other polarity are arranged in parallel and a supplementary capacitor is arranged in non-parallel to the switching electrodes, a shape of an electrode formed at an upper side of the supplementary capacitor differs from a shape of an electrode formed at a lower side of the supplementary capacitor. It is particularly desired that a portion of the upper side electrode is removed which is adjacent to a light transmitting region generating a reverse twist.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: November 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Hidehisa Shimizu, Kaoru Kusafuka, Shinichi Kimura
  • Patent number: 6317186
    Abstract: A method for applying the sealing material onto the corner regions of the substrate to realize the liquid crystal cell with large display region. A protrude region 100 is formed on each of the side regions adjacent to a display region of a first substrate 20. A difference of level is formed at each boundary of the side region and the corner region on one surface of the first substrate 20 for providing the corner region with a height which is lower than a height of the side region. A sealing material 30 is applied on the side regions and the corner regions on the one surface of the first substrate 20 by a tool for dispensing the sealing material 30. When a second substrate 10 is positioned on the applied sealing material 30 on one surface of the first substrate 20, a distance between the first substrate 20 and the second substrate 10 is decreased and the sealing material 30 applied on the first substrate 20 is collapsed.
    Type: Grant
    Filed: December 28, 1998
    Date of Patent: November 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Koichi Miwa, Michikazu Noquchi, Shunji Suzuki, Ho Chong Lee, Donald Philip Seraphim, Dean William Skinner
  • Patent number: 6310713
    Abstract: An illumination system and display are disclosed that include a light for providing light, a polarizing beam splitter (PBS) having a first surface that receives the light from the backlight. The PBS passes a first polarization of the received light to a curved mirror located at a second PBS face, which second PBS face is opposite the first PBS face. The curvature of the mirror provides the optical power necessary for proper imaging, while limiting the reflecting area of the mirror provides an aperture stop that determines the numerical aperture of the optical system. The display also includes a quarter wave plate and a spatial light modulator (SLM). The quarter wave plate is located between the PBS and mirror and changes the first polarization of light, directed from the PBS to the mirror, to a second polarization which is reflected from the mirror back to the PBS.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: October 30, 2001
    Assignee: International Business Machines Corporation
    Inventors: Fuad Elias Doany, Rama Nand Singh
  • Patent number: 6302940
    Abstract: A method and structure for forming magnetic alloy nanoparticles includes forming a metal salt solution with a reducing agent and stabilizing ligands, introducing an organometallic compound into the metal salt solution to form a mixture, heating the mixture to a temperature between 260° and 300° C., and adding a flocculent to cause the magnetic alloy nanoparticles to precipitate out of the mixture without permanent agglomeration. The deposition of the alkane dispersion of FePt alloy particles, followed by the annealing results in the formation of a shiny FePt nanocrystalline thin film with coercivity ranging from 500 Oe to 6500 Oe.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: October 16, 2001
    Assignee: International Business Machines Corporation
    Inventors: Christopher Bruce Murray, Shouheng Sun, Dieter K. Weller
  • Patent number: 6300218
    Abstract: A method of forming a patterned buried oxide film, includes performing an implantation into a substrate, forming a mask on at least portions of the substrate for controlling the implantation diffusion, and annealing the substrate to form a buried oxide. The mask may be selectively patterned. A region that is covered by the mask has a thinner buried oxide than an area which is exposed directly to the annealing ambient.
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: October 9, 2001
    Assignee: International Business Machines Corporation
    Inventors: Guy Moshe Cohen, Devendra Kumar Sadana
  • Patent number: 6299991
    Abstract: A device and a method of forming the device, includes selective area deposition of a ferromagnetic material on a substrate.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: October 9, 2001
    Assignee: International Business Machines Corporation
    Inventors: Nestor A. Bojarczuk, Jr., Peter R. Duncombe, Supratik Guha, Arunava Gupta, Joseph M. Karasinski, Xinwei Li
  • Patent number: 6292246
    Abstract: An active matrix reflective liquid crystal device includes an array substrate which includes switching elements corresponding to pixels and an array of pixel electrodes connected to the switching elements; and an opposing substrate which has a transparent electrode opposite the array of pixel electrodes with a liquid crystal layer inserted therebetween. Each of the pixel electrodes includes an array of electrode studs, (e.g., divided electrode elements). The regions between the electrodes are filled with an insulating material, and the surface of the stud array is planarized by chemical-mechanical polishing (CMP). A dielectric light reflective film is formed on the planarized surface of the stud array, and a liquid crystal molecule alignment film is deposited thereon.
    Type: Grant
    Filed: February 24, 1999
    Date of Patent: September 18, 2001
    Assignee: International Business Machines Corporation
    Inventors: Masami Shinohara, Mitsuru Uda
  • Patent number: 6291353
    Abstract: A method and structure for forming an integrated circuit chip having at least one opening in a substrate includes forming an opening having vertical walls in the substrate, protecting a first portion of the vertical walls of the opening, leaving a second portion of the vertical walls unprotected, and laterally patterning the second portion of the opening to change a shape or property of the opening.
    Type: Grant
    Filed: August 19, 1999
    Date of Patent: September 18, 2001
    Assignee: International Business Machines Corporation
    Inventors: K. Paul Muller, Hon-Sum P. Wong
  • Patent number: 6286100
    Abstract: A method for hiding message information into media information in frequency space. The data hiding method has high resistance to removal or change of message information embedded into media information and effectively maintain hidden message information even when signal processing is performed by employing a frequency filter. More specifically, in order to hide message information (m) into media information (M), the frequency transform of the message information (m) and the media information (M) are performed, and frequency spectra f1 and f2 are obtained. Next, from the frequency spectrum f2 of the message information (m), a region containing feature frequency components representative of the features of the message information (m) in real space is extracted as the base region B. Then, n copies of the base region B are generated, and in frequency space, the n copies are dispersedly arranged.
    Type: Grant
    Filed: August 22, 1997
    Date of Patent: September 4, 2001
    Assignee: International Business Machines Corporation
    Inventors: Norishige Morimoto, Shu Tezuka, Syoiti Ninomiya
  • Patent number: 6284087
    Abstract: The invention is a method for curing a sealant used to affix two substrates to one another. The sealant requires curing by heat or uv photons. To overcome the shadowing caused by metal patterns, the uv light is directed in a path towards said sealant, and a light diffusion element is positioned in the optical path. The diffusion element causes a diffusion of the optical radiation so as to enable some of the diffused optical radiation to avoid the metallization features and to be incident on the sealant. If the sealant is of the dual cure type, the curing thereof is further aided by application of heat.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: September 4, 2001
    Assignee: International Business Machines Corporation
    Inventors: Robert J. von Gutfeld, James H. Glownia
  • Patent number: 6282089
    Abstract: A method (and structure) for cooling a portable computer includes attaching a portable computer to a holder, transferring heat of a heat-generating component disposed within the portable computer to the holder, and releasing the transferred heat to the atmosphere. The portable computer includes a fixture for detachably fixing the portable computer to the holder, a heat release device for releasing heat of a heat-generating component disposed within the portable computer to the outside, and a supporter which supports the fixture and the heat release device.
    Type: Grant
    Filed: February 16, 2000
    Date of Patent: August 28, 2001
    Assignee: International Business Machines Corporation
    Inventors: Tohru Nakanishi, Toshihiko Nishio
  • Patent number: 6271094
    Abstract: Methods of fabricating metal oxide semiconductor field effect transistor (MOSFET) devices having a high dielectric constant (k greater than 7) gate insulator, low overlap capacitance (0.35 fF/&mgr;m or below) and a channel length (sub-lithographic, e.g., 0.1 &mgr;m or less) that is shorter than the lithography-defined gate lengths are provided. The methods include a damascene processing step and a chemical oxide removal (COR) step. The COR step produces a large taper on a pad oxide layer which, when combined with a high-k gate insulator, results in low overlap capacitance, sort channel lengths and better device performance as compared to MOSFET devices that are formed using conventional Complementary Metal Oxide Semiconductor (CMOS) technologies.
    Type: Grant
    Filed: February 14, 2000
    Date of Patent: August 7, 2001
    Assignee: International Business Machines Corporation
    Inventors: Diane Catherine Boyd, Hussein Ibrahim Hanafi, Meikei Ieong, Wesley Charles Natzle
  • Patent number: 6265021
    Abstract: A laminar structure upon a substrate is formed from a) a lattice layer comprising DNA (deoxyribonucleic acid) segments arranged to form cells of the lattice layer, and b), at least one nanoparticle being disposed within each cell of the lattice layer. The nanoparticles are preferably of substantially uniform diameter not exceeding 50 nanometers. A coating may be applied to adhere the particles to the substrate and to maintain their substantially uniform spaced-apart relationship. The DNA lattice layer is fabricated using known automated synthetis methods, and is designed to contain specific nucleotide base sequences which cause the DNA to form an ordered array of openings, or lattice cells, by self-assembly. Self-assembly of the DNA lattice may be at an air-liquid interface, or in solution. A preferred embodiment is a magnetic storage medium in which the particles are magnetic particles with diameters in the range of 5-20 nm.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: July 24, 2001
    Assignee: International Business Machines Corporation
    Inventors: Charles T. Black, Stephen M. Gates, Christopher B. Murray, Shouheng Sun
  • Patent number: 6259114
    Abstract: A method and structure of forming an integrated circuit chip having a transistor includes forming a conductive oxide layer, forming a Mott transition oxide layer over the conductive oxide layer and forming an insulative oxide layer over the Mott transition oxide layer.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: James A. Misewich, Alejandro G. Schrott
  • Patent number: D446518
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventors: Julie Elaine Tierney, Richard Crisp