Abstract: A data-array processing system with a memory for storing an array of data-elements, a processor to perform a series of operations on data elements stored in a first section (832) of the memory and to copy data from the first section to a second section (830) of the memory after each series of operations, and output hardware, such a video processor and monitor, for outputting the data-elements in the second section. In order to reduce unnecessary copying of data-elements from the first section to the second section, the processor sets flags indicative of each of the of portions (e.g. P, Q, R, S) of the first section which is modified during that processing operation, and checks the flags during the subsequent copying operation to copy only the flagged portions.