Patents Represented by Attorney, Agent or Law Firm McGinn & Gibb, P.C.
  • Patent number: 6157067
    Abstract: A semiconductor structure (and method for manufacturing the same) comprises an active array of first elements having a first manufacturing precision, a peripheral region surrounding the active array, the peripheral region including second elements having a second manufacturing precision less than the first manufacturing precision, wherein the second elements are isolated from the active array and comprise passive devices for improving operations of the active array.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: December 5, 2000
    Assignee: International Business Machines Corporation
    Inventors: Louis L. Hsu, Dmitry Netis
  • Patent number: 6157114
    Abstract: A micromechanical signal processing system includes an oscillating member designed to oscillate at a first frequency, a micromechanical pump oscillator being driven so as to oscillate at a second frequency, with the second frequency being greater than the first frequency, and a non-linear coupling element to couple the micromechanical pump oscillator to the oscillating member. These elements are arranged such that energy from the micromechanical pump oscillator is transferred via said non-linear coupling element into the oscillating member to compensate for its losses if the oscillating member oscillates at the first frequency.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: December 5, 2000
    Assignee: International Business Machines Corporation
    Inventors: Gerd K. Binnig, Urs T. Durig, Walter Haberle
  • Patent number: 6154474
    Abstract: In an optical wavelength control apparatus for a laser diode, an optical branching circuit branches a laser beam from the laser diode into first, second, and third branched laser beams. An optical band-pass filter and optical low- and high-pass filters receive the first, second, and third branched laser beams and transmit laser beams having specific optical wavelengths therethrough as transmitted beams. First, second, and third photodiodes convert output beams from these filters into electrical signals and output them as analog voltages. A comparison amplifier compares the analog voltages output from the second and third photodiodes and outputs a comparison result signal. An operational amplifier performs differential amplification of a reference analog voltage from the first photodiode and the output signal from the comparison amplifier, and outputs a control signal. A temperature adjustment element is in tight contact with the laser diode and generates heat, a temperature of which is externally controlled.
    Type: Grant
    Filed: January 4, 1999
    Date of Patent: November 28, 2000
    Assignee: NEC Corporation
    Inventor: Toshiro Yoshida
  • Patent number: 6154291
    Abstract: To provide a device with facsimile function and printer function whose memory will not be full of facsimile data even if print data priority mode is turned ON while facsimile data is being received. While facsimile data is being received or printed (S11,S12), if print data is inputted (S13), facsimile data print discontinuation flag is turned ON (S15). On the other hand, if no print data is inputted (S13), or if the print data priority flag is in the OFF state (S14), program is terminated without shifting to print data priority mode (S16). When the facsimile data is not being received nor printed (S11,S12), if the print data priority flag is in the ON state (S14), the facsimile data print discontinuation flag is turned ON (S15). Then, the print data priority mode is turned ON. If the print data priority flag is in the OFF state (S14), the program is terminated without shifting to the print data priority mode (S16).
    Type: Grant
    Filed: September 12, 1997
    Date of Patent: November 28, 2000
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Kazunobu Asai
  • Patent number: 6152807
    Abstract: A fixture for holding a workpiece in a machining apparatus comprises at least one opening having at least one flexible side for elastically holding the workpiece and a slot adjacent each of the at least one side for allowing the side to flex.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: November 28, 2000
    Assignee: International Business Machines Corporation
    Inventor: Glenn A. Pomerantz
  • Patent number: 6154266
    Abstract: In a method of manufacturing a liquid crystal display device for applying between electrodes lateral electric field in parallel to a substrate to control liquid crystal disposed between first and second substrates, when a rubbing treatment is conducted on an orientation film (15) on a first substrate having gate bus lines (7) and drain bus lines (8), active elements (9) arranged in a matrix form in correspondence with the respective intersection points of the gate and drain bus lines (7, 8), and a common electrode 11 and a pixel electrode 12 which are provided in an interdigital arrangement in each unit pixel portion, the rubbing treatment is conducted twice so that a first rubbing direction (13) set in the first rubbing step is opposite to a second rubbing direction (14) set in the second rubbing step by 180 degrees.
    Type: Grant
    Filed: March 18, 1998
    Date of Patent: November 28, 2000
    Assignee: NEC Corporation
    Inventors: Mamoru Okamoto, Toshiaki Ishiyama
  • Patent number: 6153536
    Abstract: A method for manufacturing a low profile semiconductor chip, includes fabricating a semiconductor device on a semiconductor wafer, grinding, with a grinding tool, a backside of the semiconductor wafer to reduce a thickness thereof, and with the wafer in the grinding tool, providing a support structure on the ground backside of the wafer.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: November 28, 2000
    Assignee: International Business Machines Corporation
    Inventors: Donald W. Brouillette, Ronald L. Mendelson
  • Patent number: 6154348
    Abstract: A magnetoresistive head includes a first ferromagnetic layer and a non-magnetic material layer adjacent to a center portion of the first ferromagnetic layer. A second ferromagnetic layer is provided adjacent to the non-magnetic metal layer. An anti-ferromagnetic layer covers the second ferromagnetic layer and the first ferromagnetic layer. The anti-ferromagnetic layer is non-planar at an area adjacent to the non-magnetic metal layer and the second ferromagnetic layer. A pair of electrodes is provided adjacent to the two edges of the anti-ferromagnetic layer.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: November 28, 2000
    Assignee: NEC Corporation
    Inventor: Tetsuhiro Suzuki
  • Patent number: 6149047
    Abstract: In a die-bonding machine for picking up a number of semiconductor pellets arranged in the form of a pellet array, one by one, to place a picked-up semiconductor pellet on a predetermined position, when an estimated X-direction coordinate position of the semiconductor pellet to be picked up in relation to the pellet supporting and displacing mechanism is assumed as being "x" by considering a center point of the pellet supporting and displacing mechanism as the origin of the coordinates in the X direction, the pellet supporting and displacing mechanism and the pellet picking-up and carrying mechanism are displaced so that an X-direction coordinate position PX of the pick-up position takes a position expressed by the following equation (1) and an X-direction coordinate position CX of the center point of the pellet supporting and displacing mechanism takes a position expressed by the following equation (2):PX=Ax (1)CX=-(1-A)x (2)where 0<A<1.
    Type: Grant
    Filed: June 23, 1999
    Date of Patent: November 21, 2000
    Assignee: NEC Corporation
    Inventor: Norio Oda
  • Patent number: 6150212
    Abstract: A method for forming an isolation trench region in a semiconductor substrate includes providing the trench region in the semiconductor substrate, adding spacer material at least to sidewalls of the trench region, and etching the trench region at a bottom surface thereof to extend the trench region below the bottom surface and form a crevice region. The spacer material may be subsequently heated such that the spacer material flows from the sidewalls and into the crevice region.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: November 21, 2000
    Assignee: International Business Machines Corporation
    Inventors: Ramachandra Divakaruni, Jeffrey P. Gambino, Jack A. Mandelman, Carl J. Radens, William R. Tonti
  • Patent number: 6150707
    Abstract: The present invention provides a method for fabricating a capacitor within a semiconductor device comprising the steps of forming openings in an oxide dielectric to reach a lower conductor layer which will serve as a lower conductor plate of the capacitor; depositing capacitor electrode material, such as tungsten to fill the openings to form a capacitor electrode and planarizing the filled openings using chemical/mechanical polish; depositing a selected oxide capacitor dielectric over the capacitor electrodes and patterning the capacitor dielectric with photoresist to leave dielectric covering the area of the capacitor electrodes; stripping away the photoresist; adding an upper conductor layer on top of the capacitor dielectric to serve as the top plate of the capacitor. The above steps may be repeated to form multiple layers of capacitors within the semiconductor device.
    Type: Grant
    Filed: January 7, 1999
    Date of Patent: November 21, 2000
    Assignee: International Business Machines Corporation
    Inventors: Robert K. Cook, Craig R. Gruszecki, Mark A. Passaro, Frederick A. Scholl
  • Patent number: 6150684
    Abstract: A thin-film capacitor having a perovskite-structured polycrystalline oxide thin-film as its dielectric, that exhibits an excellent insulation property is provided. This capacitor comprises a perovskite-structured, polycrystalline oxide thin-film, and top and bottom electrodes located at each side of the thin-film The perovskite-structured, polycrystalline oxide thin-film has a general formula of ABO.sub.3, where A is at least one element selected from the group consisting of bivalent metallic elements, lead, and lanthanum, and B is at least one element selected from the group consisting of quadrivalent metallic elements. A ratio of (A/B) is in a range from 1.1 to 2.0. The oxide thin-film has granular crystal grains. The perovskite-structured, polycrystalline oxide thin-film is formed by forming a perovskite-structured, amorphous oxide thin-film and by crystallizing the perovskite-structured, amorphous oxide thin-film due to heat treatment.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: November 21, 2000
    Assignee: NEC Corporation
    Inventor: Shuji Sone
  • Patent number: 6151256
    Abstract: A semiconductor integrated circuit device includes a main memory portion and a sub memory portion including a plurality of memory cell groups, wherein a bi-directional data transfer is performed between an arbitrary area of the main memory portion and each of the plurality of the memory cell groups and the plurality of the memory cell groups function as independent cache memories, respectively. Therefore, the semiconductor integrated circuit device of the present invention has a main memory suitable for being accessed from a plurality of data processors.
    Type: Grant
    Filed: October 20, 1999
    Date of Patent: November 21, 2000
    Assignee: NEC Corporation
    Inventors: Taketo Maesako, Kouki Yamamoto, Yoshinori Matsui, Kenichi Sakakibara
  • Patent number: 6148000
    Abstract: A switching apparatus (and method and program storage device for storing the method) for receiving and transmitting data units each segmented into a series of cells of data, including a first cell and a last cell, each cell of a series including a label common to all cells of said series, includes at least one incoming port for receiving cells of a plurality of series at each incoming port, at least one outgoing port for transmitting cells out of the apparatus with an outbound label, a storage device for storing a series of cells received at each incoming port until the last cell of the series is received, and, a device for transmitting each of the series of cells sequentially from the first cell to the last cell from the storage device to a selected outgoing port. Each cell of each series has an outbound label common to all cells of the series, and all cells of each of the series are transmitted before transmitting any cells of other series having the same outbound label.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: November 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Nancy Karen Feldman, Arun Viswanathan, Richard M. Woundy, Richard H. Boivie
  • Patent number: 6148276
    Abstract: A diffusion simulating method which is capable of defining an impurity flux even if one impurity in one material region is changed into plural types of impurities in the other material region on a material interface. For simulating the diffusion of the impurities in a system which includes a first material region, a second material region and a interface disposed between the first material region and the second material region, impurity flux J(i.sub.A,j.sub.B) on the A/B interface is defined between optional impurity i.sub.A in material region A and optional impurity j.sub.B in material region B. Then, total fluxes J.sup.total (i.sub.A), J.sup.total (j.sub.B) of each type of impurity are determined and added to impurity diffusion equations, and simultaneous equations are set up by these diffusion equations and solved.
    Type: Grant
    Filed: September 17, 1998
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventor: Hironori Sakamoto
  • Patent number: 6147556
    Abstract: The present invention provides a solid-state image sensor comprising a source follower amplifier on a single chip capable of preventing a gain loss caused by a back gate effect.In the solid-state image sensor including multi-stage single-chip source follower amplifier, one stage of the multi-stage source follower amplifier has a load transistor 5 whose source and gate are connected to an output signal 3 via a capacitor 7, and a DC voltage 6 is applied via a resistor 8 having a high resistance.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventor: Takashi Nakano
  • Patent number: 6147898
    Abstract: There is disclosed an SRAM including a number of memory cells located in the form of a matrix. When data "0" is written to a memory cell 100, a precharge signal PC is brought to a high level so that a bit line D0 is brought into an electrically floating condition. A corresponding power switch 30 is turned off so that a pseudo-ground line SS0 is brought to an electrically floating condition. A corresponding equalizing transistor 20L is turned on so that the bit line having a power supply voltage Vdd as an initial potential and the pseudo-ground line SS0 having a ground voltage Vss as an initial potential are electrically connected to each other, so that the potential of the pseudo-ground line SS0 is elevated to a potential Veq which is determined by a ratio in capacitance of the bit line and the pseudo-ground line.
    Type: Grant
    Filed: March 8, 1999
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventor: Takashi Yamada
  • Patent number: 6148362
    Abstract: The microcomputer according to the present invention is prepared with differing address space for use during normal operations and during rewrite control, whereby, when modifying a rewrite control program, the production of new user code/data can be avoided for cases in which there are actually no modifications of the user code/data. In other words, the microcomputer switches between user ROM during normal operation and rewrite control ROM during rewrite control, and user code/data and rewrite control program are arranged in differing address space.
    Type: Grant
    Filed: May 20, 1998
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventor: Katsuichi Sagi
  • Patent number: 6146755
    Abstract: A storage device and a method of forming a storage device, includes depositing a metal layer on a substrate, and oxidizing the metal layer to form an oxide with a rutile structure on which a ferromagnetic material is selectively grown. The substrate may be substantially formed of either SiO.sub.2, Si.sub.3 N.sub.4, or a compound of SiO.sub.2 and Si.sub.3 N.sub.4. In another method, a method of forming a magnetic device, includes one of seeding a surface with one of Ti, Sn, and Ru islands having nanometer dimensions, and by exposing nanometer scale areas of the one of Ti, Sn, and Ru on a substrate, and coating the one of Ti, Sn, and Ru, with a ferromagnetic material. The surface may be substantially formed of either SiO.sub.2, Si.sub.3 N.sub.4, or a compound of SiO.sub.2 and Si.sub.3 N.sub.4. Similarly, the substrate may be substantially formed of either SiO.sub.2, Si.sub.3 N.sub.4, or a compound of SiO.sub.2 and Si.sub.3 N.sub.4.
    Type: Grant
    Filed: October 15, 1998
    Date of Patent: November 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Supratik Guha, Arunava Gupta
  • Patent number: 6147822
    Abstract: An image display device of the present invention comprises a light converting means which converts picture signals into light beams, and a light beam scanning means which scans by beams. The light beam scanning means is provided with an x-axis optical scanner and a y-axis optical scanner each of which has a moving mirror and an excitation means. The moving mirror reflects a light beam from a light source in cascade, reflection directions being subjected to a perpendicular resonance rotation oscillation with each other because of a light beam scanning, each resonant rotation oscillation having a resonance frequency which is the same with or close to the other and being phase shifted by 90.degree. with respect to the other while having a predetermined oscillation ratio.
    Type: Grant
    Filed: July 10, 1998
    Date of Patent: November 14, 2000
    Assignee: NEC Corporation
    Inventors: Keizo Yamada, Toshihide Kuriyama