Abstract: To provide a liquid crystal display device easily produced having no disclination which causes a light leak, an excellent visual angle and an excellent contrast ratio, a liquid crystal layer is interposed between two substrates, two or more of micro areas coexist with each other in the liquid crystal layer, and liquid crystal molecules in the micro areas build up from a center of each pixel. A potential of a second electrode disposed on an opening is made approximately identical with that of a counter electrode, and a potential of a peripheral electrode is higher than that of the counter electrode, thereby obtaining the liquid crystal display device in which the liquid crystal molecules build up from the center of each pixel. Thus, the liquid crystal display device easily produced having a wide visual angle and an excellent contrast ratio is obtained. In addition, a polymer organic compound is dispersed in the liquid crystal to fix a built up direction of the liquid crystal molecules.
Abstract: A write circuit outputs a write con and to a memory cell in response to a data input signal. A decoder decodes an address input signal and outputs an address command to the memory cell. A counter outputs a signal to the decoder, the signal delaying decode timing in response to a control signal inputted at the time of a burn-in test. Therefore, the counter cancel a late write cycle by delaying an operation cycle of the decode timing against an operation cycle of a write command signal from the write circuit that is transmitted to the memory cell.
Abstract: A global clock forming circuit for forming a global clock signal is set up on an LSI, and global clock signal is distributed on LSI by the double global clock distribution circuits cycled on the LSI in parallel with and in the inverse direction to one another. Based on the time point at the middle point of the transition point of each of the two clock signals transmitted by the global clock distribution circuit, the local clock signals are generated by the local clock generating circuits 4-(i+1), 4-(i+2), 4-j, 4-(k+1), 4-(l+1). The resulting local clock signals are distributed by the local clock distribution circuits 5-(i+1), 5-(i+2), 5-j, 5-(k+1), 5-(l+1). By this procedure, the clock signal distribution circuit can distribute low skew and high speed clock signals on a large scale integrated circuit.
Abstract: A method of forming a trench capacitor comprises steps of forming a trench in a substrate, partially filling the trench with a first conductive material, lining a portion of the trench above the first conductive material with a collar material, etching the collar material to a strap depth below a top of the trench, and filling the trench with a second conductive material, wherein a portion of the second conductive material positioned between the strap depth and the top of the trench comprises a buried strap.
Type:
Grant
Filed:
August 19, 1998
Date of Patent:
August 29, 2000
Assignees:
International Business Machines Corporation, Siemens Microelectronics, Inc.
Inventors:
Gary B. Bronner, Carl J. Radens, Juergen Wittmann
Abstract: A solid state image pick-up device is disclosed in which potential wells formed between adjacent ones of charge transfer electrodes of a vertical charge transfer portion thereof, formed between adjacent ones of charge transfer electrodes of a horizontal charge transfer portion and formed in a connecting region between the vertical and horizontal charge transfer portions are uniformalized. Impurity densities of regions between the charge transfer electrodes of the vertical charge transfer portion thereof, between the charge transfer electrodes of the horizontal charge transfer portion and in a connecting region between the vertical and horizontal charge transfer portions are set independently from each other on the basis of the inter-electrode distances and amplitudes and potentials of driving pulses supplied these electrodes such that these potential wells become equal to each other.
Abstract: A laser welding apparatus 10 according to the present invention comprises: a laser output mechanism 1 for applying a welding laser beam from its output end to a welding position of an object to be welded; and a plurality of jet nozzles for blowing out a shield gas to the welding position for preventing oxidation of the welding position, wherein the jet nozzles are arranged at an identical angle interval on a single circumference H around the welding laser beam. This enables to perform welding into a sufficient depth and width.
Abstract: A patterned mask and method of forming a patterned mask over a substrate, comprising forming a first resist layer over the substrate, forming a second resist layer over the first resist layer, patterning the first resist using energy selective to the first resist layer to form a first patterned resist, and patterning the second resist using energy selective to the second resist layer to form a second patterned resist, wherein the first patterned resist and the second patterned resist form the patterned mask.
Type:
Grant
Filed:
January 4, 1999
Date of Patent:
August 29, 2000
Assignee:
International Business Machines Corporation
Inventors:
Michael S. Hibbs, Timothy E. Neary, David S. O'Grady, Denis M. Rigaill
Abstract: A region-of-interest (ROI) setting apparatus for respiration monitoring and a respiration monitoring system capable of setting an ROI in an automatic manner. Absolute values of subtractions between every successive two of a plurality of frame images photographed by a CCD camera 2 for a period of time equal to half a respiration period are calculated, then summed and stored. Based on the change information thus calculated and stored, the position and size of each changed region is calculated. Provisional regions are set from the changed regions successively from the greatest to the smallest one thereof. In each of these provisional regions, it is determined whether a gray level histogram indicative of distribution of the number of pixels for respective gray level values includes a twin peak characteristic having twin peaks each equal to or higher than a predetermined value, and whether the area of the corresponding changed region is equal to or greater than a predetermined value.
Abstract: A chemical mechanical polishing apparatus comprises a delivery system for supplying a slurry, wherein the slurry includes suspended particles and at least one acoustic element, connected to the delivery system, the acoustic element generating sound waves for agitating the slurry and maintaining the particles in suspension.
Type:
Grant
Filed:
July 16, 1998
Date of Patent:
August 22, 2000
Assignee:
International Business Machines Corporation
Abstract: A communication apparatus of the present invention has a hands-free communication capability and is applicable to, but not limited to, a motor vehicle. Only if the apparatus is connected to, e.g., an on-board cigar-lighter, hands-free communication can be held. This eliminates the need for a hands-free unit, an outside microphone and other extra parts conventionally mounted on the vehicle to implement a hands-free feature.
Abstract: Given compressed video which supports the coding of interlaced frames through DCT and motion compensation, different construction methods are applied based on select DCT domain coefficients and/or motion vector informations to produce spatially reduced images without decompressing. The spatially reduced images can then be used for video browsing, authoring and processing purposes.
Type:
Grant
Filed:
June 12, 1997
Date of Patent:
August 22, 2000
Assignee:
International Business Machines Corporation
Abstract: A semicomductive memory device has a memory cell connected to a word line and a digit line. The memory cell is for memorizing data of two bits in correspondence to first through fourth threshold voltages. The first threshold voltage is lower than the second threshold voltage which is lower than the third threshold voltage. The third threshold voltage is lower than the fourth threshold voltage. The semicomductive memory device has a supplying section for selectively supplying first through third read-out voltages with the word line. The first read-out voltage has a value between the first and the second threshold voltages. The second read-out voltage has a value between the second and the third threshold voltages. The third read-out voltage has a value between the third and the second threshold voltages. The supplying section supplies the second read-out voltage to the word line at first.
Abstract: An output buffer circuit includes an input terminal for inputting an externally supplied signal voltage into the output buffer circuit, a first transistor having a first current path, a first voltage being applied to one end of he first current path, a second transistor having a second current path, one end of the second current path being connected to the other end of the first current path and a second voltage being applied to the other end of the second current path, a first comparing circuit for comparing the signal voltage applied from the input terminal with a voltage appearing across the first transistor and second transistor and subdivided by both the first and second transistors, a second comparing circuit for comparing a reference voltage with the voltage appearing across the first transistor and the second transistor and subdivided by both the first and second transistors, a control circuit for supplying a control signal to control terminals of the first and second transistors based upon comparison
Abstract: A method and system for communicating between a calling party and a called party, includes a dialer for dialing a communication device of a called party, a sensor for sensing whether a voice menu file is associated with the communication device of the called party, and an interactive display for displaying the voice menu file when the sensor senses the voice menu file.
Type:
Grant
Filed:
January 29, 1999
Date of Patent:
August 15, 2000
Assignee:
International Business Machines Corporation
Abstract: In a non-volatile semiconductor memory device making electrical writing and erasing possible, source diffusion layers arranged on a substrate and along at least control gate electrodes have, in one part thereof, inclined portions having an angle larger than an ion implantation angle. According to this, device isolation technique is used to lower the resistance of the source diffusion layer.
Abstract: A cap adaptable to the prevention of the application tip body of a liquid container from being dried up by supplying a vaporized solvent thereto, characterized in that it is configured in such a manner that its supply of solvent is difficult to obstruct.When the cap is attached to the liquid container, since the tip of the brush of the liquid container is inserted into the inside space of the inner cap and the tip fitting of the liquid container biases the opening/closing member toward the innermost portion of the cap body against the energizing force of the spring, the transverse hole of the cylindrical portion communicates with the innermost portion of the cap body, which allows the vaporized solvent out of the solvent-impregnation medium to pass through the transverse hole, the longitudinal hole and the solvent passage, and around the flange portion of the inner cap, thus the solvent reaches the brush of the liquid container, as a result, the brush is moistened and prevented from being dried up.
Abstract: A semiconductor integrated circuit device is comprised a main memory portion constructed with memory cells arranged in a plurality of rows and in a plurality of columns, a sub memory portion constructed with a plurality of memory cells arranged in a plurality of rows and in a plurality of columns and a bi-directional data transfer circuit for connecting the main memory portion and the sub memory portion through data transfer bus lines, respectively, wherein the data transfer bus lines in a memory cell area of the main memory portion are arranged in parallel to bit lines in a column direction and connected to the bit lines through a column selection circuit. Therefore, the semiconductor integrated circuit device of the present invention has a main memory suitable for being accessed from a plurality of data processors.