Abstract: In a provided LCD device, a common electrode and a picture element electrode which make up the main portion of a unit picture element of the LCD device are both made up of one thin conductive layer made of a Cr layer, while a common electrode wiring line and a data line or a like which are connected to the common electrode and the picture element electrode respectively are each formed as a stacked film made up of a first conductive film (thick Cr layer) and a second conductive film (thin Cr layer). This configuration enables increasing the film thickness of wiring lines such as, especially, the common electrode wiring line and the data line or the like, thus decreasing a wiring line resistance thereof.

Abstract: A rotation angle detecting device and a torque detecting device, which can prevent waveforms to be outputted from a plurality of semiconductor MR elements, from dispersing due to the material difference of a semiconductor wafer. A plurality of semiconductor MR elements are formed over a common cell of a semiconductor wafer and are arranged to confront at such positions different from each other in a target circumferential direction with respect to corresponding input and output shafts that signals to be outputted according to the rotations of the input and output shafts to be detected may establish a predetermined phase difference in an electrical angle.

Abstract: A noise figure (NF) of an outdoor receiver amplifier and a loss in a feeder are automatically computed to report a correct level of received total wideband power (RTWP). A received signal code power (RSCP) value and a bit error rate (BER) value are computed by demodulating in a wireless portion of a wireless base station system a pilot signal generated in the outdoor receiver amplifier, and the feeder loss and the NF value are computed in a detection portion from the RSCP value and the BER value. Further, a received total wideband power value (RTWP value) including a value relating to the NF value is reported to a host unit by an RTWP processing portion.

Abstract: A method (and resulting structure) for fabricating a silicide for a semiconductor device, includes depositing a metal or an alloy thereof on a silicon substrate, reacting the metal or the alloy to form a first silicide phase, etching any unreacted metal, depositing a silicon cap layer over the first silicide phase, reacting the silicon cap layer to form a second silicide phase, for the semiconductor device, and etching any unreacted silicon. The substrate can be either a silicon-on-insulator (SOI) substrate or a bulk silicon substrate.

Abstract: A high frequency switch circuit including high frequency terminals which input/output a high frequency signal, high frequency semiconductor switch sections which are arranged on lines coupling the high frequency terminals, a DC potential isolating circuit which isolates the plurality of high frequency semiconductors switch sections from each other in a DC state, and DC potential transmission sections. Each DC potential transmission section couples a control side of an associated high frequency semiconductor switching section to at least one of an input side and an output side of another one of the plurality of high frequency semiconductor switch sections.

Abstract: A clock controlling circuit and method for eliminating the delay difference in the entire clock propagation line. Circuit scale is reduced as compared to a case of using a PLL or DLL circuit. A timing averaging circuit 10 is fed with clocks from a position on a forward route 111 of a direction-reversed clock propagation path, adapted for being fed with input clocks at its one end, and from a position on a return route 112 corresponding to the position on the forward route 111. The timing difference between these clocks is averaged to output an averaged timing difference.

Abstract: The invention provides a method of manufacturing a fin-type field effect transistor (FinFET) that forms a unique FinFET that has a first fin with a central channel region and source and drain regions adjacent the channel region, a gate intersecting the first fin and covering the channel region, and a second fin having only a channel region.

Abstract: The rotation angle detecting device includes a target of a spur gear shape made rotatable together with a rotary member and having a plurality of teeth of magnetic members protruding at a substantially equal pitch in the circumferential direction of the axis of the rotary member, and magnetic sensors arranged at positions to confront the teeth for outputting output signals according to the rotation of the rotary member. This device detects the angle of rotation of a rotary member with the output signals from the magnetic sensors. In the target of the spur gear shape, moreover, the two circumferential end portions of the crests of all the teeth are formed into angular portions.

Abstract: A system-on-a-chip integrated circuit structure includes a bridge having a plurality of channels, a processor local bus connected to the bridge (wherein the bridge includes a first channel dedicated to the processor local bus), at least one logic device connected to the processor local bus, a peripheral device bus connected to the bridge (wherein the bridge includes a second channel dedicated to the peripheral device bus), at least one peripheral device connected to the peripheral device bus, at least one memory unit connected to the bridge (wherein the bridge includes a third channel dedicated to the memory unit), and at least one input/output unit connected to the bridge (wherein the bridge includes a fourth channel dedicated to the input/output unit).

Abstract: The invention provides a method of modifying a hierarchical integrated circuit layout wherein the locations of hierarchical layout elements are represented with variables and formulae using these variables, which produces a formula-based hierarchical layout. These variables are constrained to be integers. The invention provides for a method for guiding the modification of the layout through an objective function defined on the same variables as the formula-based hierarchical layout. The invention simplifies the formula-based hierarchical layout by substituting constants for some of the variables, such that each of the formulae are reduced to expressions involving no more than two remaining variables. This produces a simplified layout equation and a simplified objective function. This also produces a partial solution to the hierarchical layout modification made up of the values selected for the constants.

Abstract: A structure and method of manufacturing a double-gate integrated circuit which includes forming a laminated structure having a channel layer and first insulating layers on each side of the channel layer, forming openings in the laminated structure, forming drain and source regions in the openings, removing portions of the laminated structure to leave a first portion of the channel layer exposed, forming a first gate dielectric layer on the channel layer, forming a first gate electrode on the first gate dielectric layer, removing portions of the laminated structure to leave a second portion of the channel layer exposed, forming a second gate dielectric layer on the channel layer, forming a second gate electrode on the second gate dielectric layer, doping the drain and source regions, using self-aligned ion implantation, wherein the first gate electrode and the second gate electrode are formed independent of each other.

Abstract: Disclosed is an on-chip test device for testing the thickness of gate oxides in transistors. A ring oscillator provides a ring oscillator output and an inverter receives the ring oscillator output as an input. The inverter is coupled to a gate oxide and the inverter receives different voltages as power supplies. The difference between the voltages provides a measurement of capacitance of the gate oxide. The difference between the voltages is less than or equal to approximately one-third of the difference between a second set of voltages provided to the ring oscillator. The capacitance of the gate oxide comprises the inverse of the frequency of the ring oscillator output multiplied by the difference between the voltages, less a capacitance constant for the test device. This capacitance constant is for the test device alone, and does not include any part of the capacitance of the gate oxide. The measurement of capacitance of the gate oxide is used to determine the thickness of the gate oxide.

Abstract: A semiconductor memory device includes a first insulating film provided on a semiconductor substrate between first and second diffusion regions, a first gate electrode provided on the first insulating film, a second insulating film provided on the semiconductor substrate between the second diffusion region and a third diffusion region, and a second gate electrode provided on the second insulating film. The first and second diffusion regions, first insulating film, and first gate electrode constitute a first memory cell, while the second and third diffusion regions, second insulating film, and second gate electrode constitute a second memory cell. The first and second gate electrodes are connected in common to form a word line electrode. The first and third diffusion regions are connected to first and second read bit lines. The second diffusion region is connected to a program and erase bit line.

Abstract: In a detecting apparatus for detecting a steering state at a steering member (1) by respectively providing targets (34 and 35) in the shape of a spur gear having teeth portions (34a and 35a) to an input shaft (32) connected to the steering member and an output shaft (33) connected to the input shaft (32) by interposing a torsion bar (31), when an allowable maximum value of rotational torque applied to the steering member is designated by notation T, a number of teeth Z of the teeth portions (34a and 35a) and a spring constant K of the torsion bar (31) are determined to satisfy the following inequality, 360(deg)/Z>T(Nm)/K(Nm/deg).

Abstract: A reflective or semi-transmissive type LCD device reduces a moiré generated by the irregularity pattern of the reflector plate of the LCD panel. A front light has an optical guide plate in which prism grooves are arranged in an arrangement direction. The pattern of the reflector plate is formed by blocks, each of which includes a basic irregularity pattern for one pixel or its element, and (N?1) modified basic irregularity pattern or patterns each formed by modifying the basic irregularity pattern. All the basic irregularity patterns in each block are arranged in a direction perpendicular to the arrangement direction. The basic irregularity pattern is continuous at either end thereof in the arrangement direction. The basic irregularity pattern is divided in the arrangement direction into N sub-patterns. Each of the (N?1) modified basic irregularity patterns is formed by the N sub-patterns circularly shifted one by one.

Abstract: Method and apparatus suitable for demand forecasting. The invention can enable sales forecasting “by item, by size, by location”. The invention features combining a demand profile and a demand model into a single encompassing model which is capable of projecting demand for an identified set of merchandise.

Abstract: A method for improving TCP throughput over lossy communication links without affecting performance over non-lossy links comprises determining lookahead-loss which is the number of lost packets in a given loss-window; using the loss-window and lookahead-loss to detect congestion in the communication links; and controlling transmission under congestion conditions and under normal conditions, wherein the controlling transmission comprises controlling a size of the loss-window by beginning in a slow-start phase; advancing to a congestion avoidance phase when a slow-start threshold is reached; entering a halt growth phase when the first level of packet loss has been recovered; returning to the congestion avoidance phase when a first level of packet recovery occurs; entering a k-recovery phase when a second level of packet loss occurs. The loss window and slow-start threshold are reduced in half and returned to the congestion avoidance phase when the second level of packet loss has been recovered.

Abstract: The use of software-based agents to act on behalf of human bidders for dynamic participation in multiple simultaneous online auctions is disclosed. The software-based agents may reside on computer systems or on any type of stationary or mobile terminal. On the basis of bidding-related information from a bidder, a software agent selects a plurality of auctions to place bids in. Upon being outbid, the agent determines whether to place an additional bid in a further auction. The agent can make such a determination on the basis of maximising profitability or surplus.