Patents Represented by Attorney McGinn & Gibb, PLLC
  • Patent number: 6953726
    Abstract: Disclosed is a method and structure for forming a split-gate fin-type field effect transistor (FinFET). The invention produces a split-gate fin-type field effect transistor (FinFET) that has parallel fin structures. Each of the fin structures has a source region at one end, a drain region at the other end, and a channel region in the middle portion. Back gate conductors are positioned between channel regions of alternating pairs of the fin structures and front gate conductors are positioned between channel regions of opposite alternating pairs of the fin structures. Thus, the back gate conductors and the front gate conductors are alternatively interdigitated between channel regions of the fin structures.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: October 11, 2005
    Assignee: International Business Machines Corporation
    Inventors: Edward J. Nowak, BethAnn Rainey
  • Patent number: 6954418
    Abstract: A plurality of light receiving detectors receive a plurality of segments of a beam returning from an optical disc when a reading beam of light is radiated to the optical disc. An optical pickup assembly produces a plurality of signals from the beam segments in accordance with, for instance, optical intensities of the beam segments. A level adjusting circuit adjusts signal levels of these signals such that each of the signal levels of the signals becomes equal to a reference level. The reference level is determined from at least one of the signal levels of the received beam segments.
    Type: Grant
    Filed: February 7, 2002
    Date of Patent: October 11, 2005
    Assignee: Pioneer Corporation
    Inventors: Naoharu Yanagawa, Masahiro Kato, Tatsuhiro Yone, Yuko Muramatsu, Shinji Suzuki
  • Patent number: 6954604
    Abstract: The invention provides an electronic photographing apparatus using a two-component developer as a mixture of a toner and a carrier as well as a development unit including a developer roll having magnetic poles therein. The electronic photographing apparatus includes a development bias power source for applying to the developer roll a development bias voltage where an AC voltage is superimposed on a DC voltage. The electronic photographing apparatus develops a latent image on a photosensitive body by using toner to form an image, characterized in that the ratio of the volume of the carrier to a space sandwiched between the developer roll and the photosensitive body is set within a range from 32 percent to 46 percent and that that the resistivity of the carrier under a field strength of 2000 V/cm is set to 3×1010 ?cm or more.
    Type: Grant
    Filed: January 29, 2004
    Date of Patent: October 11, 2005
    Assignee: Ricoh Printing Systems, Ltd.
    Inventors: Hisao Okada, Masayoshi Nakayama
  • Patent number: 6951784
    Abstract: Presented is a three-mask method of constructing the final hard mask used for etching the silicon fins and the source/drain silicon regions for FinFETs, and silicon mesas for non-FinFET devices such as resistors, diodes, and capacitors. More specifically, a first mask is used to create a mandrel; a second mask is used to pattern the mandrel's sidewall spacers; and a third mask is used to pattern the box-shaped structures that are connected by one of the sidewall spacers. An alignment of the gate conductor to the box-shaped structures is provided.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: October 4, 2005
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Edward J. Nowak
  • Patent number: 6952509
    Abstract: In the WDM optical transmission, optical signals propagated through an optical transmission line are supplied to a circulator of a wavelength dispersion compensator. The optical signals supplied to an input terminal of the circulator are transmitted to an input and output terminal of the circulator, and inputted to fiber gratings of the reflection type. The optical signals having a specified wavelength is reflected by one of the fiber gratings, again inputted to the input and output terminal of the circulator, and transmitted to the output terminal of the same. Since the incident optical signals are reflected by the fiber gratings situated at different positions, there arises the difference in the time spent in traveling to and from the fiber grating between the optical signals. Accordingly, the wavelength dispersions of the optical signals can be compensated by suitably selecting the positions of the fiber gratings.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: October 4, 2005
    Assignee: NEC Corporation
    Inventor: Satoshi Ishii
  • Patent number: 6952582
    Abstract: In a mobile communication system which comprises a mobile station (1), a radio network (2) for radio transmission and reception to and from the mobile station, a home location register (HLR) (4) for managing, through a mobile services-switching center (3), current location information representative of a current location of the mobile station in a public telephone network, and a home agent (HA) (7) for managing, through a packet gateway (6), current location information representative of a current location of the mobile station in a packet data communication network, the home location register and the home agent are connected to each other through a communication channel (15) for transmission of update contents for the current location information managed by the home location register and the home agent.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: October 4, 2005
    Assignee: NEC Corporation
    Inventor: Kiyokazu Murai
  • Patent number: 6952700
    Abstract: A method and system is provided for integrating multiple feature spaces in a k-means clustering algorithm when analyzing data records having multiple, heterogeneous feature spaces. The method assigns different relative weights to these various features spaces. Optimal feature weights are also determined that lead to a clustering that simultaneously minimizes the average intra-cluster dispersion and maximizes the average inter-cluster dispersion along all the feature spaces. Examples are provided that empirically demonstrate the effectiveness of feature weighting in clustering using two different feature domains.
    Type: Grant
    Filed: March 22, 2001
    Date of Patent: October 4, 2005
    Assignee: International Business Machines Corporation
    Inventors: Dharmendra Shantilal Modha, William Scott Spangler
  • Patent number: 6950165
    Abstract: An in-plane switching mode liquid crystal display device includes a substrate, a scanning line formed on the substrate, a data line formed above the substrate to cross the scanning line while interposing an insulation film between the data line and the scanning line, and a transparent common electrode interconnect line located farther the substrate than the scanning line and the data line and having a width longer than those of the scanning line and the data line, and further, formed to geometrically cover the scanning line and the data line. The construction of the device makes it possible to make all electric fields from the data line and the scanning line terminate on the common electrode interconnect line. Forming the common electrode interconnect line with a transparent conductive material maintains the aperture ratio of the device.
    Type: Grant
    Filed: March 27, 2003
    Date of Patent: September 27, 2005
    Assignee: NEC LCD Technologies, Ltd.
    Inventors: Kimikazu Matsumoto, Kunimasa Itakura, Shinichi Nishida
  • Patent number: 6949832
    Abstract: An interconnect trench is formed on a dielectric layer 12 and a first HSQ layer 14 formed on a semiconductor substrate, and a tantalum family barrier metal layer 24a is formed all over the substrate. Then a seed copper-containing metal layer 60 and a plated copper layer 62 are formed so as to fill a part of the interconnect trench. After that, a bias-sputtered copper-containing metal layer 64 is formed on the plated copper layer 62 so as to fill the remaining portion of the interconnect trench and then heat treatment is performed. As a result, a dissimilar metal contained in the bias-sputtered copper-containing metal layer 64 diffuses uniformly into the plated copper layer 62.
    Type: Grant
    Filed: July 7, 2003
    Date of Patent: September 27, 2005
    Assignee: NEC Electronics Corporation
    Inventors: Hiroyuki Kunishima, Toshiyuki Takewaki
  • Patent number: 6949768
    Abstract: A planar substrate device integrated with fin field effect transistors (FinFETs) and a method of manufacture comprises a silicon-on-insulator (SOI) wafer comprising a substrate; a buried insulator layer over the substrate; and a semiconductor layer over the buried insulator layer. The structure further comprises a FinFET over the buried insulator layer and a field effect transistor (FET) integrated in the substrate, wherein the FET gate is planar to the FinFET gate. The structure further comprises retrograde well regions configured in the substrate. In one embodiment, the structure further comprises a shallow trench isolation region configured in the substrate.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: September 27, 2005
    Assignee: International Business Machines Corporation
    Inventors: Brent A. Anderson, Edward J. Nowak, Jed H. Rankin
  • Patent number: 6950079
    Abstract: A luminance control circuit has luminance change characteristics similar to those of a conventional lamp when a light emitting diode is used as a light source. The luminance control circuit adjusts the value of a forward current flowing in the light emitting diode in accordance with a control voltage which is obtained by smoothing a light adjustment pulse signal from an illuminance control circuit. The circuit has: a pulse adjustor for adjusting a duty factor of the light adjustment pulse signal according to characteristics of the light emitting diode; holding circuit for holding the control voltage to a predetermined value or more; and a switch for interrupting the forward current flowing in the light emitting diode by using the light adjustment pulse signal or a pulse signal after the adjustment of the duty factor, wherein at least two of these three elements are used in combination.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: September 27, 2005
    Assignee: Pioneer Corporation
    Inventor: Takao Inoue
  • Patent number: 6949459
    Abstract: Disclosed is a method that deposits an aqueous material having a pH between approximately 10 and 11 in a first opening and on an oxide hard mask, deposits an organic material on the aqueous material, and patterns a photoresist over the organic material. The invention then etches the organic material and the aqueous material through the photoresist to form a second opening above the first opening and forms a polymer along sidewalls of the second opening. The invention can then perform a wet cleaning process using an alkali solution having a pH between approximately 10 and 11 to remove the aqueous material from the first opening. By utilizing an alkali aqueous (water-based) material having a pH of approximately 10-11, the invention can use a fairly low pH wet etch (pH of approximately 10-11) to completely remove the aqueous solution from the via, thereby eliminating the conventional problem of having residual organic material left within the via.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: September 27, 2005
    Assignee: International Business Machines Corporation
    Inventors: Wai-Kin Li, Chih-Chao Yang, Yi-hsiung Lin
  • Patent number: 6949458
    Abstract: A method and structure for forming a sidewall image transfer conductor having a contact pad includes forming an insulator to include a recess, depositing a conductor around the insulator, and etching the conductor to form the sidewall image transfer conductor, wherein the conductor remains in the recess and forms the contact pad and the recess is perpendicular to the sidewall image transfer conductor.
    Type: Grant
    Filed: February 10, 2003
    Date of Patent: September 27, 2005
    Assignee: International Business Machines Corporation
    Inventors: Edward W. Conrad, Chung H. Lam, Dale W. Martin, Edmund Sprogis
  • Patent number: 6950188
    Abstract: A system and method for aligning a wafer in an exposure apparatus includes a holder adapted to hold a wafer (the wafer includes alignment marks), a coarse alignment system, and a fine alignment system having a higher precision than the coarse alignment system. The fine alignment system includes multiple optical detectors. Each of the optical detectors is positioned to detect a corresponding alignment mark on the wafer. An alignment processor is connected to and controls the optical detectors and the holder. The optical detectors are controlled by the alignment processor to simultaneously detect the alignment marks in parallel operations. Further, the alignment processor simultaneously processes signals from the optical detectors in parallel operations.
    Type: Grant
    Filed: April 23, 2003
    Date of Patent: September 27, 2005
    Assignee: International Business Machines Corporation
    Inventors: Qiang Wu, Bomy A. Chen
  • Patent number: 6950363
    Abstract: A semiconductor memory device which can reduce the frequency of a CBR (column before row) refresh operation comprises a memory cell array having a plurality of memory cells, and a CBR refresh unit responsive to m receptions of CBR refresh commands for performing a refresh operation once for the memory cell array.
    Type: Grant
    Filed: September 3, 2003
    Date of Patent: September 27, 2005
    Assignee: Elpida Memory, Inc.
    Inventor: Yasushi Matsubara
  • Patent number: 6949914
    Abstract: A charging apparatus includes a cooling fan; a battery temperature detecting unit; and a control unit configured to determine presence or non-presence of cooling effect by the cooling fan, and to control a charging current based on an output of the battery temperature detecting unit. When there is no cooling effect and the battery temperature reaches a first predetermined value smaller than a maximum value of a temperature range in which a battery is chargeable without making a life time thereof shorter, the control unit changes the charging current to a first charging current value where increase of the battery temperature can be suppressed. When there is cooling effect and the battery temperature reaches a second predetermined value higher than the first predetermined value, the control unit changes the charging current to a second charging current value larger than the first charging current value.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: September 27, 2005
    Assignee: Hitachi Koki Co., Ltd.
    Inventors: Takao Aradachi, Nobuhiro Takano
  • Patent number: 6950673
    Abstract: A cellular phone terminal can eliminate extra process and save power to be consumed. The cellular phone terminal includes a low speed clock circuit generating a low speed clock to be used for generating a low speed clock used for generation of a preliminarily set intermittent reception cycle, and a high speed clock circuit generating a high speed clock required at least for receiving operation and stopped during periods other than a period of receiving operation, and performing at least checking of incoming call and measurement of a reception level according to said intermittent reception cycle. The terminal also includes an analog/digital converting circuit for converting a measured value of conditional variation in own terminal into the digital signal, an averaging circuit for averaging a result of measurement using said analog/digital converting circuit, and a control circuit for controlling said analog/digital converting circuit and said averaging circuit adapting to said intermittent reception cycle.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: September 27, 2005
    Assignee: NEC Corporation
    Inventor: Hideaki Asada
  • Patent number: 6950290
    Abstract: In a magnetoresistive effect transducer including a pinning layer, a pinned layer, a free layer and a non-magnetic layer inserted between the pinned layer and the free layer, a longitudinal bias layer is connected directly to a part of the free layer to apply a bias magnetic field to the free layer, thus biasing a magnetization direction of the free layer so that the magnetization direction of the free layer coincides with that of the longitudinal bias layer.
    Type: Grant
    Filed: September 12, 2002
    Date of Patent: September 27, 2005
    Assignee: NEC Corporation
    Inventors: Kazuhiko Hayashi, Keishi Ohashi, Nobuyuki Ishiwata, Masafumi Nakada, Tsutomu Ishi, Hiroaki Honjou, Kunihiko Ishihara, Jun-Ichi Fujikata, Hisao Matsutera, Hisanao Tsuge, Atsushi Kamijo
  • Patent number: 6949465
    Abstract: According to this invention, residues generated after selectively removing a low-dielectric-constant film such as SiOC can be effectively removed without damage on an insulating film or metal film. Specifically, residues 126 and 128 generated after forming an interconnect trench in an SiOC film 116 are removed using a fluoride-free weak alkaline amine stripper. After the removing step, the wafer is rinsed with isopropyl alcohol and then dried without drying with pure water.
    Type: Grant
    Filed: July 9, 2003
    Date of Patent: September 27, 2005
    Assignee: NEC Electronics Corporation
    Inventors: Hidemitsu Aoki, Kenichi Tokioka, Yoshiko Kasama, Tatsuya Koito, Keiji Hirano
  • Patent number: D510492
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: October 11, 2005
    Assignees: Itoki Co., Ltd., Itoki Crebio Corporation
    Inventors: Tamio Sakurai, Koichiro Hayashi