Patents Represented by Attorney McGinn IP Law Group
  • Patent number: 8310246
    Abstract: A continuity testing apparatus includes open/short detection circuits provided for to-be-tested terminals, respectively and configured to determine the presence or absence of at least any one of an open-circuit failure and a short-circuit failure in to-be-tested terminals. Then, the continuity testing apparatus generates detected results of the open/short detection circuits based on the condition of continuity of the to-be-tested terminals having connections to the open/short detection circuits and the detected results from the open/short detection circuits in the preceding stages, and outputs the generated detected results to the open/short detection circuits in the succeeding stages. Further, the continuity testing apparatus determines the condition of continuity based on the output from the open/short detection circuit in the last stage.
    Type: Grant
    Filed: March 4, 2010
    Date of Patent: November 13, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Hiroyuki Fuchigami, Shouichirou Satou
  • Patent number: 8310897
    Abstract: A semiconductor device, includes a first memory cell array, a second memory cell array, a command decoder configured to produce a transfer command to transfer a data stored in a first area of the first memory cell array to a second area of the second memory cell array, when receiving a read command to the first memory cell array and sequentially a write command to the second cell memory array, a first address generator configured to produce a first internal address for designating the first area of the first memory cell array when receiving the transfer command from the command decoder; and a second address generator configured to produce a second internal address for designating the second area of the second memory cell array when receiving the transfer command from the command decoder.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: November 13, 2012
    Assignee: Elpida Memory, Inc.
    Inventor: Yoshinori Matsui
  • Patent number: 8309381
    Abstract: A method for producing a light-emitting device including a growth substrate made of Group III nitride semiconductor, and a Group III nitride semiconductor layer stacked on the top surface of the growth substrate, includes forming, between the growth substrate and the semiconductor layer, a stopper layer exhibiting resistance to a wet etchant, and wet-etching the bottom surface of the growth substrate until the stopper layer is exposed.
    Type: Grant
    Filed: September 30, 2009
    Date of Patent: November 13, 2012
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Miki Moriyama, Koichi Goshonoo
  • Patent number: 8308508
    Abstract: A connector includes a first terminal housing for housing three first connecting terminals aligned, a second terminal housing for housing three second connecting terminals aligned, a plurality of insulating members that are aligned and housed in the second terminal housing, and a connecting member for collectively fixing and electrically connecting the three first connecting terminals and the three second connecting terminals at each contact point by pressing one of the plurality of insulating members adjacent to the connecting member. The three first connecting terminals and the three second connecting terminals are each arranged in a form of a triangle when viewed in the fitting direction.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: November 13, 2012
    Assignee: Hitachi Cable, Ltd.
    Inventors: Sachio Suzuki, Hideaki Takehara, Kunihiro Fukuda, Yuta Kataoka, Jun Umetsu, Shinya Hayashi
  • Patent number: 8309109
    Abstract: A cosmetic in an emulsified state, in which a titanium dioxide microparticle coated with hydrous silicic acid and/or a hydrous silicate compound, a higher alcohol, an oily component other than the higher alcohol, and a polysaccharide are contained, and the polysaccharide containing at least one of fucose, glucose, glucuronic acid and rhamnose as a constituent monosaccharide, and having fucose and/or rhamnose in a side chain is contained in an amount of 0.01% by weight to 1% by weight relative to the total amount of the cosmetic. And a cosmetic containing the higher alcohol, the oily component and the polysaccharide in an emulsified state, in which the higher alcohol is composed of two or more kinds of higher alcohols having different molecular weights, and is contained in the cosmetic in an amount of 1% by weight to 20% by weight relative to the total amount of the cosmetic.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: November 13, 2012
    Assignees: Hakuto Co., Ltd., Kanagawa University
    Inventors: Kazuo Tajima, Yoko Imai, Teruo Horiuchi, Yasuhiro Nohata
  • Patent number: 8305950
    Abstract: A method of forming RLC blocks for contents synchronization within a mobile radio communications network includes providing a control element for each of a plurality of SDUs within each RLC block. Each control element comprises a header element arranged to precede its respective SDU. A network device provides the RLC blocks and such blocks as having such a structure.
    Type: Grant
    Filed: May 2, 2008
    Date of Patent: November 6, 2012
    Assignee: NEC Corporation
    Inventors: Michael Nosley, Pierre Marchand
  • Patent number: 8305135
    Abstract: This invention allows for stable operation of a circuit to which an output voltage is supplied. The invention resides in a semiconductor device comprising a VREF1 regulator to which a reference voltage Vref1 relative to a first potential is input; and an output circuit which generates an output voltage Vint that is proportional to a voltage on its input terminal relative to a second potential. The VREF1 regulator comprises a constant current source which generates a constant current having a current value that is proportional to the reference voltage Vref1; and a first resistor element which is supplied with the constant current, one end of which is coupled to the input terminal of the output circuit and the other end of which is coupled to the second potential.
    Type: Grant
    Filed: October 27, 2010
    Date of Patent: November 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Kazutaka Kikuchi
  • Patent number: 8306755
    Abstract: A similarity search method includes generating a feature database which stores data pertaining to a candidate molecule, as executed by a processor of a computer, the database including a hash table having entries which are generated based on, a set of descriptors generated from conformations of fragment graphs of the candidate molecule, the fragment graphs including plural fragment nodes connected by rotatable bond edges, a specific conformation of the fragment node including a fragment of the candidate molecule, and two neighboring fragments connected by a rotatable bond at a specific dihedral angle including a fragment pair, and a context-adapted descriptor-to-key mapping which maps the set of descriptors to a set of feature keys including indices that label grid cells in discriminant space.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: November 6, 2012
    Assignee: International Business Machines Corporation
    Inventors: Michael C. Pitman, Blake G. Fitch, Hans W. Horn, Wolfgang Huber, Julia E. Rice, William C. Swope
  • Patent number: 8302295
    Abstract: A method for processing an end of a very thin coaxial cable which includes sequentially from its center to outer side a center conductor, an inner insulator, a shield conductor formed of a helically wound or a braided conducting wire, and a jacket. The method includes cutting the jacket to expose the shield conductor, cutting a circumferential portion of the exposed shield conductor in plural longitudinal portions of the very thin coaxial cable, and pulling and removing the jacket and the shield conductor between the end of the very thin coaxial cable and a farthest end-processing portion from the end of the very thin coaxial cable, to expose the inner insulator.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: November 6, 2012
    Assignee: Hitachi Cable, Ltd.
    Inventor: Kotaro Tanaka
  • Patent number: 8305158
    Abstract: An attenuator includes a first terminal, a second terminal, a first circuit coupled between the first and second terminals and including a field effect transistor including a gate terminal coupled to a resistor, a second circuit coupled between the first circuit and the second terminal, coupled to the first circuit via a node, and including another field effect transistor including another gate terminal coupled to another resistor, and a third circuit coupled to the node. The resistor and the another resistor are coupled to different nodes respectively.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: November 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Junjirou Yamakawa
  • Patent number: 8305145
    Abstract: A receiving circuit in accordance with an exemplary aspect of the present invention includes a first voltage-dividing circuit that outputs a first input signal obtained by voltage division of one of differential signals based on the resistance ratio between first and second resistors, a second voltage-dividing circuit that outputs a second input signal obtained by voltage division of the other of the differential signals based on the resistance ratio between third and fourth resistors, a differential amplifier that amplifies the differential component between the first and second input signals, a common-mode voltage detection circuit that detects the common-mode voltage of the differential signals, and a bias voltage switching circuit that switches the voltage value of a bias voltage based on the common-mode voltage.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: November 6, 2012
    Assignee: RENESAS Electronics Corporation
    Inventor: Wataru Nakamura
  • Patent number: 8305205
    Abstract: A vehicle display device is arranged in a vehicle having an idling stop function that automatically stops an engine when the vehicle temporarily stops. The device includes a control unit that calculates a deviation of a current instant fuel consumption with respect to an average fuel consumption in a past predetermined period of the vehicle; and a fuelometer that indicates fuel consumption information representing whether a current driving state of the vehicle decreases the average fuel consumption. When the vehicle is in the idling stop state, the fuelometer indicates that the deviation is 0 regardless of the instant fuel consumption and the average fuel consumption.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: November 6, 2012
    Assignee: Fuji Jukogyo Kabushiki Kaisha
    Inventor: Kouji Kaneda
  • Patent number: 8305122
    Abstract: There is provided a current switching circuit that adds additional current in accordance with an intensity of output current to input current of a current mirror at a rising edge of the output current of the current mirror. The current switching circuit includes a MOS transistor outputting the additional current upon receiving ON potential at a gate terminal, and a slope of a leading edge waveform of a pulse signal providing the ON potential is controlled in accordance with the intensity of the output current.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: November 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Makoto Sakaguchi
  • Patent number: 8302897
    Abstract: The present invention relates to a device for handling a number of sleeves, preferably paper sleeves, before, during and after rolling up of a paper web each thereon, at least one insert sleeve bent from a rigid material web and having a length substantially corresponding to the total length of the rolls being inserted in the rolls for simultaneous handling thereof, wherein the insert sleeve is polygonal, e.g. triangular, rectangular, etc.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: November 6, 2012
    Assignee: Core Link AB
    Inventor: Jörgen Jensen
  • Patent number: 8304870
    Abstract: The relay member is at least partly positioned between the semiconductor chip and lead in the plan view, and metal pieces insulated from one another are arranged on the surface. At least either of the first wire and the second wire has their respective other ends and joined to at least one of the metal pieces arranged on the surface of the relay member. Also, the first wire and the second wire have their respective other ends and joined to each other at that part of the relay member which is between the semiconductor chip and the lead. The foregoing structure is highly reliable and versatile for wire connection.
    Type: Grant
    Filed: February 14, 2011
    Date of Patent: November 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Yoichiro Kurita
  • Patent number: 8304852
    Abstract: A semiconductor device (200) includes: an electrical fuse (100) including: a lower layer interconnect (120) formed on a substrate; a via (130) provided on the lower layer interconnect (120) so as to be connected to the lower layer interconnect (120); and an upper layer interconnect (110) provided on the via (130) so as to be connected to the via (130), the electrical fuse being cut, in a state after being cut, through formation of a flowing-out portion, the flowing-out portion being formed when an electrical conductor forming the upper layer interconnect (110) flows outside the upper layer interconnect (110); and a guard upper layer interconnect (152) (conductive heat-absorbing member) formed in at least the same layer as the upper layer interconnect (110), for absorbing heat generated in the upper layer interconnect (110).
    Type: Grant
    Filed: April 7, 2009
    Date of Patent: November 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Hiromichi Takaoka, Yoshitaka Kubota, Hiroshi Tsuda
  • Patent number: 8304918
    Abstract: An electronic device is disclosed which can suppress the formation of voids in a region below an overhanging portion of a first semiconductor device overhanging a support member. The support member is disposed over a package substrate. The first semiconductor device is disposed over the support member and, when seen in plan, at least a part of the first semiconductor device overhangs the support member. A first resin layer fills up a space below the first semiconductor device in at least a part of the overhanging portion of the first semiconductor device around the support member. The first resin layer is in contact with the support member. A second resin layer seals the first semiconductor device and the support member.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: November 6, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Jun Tsukano
  • Patent number: 8303188
    Abstract: An outer ring is provided with a key groove radially extending from an inner diameter to an outer diameter on an end surface thereof. A key member includes an annular body, an inwardly projecting part which is provided on an inner periphery of the annular body and adapted to be inserted into the key groove of the outer ring, and an outwardly projecting part which is provided on an outer periphery of the annular body and adapted to be inserted into a key groove of an axle box.
    Type: Grant
    Filed: December 2, 2008
    Date of Patent: November 6, 2012
    Assignee: JTEKT Corporation
    Inventor: Katsunori Otsuka
  • Patent number: 8297079
    Abstract: The method of manufacturing porous glass base material for optical fiber includes that flame-hydrolyzing raw materials for glass in oxyhydrogen flame, depositing the generated glass fine particles on a rotating target to form porous glass base material, dehydrating and sintering the porous glass base material to transform into clear glass. The method features, in terms of the surface temperature of said porous glass base material, which changes as the burner used for depositing glass fine particle is moved relatively to said target, the temperature difference between the surface temperature of the porous glass base material touching the burner flame Ta and the surface temperature of the porous glass base material before touching the flame Tb, that is Ta?Tb, is adjusted to be within the range from 200 to 700 degrees centigrade.
    Type: Grant
    Filed: December 28, 2004
    Date of Patent: October 30, 2012
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventor: Hiroshi Machida
  • Patent number: 8301870
    Abstract: A method and structure for an out-of-order processor executing at least two threads of instructions that communicate and synchronize with each other. The synchronization is achieved by monitoring addresses of instructions in at least one of the threads.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: October 30, 2012
    Assignee: International Business Machines Corporation
    Inventor: Krishnan Kunjunny Kailas