Abstract: Error correction circuitry for an analog to digital converter is disclosed which provides for the correction of charge in a charge redistribution converter architecture. This conversion technique as implemented requires that a binary weighted capacitor array be present where the capacitors are accurately binarily weighted in decreasing value. The charge correction circuitry allows for the correction of any deviations of binary weighted capacitance value by adding or subtracting charge from the capacitor array. This is accomplished by the use of a resistor array connected to a capacitor that is equal in capacitance to the smallest capacitor in the capacitor array. The converter includes a microcomputer which determines the charge error for each of the individual capacitors together with the total charge error for the capacitive array coupling with the comparitor.

Abstract: A data processing system having separate read-only memory and read-write memory integrated circuits coupled to a central processing unit via the same interface system. The data processing system is comprised of bus means having either command, address, or data signals present and conducted thereon. In the preferred embodiment, the bus means is comprised of a four binary digit bidirectional conductor bus coupling between the central processing circuit and the memory circuits.

Abstract: An apparatus for encoding and decoding musical signals in digital form employs conversion to the frequency domain. Discrete Fourier transform coefficients are calculated from time domain digital data at selected frequencies which are organized in sets of octavely related frequencies. Selecting frequencies in this manner greatly reduces the data rate by eliminating coefficients for many higher frequencies without a great loss of fidelity because the provision of a predetermined number of frequencies in each octave approximates the tonal response of the human ear. A further refinement is selection of frequencies to correspond to the frequencies of musical notes where the greatest energy can be expected.

Abstract: Transportation apparatus comprising two parallel chains extending in the transport direction. Workpiece carriers are disposed between the chains and extend parallel to each other. Each workpiece carrier includes two support elements extending parallel to each other and are rigidly connected together. On each workpiece carrier, a plurality of workpiece clamps are disposed. Each workpiece clamp comprises two clamp members, respectively connected to the support elements. At least one clamp member of each workpiece clamp is pivotal about the support element with which it is connected, between a closed position and an open position. The chains are fed between a charging station, at which the workpiece clamps are changed with workpieces, and a discharge station at which the workpieces are released from the clamps.

Abstract: An inverter which includes a resonant electrical circuit and a charging transistor arranged to charge an energy storage component of the resonant circuit periodically in synchronism with oscillations in the circuit so as to maintain the oscillations. A part of the oscillatory energy of the resonant circuit is transferred to an output circuit so that the inverter supplies output power.The charging transistor forms part of a current-limiting switch and is controlled by a control circuit which is arranged to monitor the voltage across the transistor and to switch it on when the voltage lies between first and second limits, one of which preferably is at or near zero, and changing in a predetermined sense, such as to charge the resonant circuit in synchronism with oscillation thereof. The charging transistor then adds energy to the resonant circuit until the current-limit is reached. Charging is then stopped by the switching off of the transistor.

Abstract: A calculator having constant memory utilizing a classical CMOS metal gate process, a low power microcomputer with on-chip and external constant memory capability, and multiple partition power control of circuit groups. Incorporation of a first and second switched negative voltage and a non-switched negative voltage to the appropriate P (-) wells enables the power hungry clocked logic and the display interface and keystroke detect circuitry, to be turned off while power is maintained on the internal static RAM, and on the RAM write logic, digit latches, and R-lines which connect to both the internal and external RAM, or to selectively connect in combination the first and second switched voltages. In an alternate embodiment, a multiple oscillator, multiple partition system is controlled to provide an off-mode, display only mode (low frequency oscillator), a process only mode, and a display and process mode, thereby optimizing power dissipation to system requirements.

Abstract: Resistor elements for MOS integrated circuits are made by an ion implant step compatible with a self-aligned N-channel silicon-gate process. The resistor elements are in a part of a polycrystalline silicon layer which is also used as a gate for an MOS transistor and as an interconnection overlying field oxide. Resistors of this type are ideally suited for load devices in static RAM cells.

Abstract: An electronic telephone including a keyboard input, a telephone line interface, a speech synthesis device with a control line and an audio line coupled to the telephone line interface, a message recorder with an audio line coupled to a telephone line interface, and an electronic digital processor system to control the device. The electronic digital processor system includes two independent and separably operable central processing units. One central processing unit is activated by the keyboard when a telephone number is input and may be used to store numerous, frequently called telephone numbers.

Abstract: An apparatus and method of forming aluminum balls utilized for ball bonding. The aluminum balls are formed in a moist argon atmosphere by applying an electrical potential across a spark gap causing a spark to occur which causes the end of the aluminum wire to melt, forming an aluminum ball.

Abstract: A display control system which operates asynchronously with a microprocessor includes a display controller, display memory, character memory means, and a visual character attribute generator. By linking one or more row attribute bytes, or pointers, to each row of characters stored in the display memory the display controller performs character and row manipulation on a display device without transferring whole blocks of data in the display memory. Multi-region display segmentation into horizontal and vertical split regions, smooth or discrete scrolling of individual regions, and various editing functions are achieved by modifying the associated display memory pointers. In one embodiment the display controller is a single integrated circuit device.

Abstract: A transparent intelligent communication network having nodes and communication links between the nodes and providing improved system input features by including the sampling of customer inputs at different rates according to their output rates of data at the exit node or at faster rates if there is a spare channel capacity available.

Abstract: A method for the fabrication of a cured polyamic acid film having apertures therein selectively etched to provide sidewalls sloped at a controlled angle. Such films are used in the fabrication of integrated circuits having two or more levels of metallization, to provide electrical insulation between metal levels. The apertures therein are required to have sloped sidewalls in order to enhance the yields of circuits having reliable contact between metal levels.

Abstract: A circuit and a method of operation thereof are disclosed to compensate for second order non-linearities in bandgap voltage references. The circuit is readily fabricated as an integrated circuit in conjunction with circuitry utilized to correct linear variations. The circuit accurately compensates for the non-linear bow effect over a temperature range of -55.degree. C. to +150.degree. C.

Abstract: A chart recorder has a fixed thermal printhead for recording traces and annotations thereto representative of monitored parameters. A microcomputer, including timing, memory and control circuits controls the operation of the recorder which is enabled to print one or more traces simultaneously. The microcomputer control enables the printing of limit parameters, grids and times along with the traces. Further, the microcomputer provides for linearization of nonlinear parameters to be measured such as thermocouple temperature measurements and the like.

Abstract: Apparatus for rounding of a character produced as a character segment matrix pattern for display on a raster scanned display in which a read-only memory storing the character segment matrix patterns for the characters to be displayed is arranged to produce the entire matrix pattern for a selected character in parallel at any one time. A parallel gating means selects from the matrix pattern a selected row of the matrix and also the immediately preceding row or the immediately following row depending upon which is required at the time for character rounding. The bits of the selected row are applied in parallel to a first shifting register and the bits of both rows produced by the gating means are applied in parallel to a character rounding logic circuit which is arranged to detect the presence of diagonal lines in the character and produce the appropriate rounding elements.

Abstract: A monitor for optimizing the ultrasonic bonding of materials by analyzing the impedance of an ultrasonic transducer used to effect the bond. The electrical impedance of the transducer, which is proportional to its mechanical impedance, is determined by applying an ultrasonic voltage thereto and monitoring the resultant change in current amplitude. A pair of differentiators produces a second derivative signal of the impedance with respect to time, with a negative-going zero crossing of this signal corresponding to completion of the bond. Loss of wire, mechanical malfunctions and improper bonds are also detected by the monitor, to form a real time quality control system.

Abstract: A transparent intelligent communication network having both terrestrial and satellite links between nodes and providing improved accuracy and speed in transmission by distinguishing between data requiring rapid receipt at the receiving node and other data, and dispatching data accordingly, while transmitting system protocol and error-correcting information (e.g., retransmissions) over terrestrial links.

Abstract: An input process sequence controller provides a sophisticated communication processing link between a central processor and peripheral digital apparatus. Data is transmitted from the peripheral digital apparatus to the process sequence controller whose function is to process that incoming data as commanded, to relieve the central processor of that task. The process sequence controller has a processor unit, controlled by a Read-only Memory for performing certain functions on the incoming data. The incoming data is received by one portion of a first swapping buffer while a second portion transmits previously received data to the processor unit. When the second portion is emptied, it begins receiving data while the first portion transmits data. A first portion of a second swapping buffer receives processed data from the processor unit while a second portion transmits processed data to the central processor.

Abstract: A method of fabricating deep grooves having submicron widths in a semiconductor substrate. A pattern of submicron oxidation masking elements formed on the substrate surface serves as an oxidation mask for a thick oxide layer. After forming the oxide layer, the insulating elements are removed to form a pattern of submicron width openings in the oxide extending to the substrate. A selective anisotropic dry etch is then used to form deep, narrow grooves in the substrate conforming to the pattern of openings which are filled with an insulating material formed by thermal oxidation, chemical vapor deposition, or a combination thereof. This process is used to provide deep dielectric isolation between active areas in high density integrated circuits.

Abstract: An improvement in a communication system is disclosed having a transmitter which transmits a pulse width modulated control signal having a synchronizing pulse, a reference pulse, and at least one control function pulse encoded therein. At least one receiver receives the transmitted control signal and detects the pulses encoded therein. In response to each detected pulse, a timing circuit in each receiver provides a timing pulse having a width related to a reference signal. A reference controller compares the width of the detected reference pulse to the width of the timing pulse and provides a reference calibration signal at a level automatically selected to reduce the compared pulse width difference. A function controller may be provided to compare the width of the detected control function pulse to the width of the timing pulse, and to perform a control function in response to a predetermined compared width difference therebetween.