Patents Represented by Attorney, Agent or Law Firm Miriam Jackson
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Patent number: 6482289Abstract: An assembly and method for connecting two substrates utilizes a nonconductive laminant that is compatible when wet with a conductive paste when wet. Thus, the curing of the nonconductive laminant and the conductive paste may be performed together. The nonconductive laminant also cures in a shorter time than those previously available, thus the stress on the semiconductor device created by exposure to the cure temperature is additionally reduced.Type: GrantFiled: October 6, 1995Date of Patent: November 19, 2002Assignee: Motorola, Inc.Inventors: Treliant Fang, Melissa E. Grupen-Shemansky, Shun-Meen Kuo
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Patent number: 6441449Abstract: A micro electro-mechanical systems device having variable capacitance is controllable over the full dynamic range and not subject to the “snap effect” common in the prior art. The device features an electrostatic driver (120) having a driver capacitor of fixed capacitance (121) in series with a second driver capacitor of variable capacitance (126). A MEMS variable capacitor (130) is controlled by applying an actuation voltage potential to the electrostatic driver (120). The electrostatic driver (120) and MEMS variable capacitor (130) are integrated in a single, monolithic device.Type: GrantFiled: October 16, 2001Date of Patent: August 27, 2002Assignee: Motorola, Inc.Inventors: Ji-Hai Xu, Jenn-Hwa Huang, John Michael Parsey, Jr.
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Patent number: 6401545Abstract: Selective encapsulation of a micro electro-mechanical pressure sensor provides for protection of the wire bands (140) through encapsulation while permitting the pressure sensor diaphragm (121) to be exposed to ambient pressure without encumbrance or obstruction. Selective encapsulation is made possible by the construction of a protective dam (150) around the outer perimeter of a pressure sensor diaphragm (121) to form a wire bond cavity region between the protective dam (150) and the device housing (105). The wire bond cavity may be encapsulated with an encapsulation gel (160) or by a vent cap (170). Alternatively, the protective dam (150) may be formed by a glass frit pattern (152) bonding a cap wafer (151) to a device wafer (125) and then dicing the two-wafer combination into individual dies with protective dams attached.Type: GrantFiled: January 25, 2000Date of Patent: June 11, 2002Assignee: Motorola, Inc.Inventors: David J. Monk, Song Woon Kim, Kyujin Jung, Bishnu Gogoi, Gordon Bitko, Bill McDonald, Theresa A. Maudie, Dave Mahadevan
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Patent number: 6113721Abstract: Removing a portion of an active wafer (12) at the edge (18) after the active wafer (12) is bonded to a base wafer (10) prevents chipping of the edge of the active wafer during thinning of the active wafer (12). Grinding and polishing of the edges of the active wafer (12) is preferably performed.Type: GrantFiled: January 3, 1995Date of Patent: September 5, 2000Assignee: Motorola, Inc.Inventors: Frank T. Secco d'Aragona, David D. Oliver, Raymond C. Wells
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Patent number: 6076149Abstract: For a data processing device having a main memory comprised of a non-volatile memory and a CPU, memory protection and security are ensured for its programs and so forth. An auxiliary memory for storing security bit data is provided, for example, in an EPROM that comprises the main memory. Assuming that the result read by the CPU is "0" when a current flows between a drain and a source of a transistor in the EPROM, and "1" when the current does not flow, then the security bit data read from two transistors A and B are A=1 and B=1, which means they are set so that access to the main memory and a write to the auxiliary memory are prohibited. With A=0 and B=0, security is set, but a write to the auxiliary memory is permitted; with A=1 (0) and B=0 (1), security is reset.Type: GrantFiled: January 20, 1998Date of Patent: June 13, 2000Assignee: Motorola, Inc.Inventors: Tadashi Usami, Hideki Kondo, Shigeki Kamio
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Patent number: 6075409Abstract: A method for demodulating a radio frequency signal having a frequency, by oscillating a demodulator at a frequency different from the signal frequency, and measuring a DC offset value at this different frequency, the DC offset value being associated with interference. Then the demodulator is oscillated at the signal, thereby providing a demodulated signal. The DC offset value is subtracted from the demodulated signal in order to provide a demodulated signal with a substantially reduced DC component. The demodulated signal is then monitored for further DC offset components, and these further DC offset components are subtracted from the demodulated signal.Type: GrantFiled: April 1, 1999Date of Patent: June 13, 2000Assignee: Motorola, Inc.Inventor: Nadim Khlat
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Patent number: 6057219Abstract: An ohmic contact to a III-V semiconductor material is fabricated by dry etching a silicon nitride layer overlying the III-V semiconductor material with a chemical comprised of a group VI element. An ohmic metal layer is formed on the III-V semiconductor material after the silicon nitride layer is etched and before any exposure of the III-V semiconductor material to a chemical which etches the III-V semiconductor material or removes the group VI element.Type: GrantFiled: July 1, 1994Date of Patent: May 2, 2000Assignee: Motorola, Inc.Inventors: Jaeshin Cho, Gregory L. Hansell, Naresh Saha
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Patent number: 6037789Abstract: Throughput and accuracy of testing of a semiconductor device is improved by forming the contacts to allow the leads of a packaged semiconductor device to pass through the contacts. Both AC and DC testing may be done because the contact length is substantially shortened.Type: GrantFiled: October 30, 1992Date of Patent: March 14, 2000Assignee: Motorola, Inc.Inventors: Milo W. Frisbie, Mavin C. Swapp
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Patent number: 5990554Abstract: A heatsink having isolated bonding pads formed on the heatsink eliminates breaking of the wire bond, lifting of the wire bond to the heatsink, and die attach material contamination of the bond. In one embodiment, the isolated bonding pad has an elevated pedestal configuration. In a second embodiment, the isolated bonding pad has an elevated pedestal configuration, so that the pedestal is also configured to lock a mold compound around the pedestal. In a third embodiment, the isolated bonding pad has an island configuration. In a fourth embodiment, the island configuration is configured to lock the mold compound formed around the island. The locking mechanism of the elevated pedestal or island prevents delamination of the mold compound to heatsink interface, preventing lifting or breaking of a wire bonded to the isolated bonding pad.Type: GrantFiled: April 23, 1993Date of Patent: November 23, 1999Assignee: Motorola, Inc.Inventors: Theodore R. Golubic, Timothy L. Olson
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Patent number: 5888412Abstract: A sculptured diaphragm of a sensor is fabricated by providing a semiconductor material, forming at least one cavity on the front side of the semiconductor material, forming a diaphragm layer over the semiconductor material, and the etching a cavity on the back side of the semiconductor material. If a sensor having a diaphragm with a central boss is desired, then the diaphragm layer is planarized to form a thick and a thin portion in the diaphragm layer.Type: GrantFiled: March 4, 1996Date of Patent: March 30, 1999Assignee: Motorola, Inc.Inventors: Kathirgamasundaram Sooriakumar, Andrew C. McNeil, Kenneth G. Goldman, Mahesh K. Shah
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Patent number: 5811631Abstract: An apparatus for and method of decomposing a chemical compound, which may be an environmentally undesirable material, is accomplished by impinging a flow of the chemical compound on a heated member. Various embodiments are possible, including having the member have a plurality of openings, having the member be configured to direct the flow of the chemical compound in a particular direction, and having the member be self supported on the wall of the reaction chamber.Type: GrantFiled: April 29, 1994Date of Patent: September 22, 1998Assignee: Motorola, Inc.Inventors: Jerry D. Cripe, Gerard T. Reed, James C. Koontz
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Patent number: 5720927Abstract: An apparatus for decomposing a chemical compound, which may be an environmentally undesirable material, is accomplished by impinging a flow of the chemical compound on a heated member. Various embodiments are possible, including having the member have a plurality of openings, having the member be configured to direct the flow of the chemical compound in a particular direction, and having the member be self supported on the wall of the reaction chamber.Type: GrantFiled: June 7, 1995Date of Patent: February 24, 1998Assignee: Motorola, Inc.Inventors: Jerry D. Cripe, Gerard T. Reed, James C. Koontz
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Patent number: 5712581Abstract: A data qualification circuit (11) comprises a comparator (28), a first threshold circuit (33), and a second threshold circuit (41). A differential input signal is applied to the data qualification circuit (11). A first threshold circuit (33) is enabled by a zero logic state at the output of comparator (28). The first threshold circuit (33) sets a one logic state threshold voltage which the differential input signal must overcome for the comparator (28) to generate a one logic state. A second threshold circuit (41) is enabled by a zero logic state at the output of comparator (28). The second threshold circuit (41) sets a zero logic state threshold voltage which the differential input signal must overcome for the comparator (28) to generate a zero logic state.Type: GrantFiled: December 21, 1995Date of Patent: January 27, 1998Assignee: Motorola, Inc.Inventor: Scott Alan Kaylor
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Patent number: 5707901Abstract: An etch stop layer prevents damage to the underlying semiconductor material or metallization layer during etching of a dielectric layer overlying the etch stop layer. The etch stop layer, aluminum nitride or aluminum oxide is used underlying silicon dioxide to prevent damage to the semiconductor material during a fluorocarbon based etch of the silicon dioxide. The etch stop layer is also used underlying a silicon dioxide layer and overlying a titanium nitride or titanium tungsten layer used in metallization to prevent etching of the titanium nitride or titanium tungsten layer during etching of the silicon dioxide.Type: GrantFiled: July 29, 1996Date of Patent: January 13, 1998Assignee: Motorola, Inc.Inventors: Jaeshin Cho, Naresh Saha
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Patent number: 5690877Abstract: A method of removing dam bars (15) from leads (17) of a semiconductor chip package (10) is performed by first breaking a bond between the dam bars (15) and excess mold compound (12) from a mold compound (11). The bond is broken by slight movement of the dam bar (15). Thereafter, the dam bar (15) is completely removed by moving the dam bar (15) further, without causing chips or cracks in the mold compound (11).Type: GrantFiled: March 16, 1995Date of Patent: November 25, 1997Inventors: Alex Elliott, Allen Koesser
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Patent number: 5663476Abstract: An apparatus for and method of decomposing a chemical compound, which may be an environmentally undesirable material, is accomplished by impinging a flow of the chemical compound on a heated member. Various embodiments are possible, including having the member have a plurality of openings, having the member be configured to direct the flow of the chemical compound in a particular direction, and having the member be self supported on the wall of the reaction chamber.Type: GrantFiled: April 29, 1994Date of Patent: September 2, 1997Assignee: Motorola, Inc.Inventors: Jerry D. Cripe, Gerard T. Reed, James C. Koontz
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Patent number: 5654562Abstract: An insulated gate semiconductor device (10) is fabricated by providing at least one ballast resistor (40) having a sheet resistance of at least one square. The ballast resistor (40) is formed in the emitter region (17) between two adjacent portions of the base region (26) at the top surface of the semiconductor body in which the device (10) is fabricated. The ballast resistor (40) improves the latch resistance of the device (10) in overload conditions.Type: GrantFiled: March 3, 1995Date of Patent: August 5, 1997Assignee: Motorola, Inc.Inventors: William L. Fragale, Paul J. Groenig, Vasudev Venkatesan
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Patent number: 5631187Abstract: A semiconductor device having an improved protection scheme and a temperature compensated sustaining voltage is provided by integrating a plurality of temperature compensated voltage reference diodes between the drain and the gate of the semiconductor device. The diodes protect the device by clamping the device's sustaining voltage to the total avalanche voltage of the diode. The device will dissipate any excessive energy in the conduction mode rather than in the more stressful avalanche mode. In addition, the plurality of diodes will provide for a temperature compensated sustaining voltage of the semiconductor device. The plurality of diodes are formed back-to-back in polysilicon. The positive temperature coefficient of the avalanching junction of each diode pair is compensated for by the negative temperature coefficient of the forward biased junction.Type: GrantFiled: January 31, 1994Date of Patent: May 20, 1997Assignee: Motorola, Inc.Inventors: John P. Phipps, Stephen P. Robb, Judy L. Sutor, Lewis E. Terry
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Patent number: 5619064Abstract: A manufacturable III-V semiconductor gate structure having small geometries is fabricated. A silicon nitride layer is formed on a III-V semiconductor material and a dielectric layer comprised of aluminum is formed on the silicon nitride layer. Another dielectric layer comprised of silicon and oxygen is formed over the dielectric layer comprised of aluminum. The dielectric layer comprised of aluminum acts as an etch stop for the etching of the dielectric layer comprised of silicon and oxygen with a high power reactive ion etch. The dielectric layer comprised of aluminum may then be etched with a wet etchant which does not substantially etch the silicon nitride layer. Damage to the surface of the semiconductor material by exposure to the high power reactive ion etch is prevented by forming the dielectric layer comprised of aluminum between the silicon nitride layer and the dielectric layer comprised of silicon and oxygen.Type: GrantFiled: January 16, 1996Date of Patent: April 8, 1997Assignee: Motorola, Inc.Inventor: Jaeshin Cho
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Patent number: 5605615Abstract: A method and apparatus for plating metals which delivers a voltage pulse with the possibility of a widely varying current magnitude characteristic to a plating electrode and an object having a large electrical reactance in terms of a parallel resistance and capacitance in order to raise the voltage potential between the electrode and an object to a programmed plating voltage overpotential and underpotential. The programmed plating voltage overpotential determines how fast the electrochemical reaction is allowed to proceed in the diffusion layer, and the programmed voltage underpotential determines how quickly the electrochemical reaction of the diffusion layer will slow down.Type: GrantFiled: December 5, 1994Date of Patent: February 25, 1997Assignee: Motorola, Inc.Inventors: Peter G. Goolsby, Dan R. Ramirez, Lei P. Lai