Abstract: A method and system for auctioning items via the Internet permit customers to bid on items and others to bid after delivery has been scheduled, and optionally commenced, to a previous bidder. A bid increment is set according to a geographic location of the new bidder, so that the requirements of rescheduling delivery to the new bidder can be taken into account in the auction. The items may be food items. Items and an estimated time of arrival (ETA) are displayed on a web page that provides an interface for purchase or bidding. Bidding may be made for the actual item purchase or for a scheduled delivery time. Audio and/or visual communication with an ordering point and/or delivery vehicle may be provided in the user interface.

Abstract: A method and apparatus for generating and authenticating documents having stored electrostatic pattern information provides security with respect to the authenticity of documents. A liquid medium including a plurality of electrostatic monopoles is applied to the surface of a document, which embeds a permanent electrostatic pattern in the document. The pattern is then readable by an electrostatic scanner. The monopoles may be associated with differing colors, including black and white, may be transparent or have a neutral color. The patterns may embed data, certificates or shapes. The monopoles may provide a watermark or visible image. The apparatus may be a pen or printer, and may include multiple selectable vessels containing ink and/or electrostatic liquid medium of one or both charge states. Visible features of the document can be compared with the detected pattern, or the pattern may be compared to a database or decrypted with a key.

Abstract: A numerically-controlled phase-lock loop with input clock dependent ratio adjustment provides for narrower-bandwidth loops that lock to a wide range of frequencies and/or operation with an absent or degraded input timing reference. A timing reference characteristic detector determines an input frequency range of the input timing reference signal, the data type of the timing reference, and/or whether a timing reference signal of sufficient quality is present. A numerically controlled oscillator is controlled by a numeric ratio that is adjusted to provide the desired clock frequency output in conformity with the detected frequency range and/or data type. If the timing reference signal is absent or degraded, then the numeric ratio can be set to a fixed value or a local timing reference can be applied in order to generate the desired clock output frequency.

Abstract: A power meter having complex quadrature output current and voltage filters provides power measurements in high amplitude and frequency variation and/or high jitter environments without requiring high computational overhead. A pair of filters, one for voltage and one for current each have a response determined by complex non-conjugate poles. The response of the filters is such that only the positive or negative half plane of the complex frequency spectrum is passed and provide complex outputs representing the real and imaginary parts of both the current and voltage. At least one indication of a power delivered to a load is computed from the complex current and voltage outputs, which may be the real and/or reactive power.

Abstract: A method, system and telephone answering device for processing control scripts attached to voice messages provides a mechanism by which a caller can leave an interactive list of contact information. The scripts provide for control of a display and input responses from a keypad or other input device so that an entry on the contact information list can be activated in response to user input, thus returning the call. The list information displayed may be arbitrary textual associations with the underlying contact number. The contact information may also include e-mail addresses, so that activation of an e-mail list element will activate a text messaging service, if available. For wireless telephone devices, the method implementing the present invention may be operable at the service provider only, so that standard wireless telephones may be programmed to provide the interactive list from a provider-side interpretation of the scripts.

Abstract: A delta-sigma analog-to-digital converter (ADC) circuit improves performance by reducing the amount of noise and other error sampled by the reference switching circuit. The reference switching network is operated intermittently only when the charge on an input integrator exceeds a threshold, thereby preventing the input integrator from saturating, while avoiding needlessly injecting reference noise. The input to the ADC may be a current injected directly into a summing node of the integrator, or may be a voltage supplied through another switching network.

Abstract: A programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module. The memory module may emulate multiple selectable memory module types, and may include a complete storage array to provide standard memory module operation.

Abstract: A method and system for determining element voltage selection control values for a storage device provides energy conservation in storage arrays while maintaining a particular performance level. The storage device is partitioned into multiple elements, which may be sub-arrays, rows, columns or individual storage cells. Each element has a corresponding virtual power supply rail that is provided with a selectable power supply voltage. At test time, digital control values are determined for selection circuits for each element that set the virtual power supply rail to the minimum power supply voltage, unless a higher power supply voltage is required for the element to meet performance requirements. The set of digital control values can then be programmed into a fuse or used to adjust a mask at manufacture, or supplied on media along with the storage device and loaded into the device at system initialization.

Abstract: A method for performing memory diagnostics using a programmable diagnostic memory module provides enhanced testability of memory controller and memory subsystem design. The programmable diagnostic memory module includes an interface for communicating with an external diagnostic system, and the interface is used to transfer commands to the memory module to alter various behaviors of the memory module. The altered behaviors may be changing data streams that are written to the memory module to simulate errors, altering the timing and/or loading of the memory module signals, downloading programs for execution by a processor core within the memory module, changing driver strengths of output signals of the memory module, and manipulating in an analog domain, signals at terminals of the memory module such as injecting noise on power supply connections to the memory module.

Abstract: A system and computer program for controlling screen focus for files and applications during presentations provides for protection of information in a computer-generated presentation setting and prevention of interruption of a presentation by unwanted computer activity. A list is built of applications and files for which screen access is permitted during the presentation. Upon an indication that the presentation is active, when an application or file is about to obtain screen focus, the list is checked to determine whether access is permitted for the file or application. If the application or file is should not have the focus, execution of an application or opening of a file is blocked, or screen focus is denied to windows generated in conjunction with application or file. The indication that the presentation is active may be the connection of a particular display type (e.g., a projector) or the use of a certain display port.

Abstract: A moment-based method and system for evaluation of metal layer transient currents in an integrated circuit provides a computationally efficient evaluation of transient current magnitudes through each interconnect in the metal layer. The determinable magnitudes include peak, rms and average current, which can be used in subsequent reliability analyses. Interconnect path nodes are traversed and circuit moments are either retrieved from a previous interconnect delay analysis or are computed. For each pair of nodes, current moments are computed from the circuit moments. The average current is computed from the zero-order circuit moment and the peak and rms currents are obtained from expressions according to a lognormal or other distribution shape assumption for the current waveform at each node.

Abstract: A signal history controlled slew-rate transmission method and bus interface transmitter provide an improved channel equalization mechanism having low complexity. A variable slew-rate feed-forward pre-emphasis circuit changes the slew rate of the applied pre-emphasis in conformity with the history of the transmitted signal. The pre-emphasis circuit may be implemented by a pair of current sources supplying the output of the transmitter, and having differing current values. The current sources are controlled such that upon a signal value change, a high slew rate is provided and when the signal value does not change for two consecutive signal periods, the slew rate is reduced. A current source having a controlled magnitude may be employed to provide a slew rate that changes over time and is continuously reduced until another transmission value change occurs.

Abstract: A fault tolerant capability for the reliable collection and aggregation of disparate data from multiple processing units. Data of a processing unit is collected and locally aggregated at that processing unit. The locally aggregated data is stored in a local database, and periodically forwarded to a central manager. In response to receiving the data, the central manager determines whether the data should be included in a total aggregate of data for the processing environment.

Abstract: A hybrid analog/digital phase-lock loop for low-jitter synchronization provides a mechanism for generating a low-jitter clock from a timing reference that has a high jitter level. A numerically-controlled analog oscillator provides a clock output and has an input for receiving a rational number. The rational number represents a ratio between the frequency of the clock output and the frequency of another stable clock provided to the circuit. A counter divides the frequency of either the clock output or the stable clock, providing feedback or feed-forward control of the analog oscillator, respectively. The circuit also includes a digital phase-frequency detector for detecting an on-going phase-frequency difference between an input timing reference and an output of the divider and a digital loop filter for filtering the output of the phase-frequency detector to provide the rational number that controls the frequency of the numerically-controlled analog oscillator.

Abstract: Processing system performance is improved while meeting power management constraints in a processing system by using activity factor headroom estimation. The method and system estimate the power consumption of the system from a model that relates measured activities at a present operating point to power consumption for any available operating point of one or more processors in the system. The method then chooses the operating point(s) with the highest performance among the available operating points that will still meet budgetary constraints or specific thresholds of power consumption. The budgetary constraints or specific thresholds may be dynamically adjusted, and the method will update the operating point(s) to maintain safe operation and maximize performance. The method provides the best performance for the executing workload while ensuring safe operation.

Abstract: A reconfigurable audio-video surround sound receiver (AVR) and method provide flexible surround speaker placement and a low cost simulated surround sound implementation. A processing circuit within an audio device or audio/visual (AV) device such as an audio-video receiver (AVR) generates signals for surround and main channel speakers that provide selectable operation between speaker placement in ordinary surround sound installation, or in a simulated surround sound installation with speakers placed at one end of a listening room.

Abstract: A scatterometer-interferometer and method for detecting and distinguishing characteristics of surface artifacts provides improved artifact detection and increased scanning speed in interferometric measurement systems. A scatterometer and interferometer are combined in a single measurement head and may have overlapping, concentric or separate measurement spots. Interferometric sampling of a surface under measurement may be initiated in response to detection of a surface artifact by the scatterometer, so that continuous scanning of the surface under measurement can be performed until further information about the size and/or height of the artifact is needed.

Abstract: A storage array including a local clock buffer with programmable timing provides a mechanism for evaluating circuit timing internal to the storage array. The local clock buffer can independently adjust the pulse width of a local clock that controls the wordline and local bitline precharge pulses and the pulse width of a delayed clock that controls the global bitline precharge, evaluate and read data latching. The delay between the local clock and the delayed clock can also be adjusted. By varying the pulse widths of the local and delayed clock signal, along with the inter-clock delay, the timing margins of each cell in the array can be evaluated by reading and writing the cell with varying pulse width and clock delay. The resulting evaluation can be used to evaluate timing margin variation within a die, as well variation from die-to-die and under varying environments, e.g., voltage and temperature variation.

Abstract: A digital filter having improved overload characteristics provides improved performance in audio equalizers and other systems. In contrast to a standard digital filter, clipping is enforced at the output of the filter and an integrator is used to implement the first filter stage, which is then followed by another stage that may be a unit delay or an integrator. Scalers and combiners are provided to scale an input signal representation and the output signal representation and combine them to provide the particular coefficient inputs to the integrator and the second stage forming a direct form filter. The resulting filter implements the same transfer function as a corresponding direct form filter, with an improved recovery from internal overload conditions. Higher-order filters can be formed by cascading the second-order filters formed by multiple integrator/second stage pairs.

Abstract: A pulsed dynamic logic environment metric measurement circuit provides self-referenced, low area/cost and low power measurement of circuit environment metrics, such as supply voltage. A cascade of dynamic logic stages is clocked with a pulse having a width substantially independent of an environment metric to which the delay of the dynamic logic stages is sensitive. The number of dynamic logic stages that evaluate within a given pulse provides a direct measure of the pulse width, and thus the value of the circuit metric. The pulse may be generated from a logical exclusive-OR combination of a clock signal provided from two circuit paths that differ in sensitivity to the environment metric to be measured. One circuit path may have a delay substantially determined only by wire delay, which is not substantially sensitive to circuit environment metrics such as power supply voltage.